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* ac,radeonsi: increase the maximum number of shader args and return valuesMarek Olšák2020-01-131-1/+2
| | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi/gfx9: force the micro tile mode for MSAA resolve correctly on gfx9Marek Olšák2020-01-092-3/+18
| | | | | | | Fixes: 69ea473 "amd/addrlib: update to the latest version" Closes: #2325 Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* ac/gpu_info: add pc_lines and use it in radeonsiMarek Olšák2020-01-082-0/+4
| | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* ac/gpu_info: always use distributed tessellation on gfx10Marek Olšák2020-01-081-2/+2
| | | | | | | This might fix a hang on Navi14. Cc: 19.2 19.3 <[email protected]> Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* ac/surface: use uint16_t for mipmap level pitchesSamuel Pitoiset2020-01-061-1/+1
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* Revert "amd/common: Always initialize gfx9 mipmap offset/pitch."Bas Nieuwenhuizen2020-01-042-5/+7
| | | | | | | | | This reverts commit 973181c06cca3fe232c3a435abde31f2fc1b81ef. Requested by Marek. Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* amd/common: Always initialize gfx9 mipmap offset/pitch.Bas Nieuwenhuizen2020-01-022-7/+5
| | | | | | | | | | | | | | The WSI expects pitch to be meaningful even for tiled textures. (It is used for the pitch in modesetting and X11) Fixes: 824bd0830e8 "radv: return the correct pitch for linear mipmaps on GFX10" Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2301 Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2304 Reviewed-by: Samuel Pitoiset <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3245> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3245>
* radv: return the correct pitch for linear mipmaps on GFX10Samuel Pitoiset2019-12-302-1/+5
| | | | | | | | | | | | On GFX9, the pitch of a level is always the pitch of the entire image but not on GFX10. This fixes graphics glithes with Halo - The Master Chief Collection. Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2188 CC: <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: Handle alignment of 96-bit formats.Bas Nieuwenhuizen2019-12-301-0/+11
| | | | | | | | | addrlib doesn't quite do it right, so do it ourselves. Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2162 CC: <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* amd: fix empty-body issuesEric Engestrom2019-12-271-1/+1
| | | | | | Signed-off-by: Eric Engestrom <[email protected]> Fixes: 8d43e2b2ded0fe3c82d4 ("meson: add -Werror=empty-body to disallow `if(x);`") Reviewed-By: Timur Kristóf <[email protected]>
* ac/surface: fix an assertion failure on gfx9 in CMASK computationMarek Olšák2019-12-201-0/+1
| | | | | | | | | | | addrlib only allows the 2D resource type with CMASK. Fixes: 69ea473eeb9 "amd/addrlib: update to the latest version" Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3187> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3187>
* amd/addrlib: update to the latest versionMarek Olšák2019-12-161-7/+0
| | | | | | Acked-by: Bas Nieuwenhuizen <[email protected]> Acked-by: Samuel Pitoiset <[email protected]> Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* amd/common: Always use addrlib for HTILE tc-compat.Bas Nieuwenhuizen2019-12-141-11/+4
| | | | | | | | | | | | | | | | | Even without depth+stencil addrlib can (correctly!) decide to disable tc compatible HTILE. One example is 8x sampling with 32-bit depth on Stoney. The row size on Stoney is 1024, while the tile size is 2048, which results in tile splits which are not supported with tc-compat. On Stoney, this fixes dEQP-VK.glsl.builtin_var.fragdepth.*_list_d32_sfloat_multisample_8 CC: <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3054> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3054>
* amd/common: Fix tcCompatible degradation on Stoney.Bas Nieuwenhuizen2019-12-141-1/+1
| | | | | | | | | | | | | addrlib sometimes returns smaller sizes for tcCompat as it does not seem to take into account the depth+stencil matching config gymnastics with tcCompat. This fixes dEQP-VK.pipeline.render_to_image.core.2d_array.huge.height.r8g8b8a8_unorm_d32_sfloat_s8_uint CC: <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3054>
* aco: Use common argument handlingConnor Abbott2019-11-251-0/+1
| | | | Reviewed-by: Daniel Schürmann <[email protected]>
* ac: Add a shared interface between radv, radeonsi, LLVM and ACOConnor Abbott2019-11-253-0/+168
| | | | | | | | | | | | | | | | | | | ac_shader_args will be similar to ac_shader_abi, except for being free from LLVM-specific concepts and therefore capable of being shared between LLVM and ACO. This will help us accomplish a few different things: - Decouple setting up SGPR and VGPR arguments from translating to LLVM, so that we can reference these arguments in NIR lowering passes, which will let us lower e.g. descriptor sets in NIR. - Stop using radv-specific structures for things like determining the chip generation in ACO. In the end, we should replace ac_shader_abi with this structure + driver-specific lowering passes. Reviewed-by: Samuel Pitoiset <[email protected]>
* ac: fill num_rings for remaining IPsMarek Olšák2019-11-191-2/+16
| | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* ac: add radeon_info::num_rings and move ring_type to amd_family.hMarek Olšák2019-11-193-6/+18
| | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* ac: add radeon_info::has_l2_uncachedSamuel Pitoiset2019-11-182-0/+4
| | | | | | | For chips that have uncached device memory (ie. MTYPE_UC). Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: Handle invalid GFX10 format correctly in ac_get_tbuffer_format.Timur Kristóf2019-11-081-0/+5
| | | | | | | | | | It happens that some games try to access a vertex buffer without a valid format. This case was incorrectly handled by ac_get_tbuffer_format which made ACO emit an invalid instruction. Signed-off-by: Timur Kristóf <[email protected]> Cc: 19.3 <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* ac: add missing Arcturus to the info of pc linesLeo Liu2019-11-041-0/+2
| | | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Cc: Marek Olšák <[email protected]>
* ac: get tcc_harvested from the kernelMarek Olšák2019-10-281-3/+8
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: Add extern "C" to some headers that were missing it.Timur Kristóf2019-10-103-0/+24
| | | | | | | | | We'd like to include some of these in C++ code later. Specifically, ACO is written in C++ and we would like to use some of this code in ACO in order to avoid code duplication. Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* amd: don't use AMD_FAMILY definitions from amdgpu_drm.hMarek Olšák2019-10-091-8/+8
| | | | | | use the ones from addrlib Reviewed-by: Samuel Pitoiset <[email protected]>
* amd: Move all amd/common code that depends on LLVM to amd/llvm.Timur Kristóf2019-10-0811-11636/+1
| | | | | | | | | | | | | This commit is a step towards the goal of being able to build RADV without LLVM. In the future we would like to offer the option to use RADV solely with ACO. There is still a need for the common AMD code located in amd/common but the LLVM specific parts need to be separated. Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Acked-by: Marek Olšák <[email protected]> Acked-by: Samuel Pitoiset <[email protected]>
* ac/nir: remove unused code for nir_op_{fmod,frem}Samuel Pitoiset2019-10-031-14/+0
| | | | | | | RADV and RadeonSI both lower these two NIR instructions. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: fix GLSL imageSamples()Marek Olšák2019-09-301-24/+4
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* ac: add ac_build_image_get_sample_count from radeonsiMarek Olšák2019-09-302-0/+21
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* ac/surface: don't allocate FMASK if there is no graphicsMarek Olšák2019-09-301-2/+3
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* ac: reorder and print all radeon_info fieldsMarek Olšák2019-09-302-19/+53
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: set the number of SDPs same as the number of TCCsMarek Olšák2019-09-301-13/+3
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: fix num_good_cu_per_sh for harvested chipsMarek Olšák2019-09-301-0/+6
| | | | | Cc: 19.2 <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add radeon_info::tcc_harvestedMarek Olšák2019-09-302-0/+5
| | | | | Cc: 19.2 <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: fix incorrect vram_size reported by the kernelMarek Olšák2019-09-301-2/+10
| | | | | Cc: 19.2 <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: Introduce ac_get_fs_input_vgpr_cnt.Timur Kristóf2019-09-262-0/+59
| | | | | | | | | | | Add a function called ac_get_fs_input_vgpr_cnt which will return the number of input VGPRs used by an AMD shader. Previously, radv and radeonsi had the same code duplicated, but this commit also allows them to share this code. Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* amd/common: Add num_shared_vgprs to ac_shader_config for GFX10.Timur Kristóf2019-09-262-0/+20
| | | | | | | | | In GFX10 wave64 mode, shared VGPRs allow the two wave halves to share some data with each other. Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* amd/common: Extract some helper functions to ac_shader_util.Timur Kristóf2019-09-265-117/+131
| | | | | | | | | | This commit moves ac_get_tbuffer_format, ac_get_sampler_dim and ac_get_image_dim into ac_shader_util, thus enabling them to be used by compilers other than LLVM. Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* amd/common: Move ac_export_mrt_z to ac_llvm_build.Timur Kristóf2019-09-264-75/+76
| | | | | | | | | The aim of this commit is to keep ac_shader_util LLVM-free, since we would like to use it in ACO later. Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac/nir: force unnormalized coordinates for RECTMarek Olšák2019-09-231-1/+3
| | | | | | This fixes VAAPI. Reviewed-by: Connor Abbott <[email protected]>
* ac/nir: port Z compare value clamping from radeonsiMarek Olšák2019-09-231-9/+25
| | | | | | This fixes some dEQP tests. Reviewed-by: Connor Abbott <[email protected]>
* ac: stop using PCI IDs for chip identificationMarek Olšák2019-09-231-15/+58
| | | | | | PCI IDs for amdgpu will be removed from Mesa. Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radv/aco: Setup alternate path in RADV to support the experimental ACO compilerDaniel Schürmann2019-09-191-0/+3
| | | | | | | | | | LLVM remains default and ACO can be enabled with RADV_PERFTEST=aco. Co-authored-by: Daniel Schürmann <[email protected]> Co-authored-by: Rhys Perry <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: move ac_get_num_physical_vgprs into radeon_infoMarek Olšák2019-09-182-10/+2
| | | | | Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* ac: move ac_get_num_physical_sgprs into radeon_infoMarek Olšák2019-09-182-12/+12
| | | | | Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* ac: move ac_get_max_wave64_per_simd into radeon_infoMarek Olšák2019-09-182-16/+4
| | | | | Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* ac: move num_sdp_interfaces into radeon_infoMarek Olšák2019-09-182-0/+15
| | | | | Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* ac: move PBB MAX_ALLOC_COUNT into radeon_infoMarek Olšák2019-09-182-0/+33
| | | | | Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* ac: Remove DEBUG workaroundMichel Dänzer2019-09-171-6/+0
| | | | | | As of version 7, LLVM uses LLVM_DEBUG instead of just DEBUG. Reviewed-by: Timothy Arceri <[email protected]>
* ac: replace HAVE_LLVM with LLVM_VERSION_MAJOR for atomic-optimizationsMarek Olšák2019-09-111-1/+1
| | | | trivial
* radeonsi: move texture storage allocation outside of radeonsiMarek Olšák2019-09-092-2/+65
| | | | | | possible code sharing with radv Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
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