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* ac/nir: add image and write parameter to ac_shader_abi::load_sampler_descNicolai Hähnle2017-07-312-19/+28
* ac/nir: add support for arrays-of-arrays to get_sampler_descNicolai Hähnle2017-07-311-5/+20
* ac/nir: pass ac_nir_context to tex_fetch_ptrs and related functionsNicolai Hähnle2017-07-311-75/+83
* ac/nir: add and use ac_shader_abi::load_sampler_descNicolai Hähnle2017-07-312-48/+84
* ac/nir: pass ac_nir_context to visit_tex and various related functionsNicolai Hähnle2017-07-311-117/+118
* ac/nir,radeonsi: add ac_shader_abi::chip_classNicolai Hähnle2017-07-312-0/+3
* ac/nir,radeonsi: add ac_shader_abi::load_uboNicolai Hähnle2017-07-312-0/+5
* ac/nir: pass ac_nir_context to visit_load_ubo_bufferNicolai Hähnle2017-07-311-8/+8
* ac/nir: pass ac_nir_context to visit_{load,store}_var and get_deref_offset he...Nicolai Hähnle2017-07-311-75/+75
* ac/nir: pass ac_llvm_context to some helper functionsNicolai Hähnle2017-07-311-20/+20
* ac/nir: pass ac_nir_context to visit_intrinsicNicolai Hähnle2017-07-311-52/+52
* ac/nir: add ac_nir_context::main_functionNicolai Hähnle2017-07-311-0/+3
* ac/nir: split scanning outputs from setting up output allocasNicolai Hähnle2017-07-311-8/+43
* ac/nir: pass ac_llvm_context to *build_alloca* helpersNicolai Hähnle2017-07-311-9/+9
* ac/nir: use ac_shader_abi::emit_outputsNicolai Hähnle2017-07-311-2/+14
* ac,radeonsi: add ac_shader_abi::emit_outputs for hardware VS shadersNicolai Hähnle2017-07-311-0/+4
* radeonsi: translate NIR to LLVMNicolai Hähnle2017-07-311-1/+1
* ac/nir: add ac_shader_abi::inputsNicolai Hähnle2017-07-312-0/+9
* ac/nir: begin splitting off ac_nir_contextNicolai Hähnle2017-07-312-234/+290
* ac/nir: start using ac_shader_abiNicolai Hähnle2017-07-311-20/+18
* ac,radeonsi: move some VS input descriptions to ac_shader_abiNicolai Hähnle2017-07-311-0/+40
* radv/ac: port SI TC L1 write corruption fix.Dave Airlie2017-07-261-3/+5
* radv/ac: realign SI workaround with radeonsi.Dave Airlie2017-07-261-2/+3
* ac/surface: fix hybrid graphics where APU=GFX9, dGPU=olderMarek Olšák2017-07-261-0/+12
* ac/gpu: add code to detect if kernel supports sync objects.Dave Airlie2017-07-212-0/+10
* ac/nir: rewrite shared variable handling (v2)Connor Abbott2017-07-171-87/+158
* ac/gpu_info: if clock crystal frequency is 0, print an error and set 1Marek Olšák2017-07-171-0/+4
* ac/surface/gfx9: flags.texture currently refers to TC-compatible HTILEMarek Olšák2017-07-171-1/+3
* radeonsi: merge si_llvm_get_amdgpu_target into ac_get_llvm_targetMarek Olšák2017-07-172-8/+11
* amd/addrlib: fix typo in api name.Dave Airlie2017-07-171-1/+1
* radv: set cb base tile swizzles for MRT speedups (v4)Dave Airlie2017-07-172-0/+16
* radv/ac: drop setting xnackDave Airlie2017-07-091-2/+1
* radv: add support for using addrlib max alignment.Dave Airlie2017-07-093-2/+12
* ac/nir: Fix ordering of parameters for image atomic cmpswap intrinsicsAlex Smith2017-07-071-1/+1
* radv: enable sisched toggle in perftest flags.Dave Airlie2017-07-062-2/+4
* ac/llvm: set xnack like radeonsi does.Dave Airlie2017-07-061-1/+3
* ac/llvm: create features list using snprintf.Dave Airlie2017-07-061-2/+5
* ac/radv: change api to create target machineDave Airlie2017-07-062-3/+6
* ac/nir: Move VS position exports before param exports.Bas Nieuwenhuizen2017-07-051-55/+54
* ac/nir: fix 64-bit shiftsConnor Abbott2017-07-031-3/+12
* ac/nir: implement 64-bit packing and unpackingConnor Abbott2017-07-031-0/+31
* radv: Use v4i32 variant of llvm.SI.load.const.Bas Nieuwenhuizen2017-06-301-3/+1
* ac/nir: remove last remnants of v16i8Dave Airlie2017-06-283-9/+3
* ac/nir: Use correct LLVM intrinsics for atomic ops on imageBuffersAlex Smith2017-06-281-29/+34
* ac/nir: assert printfs will fitJames Legg2017-06-281-5/+12
* ac/nir: Make intrinsic_name buffer long enoughJames Legg2017-06-281-1/+1
* ac/nir: convert emit helpers to ac_llvm_contextNicolai Hähnle2017-06-271-117/+118
* ac/nir: remove unused nir_to_llvm_context::has_ddxyNicolai Hähnle2017-06-271-2/+0
* ac/nir: implement nir_op_f2bNicolai Hähnle2017-06-271-0/+12
* ac/nir: implement nir_op_{b2i,i2b}Nicolai Hähnle2017-06-271-0/+20
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