summaryrefslogtreecommitdiffstats
path: root/src/amd/common
Commit message (Collapse)AuthorAgeFilesLines
* radv: enable denorms for 64-bit and 16-bit floatsSamuel Pitoiset2018-01-051-0/+14
| | | | | | | | | | | Similar to RadeonSI. This fixes: dEQP-VK.image.texel_view_compatible.graphic.basic.attachment_read.bc*r16g16b16a16_sfloat dEQP-VK.image.extended_usage_bit.attachment_write.r16_sfloat Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: correctly detect if we need ring buffersSamuel Pitoiset2018-01-051-7/+9
| | | | | | | | | | | | When allocate_user_sgprs() was called, ctx->stage was actually unset and 0 is for the vertex shader. This doesn't change anything for now because of the spill support thing. Though, the number of user SGPRs has to be fixed for merged shaders on GFX9. It was broken before anyway. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: use ac_image_load when lod is zeroSamuel Pitoiset2018-01-051-1/+3
| | | | | | | | | This might decrease VGPR spilling, because we no longer have to use v4i32 for 2D fetches when level == 0. We now use v2i32 for those cases. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac: rework ac_llvm_extract_elem()Timothy Arceri2018-01-051-3/+3
| | | | | | | Simplifies the logic a little and asserts index is 0. Suggested-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac/radeonsi: add load_tess_coord() to the abiTimothy Arceri2018-01-052-7/+17
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac/radeonsi: add tcs_rel_ids to the abiTimothy Arceri2018-01-052-8/+8
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac: add {tcs,tes}_patch_id to the abiTimothy Arceri2018-01-052-8/+8
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac: move some helpers to ac_llvm_build.cTimothy Arceri2018-01-053-40/+50
| | | | | | | We will call these from the radeonsi NIR backend. Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac: add store_tcs_outputs() to the abiTimothy Arceri2018-01-052-24/+51
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac: call load_tcs_input() via the abiTimothy Arceri2018-01-051-19/+17
| | | | | | | | This also enables some code sharing with tes. V2: drop type param and just use ctx->i32 Reviewed-by: Marek Olšák <[email protected]>
* ac: add load_tes_inputs() to the abiTimothy Arceri2018-01-052-22/+51
| | | | | | V2: drop type param and just use ctx->i32 Reviewed-by: Marek Olšák <[email protected]>
* amd/common: scan if gl_PrimitiveID is used before translating to LLVMSamuel Pitoiset2018-01-044-7/+4
| | | | | | | | | It makes more sense to move all scan stuff in the same place. Also, we don't really need to duplicate the uses_primid field for each stages. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* amd/common: scan if gl_InvocationID is usedSamuel Pitoiset2018-01-042-0/+4
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac: rename has_sync_file to has_fence_to_handle.Bas Nieuwenhuizen2018-01-042-3/+3
| | | | | | | | | | | sync_files are in linux since 4.7, while the amdgpu fence_to_handle ioctl is only in 4.15. In particular we don't need it for sync_file in radv, because everything happens via syncobjs, which got support earlier than fence_to_handle. Reviewed-by: Marek Olšák <[email protected]>
* ac/nir: Handle loading data from compact arrays.Bas Nieuwenhuizen2018-01-041-6/+7
| | | | | Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver" Reviewed-by: Dave Airlie <[email protected]>
* ac: rename has_syncobj_wait -> has_syncobj_wait_for_submitMarek Olšák2018-01-042-2/+2
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: rework set_userdata_location() and rename to set_loc()Samuel Pitoiset2017-12-271-8/+11
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: rename set_userdata_location_shader() to set_loc_shader()Samuel Pitoiset2017-12-271-27/+30
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: replace set_userdata_location_indirect() by set_loc_desc()Samuel Pitoiset2017-12-271-11/+12
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: rename radv_define_vs_user_sgprs_phase2()Samuel Pitoiset2017-12-271-22/+33
| | | | | | | ... to set_vs_specific_input_locs(). Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: rename radv_define_common_user_sgprs_phase2()Samuel Pitoiset2017-12-271-43/+50
| | | | | | | ... to set_global_input_locs(). Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: rename add_user_sgpr_array_argument() to add_array_arg()Samuel Pitoiset2017-12-271-9/+5
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: replace add_sgpr_argument() by add_arg()Samuel Pitoiset2017-12-271-45/+33
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: replace add_user_sgpr_argument() by add_arg()Samuel Pitoiset2017-12-271-45/+58
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: replace add_vgpr_argument() by add_arg()Samuel Pitoiset2017-12-271-51/+60
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: add new add_arg() helper for SGPRs/VGPRs argumentsSamuel Pitoiset2017-12-271-0/+24
| | | | | | | The idea is to clean up the add arguments logic. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: rename radv_define_common_user_sgprs_phase1()Samuel Pitoiset2017-12-271-38/+74
| | | | | | | ... to declare_global_input_sgprs(). Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: rename radv_define_vs_user_sgprs_phase1()Samuel Pitoiset2017-12-271-21/+42
| | | | | | | ... to declare_vs_specific_inputs_sgprs(). Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: do not try to declare input VS SGPRs for GSSamuel Pitoiset2017-12-271-1/+0
| | | | | | | It's a no-op anyway but it looked strange to me, remove it. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: add declare_vs_input_vgprs() helperSamuel Pitoiset2017-12-271-14/+16
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: add declare_tes_input_vgprs() helperSamuel Pitoiset2017-12-271-8/+10
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: remove unnecessary num_user_sgprs_usedSamuel Pitoiset2017-12-271-2/+0
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: remove unnecessary user_sgpr_countSamuel Pitoiset2017-12-271-2/+0
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common/radv/radeonsi: use register defines for dcc block sizes.Dave Airlie2017-12-271-0/+6
| | | | | | | | These are just taken from amdvlk, we probably knew these already, but may as well port them now. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* amd/common: add ac_export_mrt_z() helperSamuel Pitoiset2017-12-223-59/+83
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: pass the family to ac_llvm_context_init()Samuel Pitoiset2017-12-223-4/+8
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: properly load unused gl_LocalInvocationID/gl_WorkGroupID componentsSamuel Pitoiset2017-12-191-3/+18
| | | | | | | F1 2017 looks good now. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: do not add extra SGPR when push constants are not usedSamuel Pitoiset2017-12-191-1/+2
| | | | | | | | | This is not because the vertex stage needs some push constants that other stages need them too. This should reduce the number of loaded SGPRs in some situations. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: change the needs_push_constants logicSamuel Pitoiset2017-12-191-4/+4
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: remove one useless check in ac_nir_shader_info_pass()Samuel Pitoiset2017-12-191-4/+2
| | | | | | | pipeline->layout can't be NULL now. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: fix lds store for patch outputs.Dave Airlie2017-12-191-1/+1
| | | | | | | | | | This wasn't calculating the correct value, this along with a nir patch fixes a regression in: dEQP-VK.tessellation.shader_input_output.barrier Fixes: 043d14db30a (ac/nir: don't write tcs outputs to LDS that aren't read back.) Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* amd/common: add ac_vgt_gs_mode() helperSamuel Pitoiset2017-12-182-0/+33
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: add ac_get_cb_shader_mask() helperSamuel Pitoiset2017-12-182-0/+38
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: Add detection of the syncobj wait/signal/reset ioctls.Bas Nieuwenhuizen2017-12-182-0/+2
| | | | | | First amdgpu bump after inclusion was 20 (which was done for local BOs). Reviewed-by: Dave Airlie <[email protected]>
* amd/common: add ac_build_waitcnt()Samuel Pitoiset2017-12-143-12/+13
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: more use of i32_1Samuel Pitoiset2017-12-141-4/+4
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: more use of i32_0Samuel Pitoiset2017-12-141-9/+9
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: make use of ac_build_fdiv()Samuel Pitoiset2017-12-141-0/+1
| | | | | | | And move the comment to amd/common. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: export SampleMask from pixel shaders at full rateSamuel Pitoiset2017-12-141-11/+35
| | | | | | | | | | | Use 16_ABGR instead of 32_ABGR if Z isn't written. Ported from RadeonSI. No CTS regressions on Polaris. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: add ac_get_spi_shader_z_format()Samuel Pitoiset2017-12-143-0/+80
| | | | | | | | ac_shader_util.c will contain shader helpers for RadeonSI and RADV. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-26 01:36:52 +0000