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* ac/nir: Fix vector extraction if source vector has >4 elements.Bas Nieuwenhuizen2018-01-191-16/+32
* ac/nir: Use correct 32-bit component writemask for 64-bit SSBO stores.Bas Nieuwenhuizen2018-01-191-9/+13
* ac/nir: Fix TCS output LDS offsets.Bas Nieuwenhuizen2018-01-191-5/+6
* ac: fix visit_ssa_undef() for doublesTimothy Arceri2018-01-191-2/+3
* ac/nir: account for view index in the user sgpr allocation.Dave Airlie2018-01-181-8/+34
* ac: tidy up array indexing logicTimothy Arceri2018-01-181-5/+1
* ac: fix buffer overflow bug in 64bit SSBO loadsTimothy Arceri2018-01-181-1/+4
* ac: fix nir_intrinsic_get_buffer_size for radeonsiTimothy Arceri2018-01-181-2/+2
* ac: rework load_tcs_{inputs,outputs}Timothy Arceri2018-01-181-73/+53
* ac/radeonsi: add tcs load outputs supportTimothy Arceri2018-01-182-19/+22
* ac: set no-signed-zeros-fp-math when RADV_DEBUG="unsafemath" is usedSamuel Pitoiset2018-01-161-0/+3
* ac: set fast math flags when RADV_DEBUG="unsafemath" is usedSamuel Pitoiset2018-01-161-2/+10
* ac: import lp_create_builder() from gallivmSamuel Pitoiset2018-01-162-0/+39
* ac: replace llvm.AMDGPU.kilp by llvm.amdgcn.kill with LLVM 6Samuel Pitoiset2018-01-161-10/+12
* Revert "ac/shader: gather If TES reads TESSINNER or TESSOUTER"Samuel Pitoiset2018-01-154-8/+2
* amd/common: fix loading InstanceID for tess on < GFX9Samuel Pitoiset2018-01-151-2/+1
* ac/shader: gather If TES reads TESSINNER or TESSOUTERSamuel Pitoiset2018-01-154-2/+8
* ac: remove ac_shader_variant_info::fs::output_maskSamuel Pitoiset2018-01-152-3/+0
* ac: add doubles support to isignTimothy Arceri2018-01-141-7/+18
* ac: add i64_0 and i64_1 to llvm build contextTimothy Arceri2018-01-142-0/+4
* ac/nir: fix translation of nir_op_b2i for doublesTimothy Arceri2018-01-141-3/+9
* ac: add 'const' qualifiers to the shader info passSamuel Pitoiset2018-01-122-8/+11
* ac: remove unused ac_nir_compiler_options from gather_info_input_decl()Samuel Pitoiset2018-01-121-4/+2
* radv: trim buffer load result (fixes dota2)Dave Airlie2018-01-121-1/+1
* meson: Use dependencies for nirDylan Baker2018-01-111-2/+3
* meson: Use consistent styleDylan Baker2018-01-111-4/+6
* ac/nir: fix translation of nir_op_fsign for doublesTimothy Arceri2018-01-121-7/+19
* ac: add f64_0 to the llvm build contextTimothy Arceri2018-01-122-0/+2
* ac/nir: fix translation of nir_op_frcp for doublesTimothy Arceri2018-01-121-1/+2
* ac/nir: fix translation of nir_op_frsq for doublesTimothy Arceri2018-01-121-1/+2
* ac: add f64_1 to the llvm build contextTimothy Arceri2018-01-122-0/+2
* ac: add load_patch_vertices_in() to the abiTimothy Arceri2018-01-112-1/+12
* ac/nir: Sanitize location_frac for local variables.Bas Nieuwenhuizen2018-01-111-0/+1
* amd/common: use ac_build_buffer_load() for emitting UBO loadsSamuel Pitoiset2018-01-101-14/+3
* amd/common: import get_{load,store}_intr_attribs() from RadeonSISamuel Pitoiset2018-01-102-10/+20
* amd/common: bump the number of available user SGPRS to 32 on GFX9Samuel Pitoiset2018-01-101-1/+3
* amd/common: do not rely on the pipeline for the push constants logicSamuel Pitoiset2018-01-103-9/+9
* amd/common: determine the ES type (VS or TES) for the GS on GFX9Samuel Pitoiset2018-01-102-0/+9
* ac: rework emit_barrier() to not segfault on radeonsiTimothy Arceri2018-01-091-9/+8
* ac: add load_tess_level() to the abiTimothy Arceri2018-01-092-0/+10
* radv: get InstanceID from VGPR1 (or VGPR2 for tess) instead of VGPR3Samuel Pitoiset2018-01-081-8/+24
* ac: add ac_build_fmin/fmax helpersMarek Olšák2018-01-062-15/+22
* radv: enable denorms for 64-bit and 16-bit floatsSamuel Pitoiset2018-01-051-0/+14
* amd/common: correctly detect if we need ring buffersSamuel Pitoiset2018-01-051-7/+9
* amd/common: use ac_image_load when lod is zeroSamuel Pitoiset2018-01-051-1/+3
* ac: rework ac_llvm_extract_elem()Timothy Arceri2018-01-051-3/+3
* ac/radeonsi: add load_tess_coord() to the abiTimothy Arceri2018-01-052-7/+17
* ac/radeonsi: add tcs_rel_ids to the abiTimothy Arceri2018-01-052-8/+8
* ac: add {tcs,tes}_patch_id to the abiTimothy Arceri2018-01-052-8/+8
* ac: move some helpers to ac_llvm_build.cTimothy Arceri2018-01-053-40/+50
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