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* ac/nir: remove emission of nir_op_fpowSamuel Pitoiset2018-02-221-4/+0
| | | | | | | fpow is now lowered at NIR level. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: set GLC=1 for load/store of coherent/volatile imagesSamuel Pitoiset2018-02-221-3/+4
| | | | | | | | | | This disables persistence accross wavefronts. F1 2017 and Wolfenstein 2 appear to use some coherent images but this patch doesn't seem to change anything. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/radeonsi: pass type to load_tess_varyings()Timothy Arceri2018-02-222-2/+14
| | | | | | We need this to be able to load 64bit varyings. Reviewed-by: Marek Olšák <[email protected]>
* amd/common:add uvd hevc enc support check in hw queryJames Zhu2018-02-212-1/+12
| | | | | | | Based on amdgpu hardware query information to check if UVD hevc enc support Signed-off-by: James Zhu <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac/nir: add glsl_is_array_image() helperSamuel Pitoiset2018-02-211-23/+18
| | | | | | | For consistency. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: set the DA field when performing atomics on 3D imagesSamuel Pitoiset2018-02-211-1/+2
| | | | | | | This doesn't fix anything known but it should definitely be set. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv/tess: don't need to look in constant for vertices_per_patchDave Airlie2018-02-211-1/+4
| | | | | | | This just avoids passing this value via user sgprs. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* ac/radv: cleanup some tcs output values accessDave Airlie2018-02-211-2/+8
| | | | | | | Just consolidates some code to make it easier to change. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* ac/radv: remove total_vertices variableDave Airlie2018-02-211-4/+3
| | | | | | | This just removes an unneeded variable. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* ac/radv: don't mark tess inner as used if we don't use it.Dave Airlie2018-02-211-8/+11
| | | | | | | | This just avoids marking it as a used output if we don't actually use it. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* ac/nir: to integer the args to bcsel.Dave Airlie2018-02-201-1/+2
| | | | | | | | | | | | | dEQP-VK.tessellation.invariance.outer_edge_symmetry.triangles_equal_spacing_ccw was hitting an llvm assert due to one value being an int and the other a float. This just casts both values to integer and fixes the test. Fixes: dEQP-VK.tessellation.invariance.outer_edge_symmetry.triangles_equal_spacing_ccw Cc: [email protected] Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* ac/nir: move ac_declare_lds_as_pointer() outside of the switchSamuel Pitoiset2018-02-201-5/+7
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: implement 32-bit pointers in user data SGPRs (v2)Marek Olšák2018-02-172-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | User SGPRs changes: VS: 14 -> 9 TCS: 14 -> 10 TES: 10 -> 6 GS: 8 -> 4 GSCOPY: 2 -> 1 PS: 9 -> 5 Merged VS-TCS: 24 -> 16 Merged VS-GS: 18 -> 11 Merged TES-GS: 18 -> 11 SGPRS: 2170102 -> 2158430 (-0.54 %) VGPRS: 1645656 -> 1641516 (-0.25 %) Spilled SGPRs: 9078 -> 8810 (-2.95 %) Spilled VGPRs: 130 -> 114 (-12.31 %) Scratch size: 1508 -> 1492 (-1.06 %) dwords per thread Code Size: 52094872 -> 52692540 (1.15 %) bytes Max Waves: 371848 -> 372723 (0.24 %) v2: - the shader cache needs to take address32_hi into account - set amdgpu-32bit-address-high-bits Reviewed-by: Samuel Pitoiset <[email protected]> (v1)
* ac: query high bits of 32-bit address spaceMarek Olšák2018-02-172-0/+8
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* ac/nir: do not reserve user SGPRs for unused descriptor setsSamuel Pitoiset2018-02-151-3/+6
| | | | | | | | | | | | | In theory this might lead to corruption if we bind a descriptor set which is unused, because LLVM is smart and it can re-use unused user SGPRs. In practice, this doesn't seem to fix anything. As a side effect, this will reduce the number of emitted SH_REG packets. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/shader: fix gathering of desc_set_used_maskSamuel Pitoiset2018-02-151-1/+1
| | | | | | | This was quite wrong. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/shader: be a little smarter when scanning vertex buffersSamuel Pitoiset2018-02-151-1/+11
| | | | | | | | | | Although meta shaders don't use any vertex buffers, there is no behaviour change but I think it's better to do this. Though, this saves two user SGPRs for push constants inlining or something else. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: implement nir_intrinsic_image_samplesTimothy Arceri2018-02-151-0/+23
| | | | | | | Fixes cts test: KHR-GL45.shader_texture_image_samples_tests.image_functional_test Reviewed-by: Marek Olšák <[email protected]>
* ac/nir_to_llvm: fix image size for arrays of arraysTimothy Arceri2018-02-151-6/+4
| | | | | | | Fixes cts test: KHR-GL44.shader_image_size.advanced-changeSize Reviewed-by: Marek Olšák <[email protected]>
* ac/nir: rename nir_to_llvm_context to radv_shader_contextSamuel Pitoiset2018-02-141-74/+74
| | | | | | | There is still more to do in that area, but it's a good start. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: remove nir_to_llvm_context from ac_nir_translate()Samuel Pitoiset2018-02-142-4/+3
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: remove nir_to_llvm_context::nir linkSamuel Pitoiset2018-02-141-11/+0
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: move the outputs array to the ABISamuel Pitoiset2018-02-142-25/+26
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/shader: scan force_persampleSamuel Pitoiset2018-02-142-3/+17
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: Use the renumbered const address space for LLVM 7.Bas Nieuwenhuizen2018-02-141-1/+2
| | | | | | | The LLVM AMDGPU backend decided to renumber the constant address space .... Reviewed-by: Samuel Pitoiset <[email protected]>
* ac/nir: add nir_intrinsic_{load,store}_shared supportTimothy Arceri2018-02-131-0/+46
| | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* ac/nir_to_llvm: add support for nir_intrinsic_shared_atomic_*Timothy Arceri2018-02-131-6/+42
| | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* ac/nir: Fix compiler warning about uninitialized dw_addr.Eric Anholt2018-02-121-1/+1
| | | | | | | | Even switching the def's condition to be the same chip revision check as the use, the compiler doesn't figure it out. Just NULL-init it. Fixes: ec53e527421d ("ac/nir: Add ES output to LDS for GFX9.") Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: remove backlink to nir_to_llvm_contextSamuel Pitoiset2018-02-121-6/+0
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: remove nir_to_llvm_context::moduleSamuel Pitoiset2018-02-121-13/+10
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: remove nir_to_llvm_context::builderSamuel Pitoiset2018-02-121-95/+92
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: drop nir_to_llvm_context from glsl_to_llvm_type()Samuel Pitoiset2018-02-121-13/+13
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: drop nir_to_llvm_context from visit_var_atomic()Samuel Pitoiset2018-02-121-7/+7
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: drop nir_to_llvm_context from visit_vulkan_resource_reindex()Samuel Pitoiset2018-02-121-5/+5
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: drop nir_to_llvm_context from visit_load_push_constant()Samuel Pitoiset2018-02-121-6/+7
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: drop nir_to_llvm_context from cast_ptr()Samuel Pitoiset2018-02-121-3/+3
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: drop nir_to_llvm_context from visit_load_local_invocation_index()Samuel Pitoiset2018-02-121-4/+4
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: drop nir_to_llvm_context from emit_f2f16()Samuel Pitoiset2018-02-121-15/+14
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: remove unused parameters in abi::load_tess_coord()Samuel Pitoiset2018-02-122-6/+3
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: remove useless bitcast in load_tess_coord()Samuel Pitoiset2018-02-121-8/+3
| | | | | | | nir_intrinsic_load_tess_coord always returns a v3i32. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add load_resource() to the ABISamuel Pitoiset2018-02-122-7/+25
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add load_sample_mask_in() to the ABISamuel Pitoiset2018-02-122-8/+11
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: move view_index to the ABISamuel Pitoiset2018-02-122-15/+18
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: move push_constants to the ABISamuel Pitoiset2018-02-122-4/+5
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: move tg_size to the ABISamuel Pitoiset2018-02-122-3/+3
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: remove unused nir_to_llvm_context:{defs,phis}Samuel Pitoiset2018-02-121-3/+0
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: convert nir_op_f2f32 src to a floatTimothy Arceri2018-02-101-0/+1
| | | | | | | | | | | | | | | | Fixes the following piglit test: ./bin/arb_vertex_attrib_64bit-check-explicit-location -auto -fbo Where we would end up with the nir such as: vec1 64 ssa_11 = pack_64_2x32_split ssa_9, ssa_10 vec1 32 ssa_12 = f2f32 ssa_2 And our pack_64_2x32_split nir to llvm code always produces a 64bit integer as output. Reviewed-by: Samuel Pitoiset <[email protected]>
* ac: fix some 64bit unpack assertsTimothy Arceri2018-02-101-2/+2
| | | | | | Previously the asserts did not take swizzles into account. Reviewed-by: Samuel Pitoiset <[email protected]>
* ac/nir: compute correct number of user SGPRs on GFX9Samuel Pitoiset2018-02-091-10/+29
| | | | | | | For merged shaders. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* ac: pass struct ac_llvm_context to emit_membar()Timothy Arceri2018-02-091-3/+3
| | | | | | | | Fixes segfault in piglit test: ./bin/arb_shader_image_load_store-shader-mem-barrier --quick -auto -fbo Reviewed-by: Marek Olšák <[email protected]>
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