| Commit message (Collapse) | Author | Age | Files | Lines |
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Reviewed-by: Timothy Arceri <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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This was the same between si and ac.
Reviewed-by: Timothy Arceri <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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This was unused.
v2: drop args.
Reviewed-by: Timothy Arceri <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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These get used in fair few places.
Reviewed-by: Timothy Arceri <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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This just avoids having two copies of these.
Reviewed-by: Timothy Arceri <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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This was duplicated between both drivers, share here.
Reviewed-by: Timothy Arceri <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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v2: fix silly typo
Cc: "17.2 17.3" <[email protected]>
Reviewed-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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This is needed for RADV to support explicit component packing.
This is also required to use the new NIR component splitting /
packing passes.
V2:
- add commponent packing support for interpolate_at* intrinsics
- improve store packing support when not all varyings are scalar
as spotted by Bas the store source was incorrectly offset.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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This restores performance for the drirc workaround, i.e.
KILL_IF does:
visible = src0 >= 0;
kill_flag &= visible; // accumulate kills
amdgcn_kill(wqm_vote(visible)); // kill fully dead quads only
And all helper pixels are killed at the end of the shader:
amdgcn_kill(kill_flag);
Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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This will be a new LLVM intrinsic and will also work nicely with
llvm.amdgcn.wqm.vote.
Reviewed-by: Nicolai Hähnle <[email protected]>
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We know that num_components will be > 0, but it doesn't.
Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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Fixes KHR-GL45.texture_swizzle.smoke and others on Vega.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102809
Cc: [email protected]
Reviewed-by: Marek Olšák <[email protected]>
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Vulkan CTS does not expect the value to be clamped (at least for D32),
and it makes a differences even though depth is in [0,1], due
to strict inequalities.
I couldn't find anything in the Vulkan spec about this, but the test
seemed to be copied from GL tests and the GL spec only specifies
clamping for fixed point formats. Hence I expect radeonsi to run into
this at some point as well, but given that they still have a usecase
with the Z16->Z32 promotion, I'll leave that for someone else to clean
up.
This at least fixes radv dEQP-VK.texture.shadow.* on VI.
Fixes: 0f9e32519bb 'ac/nir: clamp shadow texture comparison value on VI'
Reviewed-by: Dave Airlie <[email protected]>
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Fixes: 1bcb953e166 'radv: handle GFX9 1D textures'
Reviewed-by: Dave Airlie <[email protected]>
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Otherwise we just need to write them to the tf ring.
this seems to improve the tessellation demo on Bonarie
~2190->~2230 fps
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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Mirrors the vram path.
Fixes: d4ecc3c9299 'ac/nir: Add loading from LDS for merged GS.'
Reviewed-by: Dave Airlie <[email protected]>
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They don't take a single wave anymore and we need the barriers.
Fixes: 6bc42855f92 'radv: enable GS on GFX9'
Reviewed-by: Dave Airlie <[email protected]>
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Fixes: ffaf4d608a1 'radv: Enable tessellation shaders for GFX9.'
Reviewed-by: Dave Airlie <[email protected]>
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Expose the extension string as supported
Signed-off-by: Andres Rodriguez <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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It's redundant with nir_shader::info::stage.
Acked-by: Timothy Arceri <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Reviewed-by: Jordan Justen <[email protected]>
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Reviewed-by: Dave Airlie <[email protected]>
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Reviewed-by: Dave Airlie <[email protected]>
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Reviewed-by: Dave Airlie <[email protected]>
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[airlied: merged fixup + and fixed up a couple more bits].
Reviewed-by: Dave Airlie <[email protected]>
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Signed-off-by: Bas Nieuwenhuizen <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
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Reviewed-by: Samuel Pitoiset <[email protected]>
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Reviewed-by: Dave Airlie <[email protected]>
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Reviewed-by: Dave Airlie <[email protected]>
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Reviewed-by: Dave Airlie <[email protected]>
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To prevent VS/TCS collisions in merged shaders.
Reviewed-by: Dave Airlie <[email protected]>
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Reviewed-by: Dave Airlie <[email protected]>
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Reviewed-by: Dave Airlie <[email protected]>
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Reviewed-by: Dave Airlie <[email protected]>
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Reviewed-by: Dave Airlie <[email protected]>
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Reviewed-by: Dave Airlie <[email protected]>
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Needed for GFX9 merged shaders.
Reviewed-by: Dave Airlie <[email protected]>
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Reviewed-by: Dave Airlie <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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For Vulkan SPIR-V the spec states
fma() Inherited from OpFMul followed by OpFAdd.
Matt says the backend will do the right thing depending on the
hardware being compiled for, if you use the fmuladd intrinsic.
Using the Mad Max pts test, on high settings at 4K:
CHP: 55->60
HGDD: 46->50
LM: 55->60
No change on Stronghold.
Thanks to Feral for spending the time to track this down.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Cc: "17.2" <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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The hardware usually does this automatically. However, we upgrade
depth to Z32_FLOAT to enable TC-compatible HTILE, which means the
hardware no longer clamps the comparison value for us.
The only way to tell in the shader whether a clamp is required
seems to be to communicate an additional bit in the descriptor
table. While VI has some unused bits in the resource descriptor,
those bits have unfortunately all been used in gfx9. So we use
an unused bit in the sampler state instead.
Fixes dEQP-GLES3.functional.texture.shadow.2d.linear.equal_depth_component32f
and many other tests in dEQP-GLES3.functional.texture.shadow.*
Fixes: d4d9ec55c589 ("radeonsi: implement TC-compatible HTILE")
Reviewed-by: Marek Olšák <[email protected]>
Tested-by: Dieter Nützel <[email protected]>
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Avoid a v_cndmask: the absolute value is free due to input modifiers.
Reviewed-by: Marek Olšák <[email protected]>
Tested-by: Dieter Nützel <[email protected]>
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