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* radv: Work around non-renderable 128bpp compressed 3d textures on GFX9.Bas Nieuwenhuizen2018-12-201-2/+4
| | | | | | | | | | | Exactly what title says, the new addrlib does not allow the above with certain dimensions that the CTS seems to hit. Work around it by not allowing the app to render to it via compat with other 128bpp formats and do not render to it ourselves during copies. Fixes: 776b9113656 "amd/addrlib: update Mesa's copy of addrlib" Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* ac/surface: 3D and cube surfaces are never displayableNicolai Hähnle2018-12-191-3/+5
| | | | Reviewed-by: Marek Olšák <[email protected]>
* amd/addrlib: update Mesa's copy of addrlibNicolai Hähnle2018-11-291-2/+2
| | | | | | | | Update to the internal master as of 2018-11-15. This has a lot of gratuitous whitespace change, but on the plus side it's built using the same tooling that's used for AMDVLK, which should help going forward.
* ac/surface/gfx9: let addrlib choose the preferred swizzle kindNicolai Hähnle2018-11-291-18/+4
| | | | | | | | | Our choices here are simply redundant as long as sin.flags is set correctly. (v2: - remove unused function parameter) Reviewed-by: Marek Olšák <[email protected]>
* ac/surface: remove the overallocation workaround for Vega12Marek Olšák2018-11-091-4/+0
| | | | | | not needed anymore (probably since the tile_swizzle fix) Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi: add support for Raven2 (v2)Marek Olšák2018-10-301-0/+4
| | | | | | v2: fix enabling primitive binning Reviewed-by: Samuel Pitoiset <[email protected]>
* ac/surface: fix CMASK fast clear for NPOT textures with mipmapping on SI/CI/VIMarek Olšák2018-08-281-2/+2
| | | | | | | This fixes VM faults and corruption. Cc: 18.1 18.2 <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/surface: fix MSAA corruption on Vega due to FMASK tile swizzleMarek Olšák2018-07-311-1/+1
| | | | | | | a needle in the haystack? Cc: 18.1 <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: use storage_samples instead of color_samples in most placesMarek Olšák2018-07-311-3/+3
| | | | | | | and use pipe_resource::nr_storage_samples instead of r600_texture::num_color_samples. Tested-by: Dieter Nützel <[email protected]>
* radeonsi: add support for Vega20Marek Olšák2018-07-121-0/+4
| | | | Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: move CMASK size computation into ac_surfaceMarek Olšák2018-06-251-0/+61
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* ac/surface: move cmask_size/alignment into radeon_surfMarek Olšák2018-06-251-3/+3
| | | | | | cmask_size is changed to uint32_t because it can't be greater than 4GB. Reviewed-by: Timothy Arceri <[email protected]>
* ac/surface: disallow rotated micro tile modeMarek Olšák2018-06-211-2/+19
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/surface: Set compressZ for stencil-only surfaces.Bas Nieuwenhuizen2018-06-191-1/+1
| | | | | | | We HTILE compress stencil-only surfaces too. CC: 18.1 <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac/surface/gfx6: don't overallocate mipmapped HTILEMarek Olšák2018-05-241-2/+11
| | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/surface/gfx6: Don't force a tile index for fmask.Bas Nieuwenhuizen2018-05-231-1/+1
| | | | | | | | | | | | | | The bpe of the fmask often differs from the bpe of the main surface. On SI that means it has to get a different tile index. addrlib is capable of figuring this out itself, so just pass -1 instead to let it know that it is not preset. Fixes: 9bf3570fed0 "ac/surface/gfx6: compute FMASK together with the color surface" Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106511 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106499 Reviewed-by: Marek Olšák <[email protected]>
* ac/surface: Only align linear power of two fmt textures.Bas Nieuwenhuizen2018-05-201-2/+2
| | | | | | | | We're not sharing 32_32_32 formats between different GPUs, so we do not have to align for vega on pre-vega cards. Fixes: e361970ed73 "radv: Add support for IMG_DATA_FORMAT_32_32_32." Reviewed-by: Marek Olšák <[email protected]>
* radv: Add support for IMG_DATA_FORMAT_32_32_32.Bas Nieuwenhuizen2018-05-141-0/+4
| | | | | | | | | | Basic sampling support for linear tiling. No CTS regressions, but it seems the blitting coverage is not very extensive. https://bugs.freedesktop.org/show_bug.cgi?id=106331 Reviewed-by: Samuel Pitoiset <[email protected]>
* ac/surface: add EQAA supportMarek Olšák2018-05-101-2/+27
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/surface: unify common legacy and gfx9 fmask fieldsMarek Olšák2018-05-101-10/+10
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/surface/gfx6: compute FMASK together with the color surfaceMarek Olšák2018-05-101-12/+74
| | | | | | instead of invoking FMASK computation separately. Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/surface/gfx9: fix a typo in CMASK RB/pipe alignmentMarek Olšák2018-05-101-1/+1
| | | | | | No change in behavior because it's always aligned. Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/surface: handle DCC subresource fast clear restriction on VIMarek Olšák2018-04-271-1/+20
| | | | | | | v2: require the previous level to be clearable for determining whether the last unaligned level is clearable Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add support for VegaMMarek Olšák2018-04-181-0/+4
| | | | Acked-by: Nicolai Hähnle <[email protected]>
* ac/surface: Allow S swizzle for displayable surfaces.Bas Nieuwenhuizen2018-04-121-2/+5
| | | | | | | | | | | For dcn1 && < 64 bpp displayable surfaces, addrlib only accepts S swizzles. At the same time addrlib prefers D swizzles is allowed, so we can just allow S swizzles as fallback. Fixes: b64b712558 "ac/surface/gfx9: request desired micro tile mode explicitly" Reviewed-by: Marek Olšák <[email protected]>
* ac/surface: don't set the display flag for obviously unsupported cases (v2)Marek Olšák2018-04-101-4/+30
| | | | | | | This enables the tile swizzle for some cases of the displayable micro mode, and it also fixes an addrlib assertion failure on Vega. Reviewed-by: Michel Dänzer <[email protected]>
* ac/surface/gfx9: request desired micro tile mode explicitlyMarek Olšák2018-04-101-4/+16
| | | | Tested-by: Dieter Nützel <[email protected]>
* util: Move util_is_power_of_two to bitscan.h and rename to ↵Ian Romanick2018-03-291-1/+1
| | | | | | | | | | | util_is_power_of_two_or_zero The new name make the zero-input behavior more obvious. The next patch adds a new function with different zero-input behavior. Signed-off-by: Ian Romanick <[email protected]> Suggested-by: Matt Turner <[email protected]> Reviewed-by: Alejandro Piñeiro <[email protected]>
* ac/surface: set AddrSurfInfoIn.format = ADDR_FMT_8 for stencil, add assertionsMarek Olšák2018-03-281-0/+8
| | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105738 Tested-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: add support for Vega12Marek Olšák2018-03-281-7/+26
| | | | Reviewed-by: Alex Deucher <[email protected]>
* amd/addrlib: update to the latest version for Vega12Marek Olšák2018-03-281-1/+1
| | | | Reviewed-by: Alex Deucher <[email protected]>
* ac/surface: compute tile swizzle for GFX9Marek Olšák2018-03-211-2/+83
| | | | Tested-by: Dieter Nützel <[email protected]>
* ac/surface: always compute DCC info when DCC is possible on GFX9Marek Olšák2017-11-301-1/+0
| | | | | | The same code for VI doesn't check for scanout either. Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/surface: enable DCC computation for MSAAMarek Olšák2017-11-291-4/+2
| | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/surface: fix indentationNicolai Hähnle2017-11-281-1/+1
| | | | Reviewed-by: Marek Olšák <[email protected]>
* ac: change legacy_surf_level::slice_size to dword unitsMarek Olšák2017-11-271-1/+1
| | | | | | | | | The next commit will reduce the size even more. v2: typecast to uint64_t manually v3: add more typecasts, add asserts Reviewed-by: Nicolai Hähnle <[email protected]>
* amd/addrlib: update to latest versionMarek Olšák2017-11-081-24/+29
| | | | | | | | | | | | This uses C++11 initializer lists. I just overwrote all Mesa files with internal addrlib and discarded hunks that we should probably keep, but I might have missed something. The code depending on ADDR_AM_BUILD is removed. We can add it back next time if needed. Acked-by: Nicolai Hähnle <[email protected]>
* amd/common/gfx9: workaround DCC corruption more conservativelyNicolai Hähnle2017-10-231-7/+25
| | | | | | | | Fixes KHR-GL45.texture_swizzle.smoke and others on Vega. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102809 Cc: [email protected] Reviewed-by: Marek Olšák <[email protected]>
* ac/surface: add ac_surface::is_displayableMarek Olšák2017-10-121-0/+11
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/surface: handle error when choosing preferred swizzle modeNicolai Hähnle2017-09-211-2/+4
| | | | | | | CID: 1418140 Fixes: c4ac522511d2 ("ac/surface: handle S8 on gfx9") Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* ac/surface: handle S8 on gfx9Dave Airlie2017-09-201-2/+7
| | | | | | | | | | | | If we don't have a depth piece, we don't get a correct swizzle mode and we hit an assert in addrlib. In case of no depth get the preferrred swizzle mode for stencil alone. Reviewed-by: Marek Olšák <[email protected]> Cc: "17.2" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* ac/surface: match Z and stencil tile configNicolai Hähnle2017-09-131-7/+42
| | | | | | | Fixes various piglit tests on Stoney, see the comment. Cc: [email protected] Reviewed-by: Marek Olšák <[email protected]>
* ac/surface: sanity-check that we got a TC-compatible HTILE if requestedNicolai Hähnle2017-09-131-0/+6
| | | | Reviewed-by: Marek Olšák <[email protected]>
* ac/surface: add radeon_surf::has_stencil for convenienceMarek Olšák2017-09-071-0/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/surface/gfx9: don't allow DCC for the smallest mipmap levelsMarek Olšák2017-08-221-1/+18
| | | | | | This fixes garbage there if we don't flush TC L2 after rendering. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: properly handle imported textures with unexpected swizzle modeMarek Olšák2017-08-221-0/+5
| | | | | Cc: 17.2 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/surface: align DCC size for surfaces that use tile swizzleMarek Olšák2017-08-041-2/+9
| | | | | | | | Note that dcc_alignment = pipe_interleave_bytes * num_pipes * num_banks, which is greater than the previous open-coded alignment. Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/surface: limit tile swizzle to non-mipmaps on SIMarek Olšák2017-08-041-1/+3
| | | | | | | Mipmapping with tile swizzle doesn't work. Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/surface: enable tile swizzle for mipmapped texturesMarek Olšák2017-08-041-34/+46
| | | | | | | | | | | The tile swizzle computation was done after the whole miptree was computed, but that was too late, because at that point AddrSurfInfoOut contained information about the smallest miplevel, which is never 2D-tiled. The correct way is to do the computation before the second level is computed. Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/surface: set structure size and handle errors for AddrComputeBaseSwizzleMarek Olšák2017-08-041-1/+8
| | | | | Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
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