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* amdgpu/addrlib: add dccRamSizeAligned output flagXavi Zhang2017-03-302-1/+7
* amdgpu/addrlib: Change comment alignmentNicolai Hähnle2017-03-301-12/+12
* amdgpu/addrlib: style changes and minor cleanupsNicolai Hähnle2017-03-3011-84/+82
* amdgpu/addrlib: AddrLib inheritance refactorNicolai Hähnle2017-03-309-560/+675
* amdgpu/addrlib: rearrange code in preparation of refactoringNicolai Hähnle2017-03-304-3528/+3593
* amdgpu/addrlib: add disableLinearOpt flagXavi Zhang2017-03-303-3/+8
* amdgpu/addrlib: Add GetMaxAlignmentsXavi Zhang2017-03-308-1/+184
* amdgpu/addrlib: Let Kaveri go general stereo right eye offset padding pathXavi Zhang2017-03-304-54/+41
* amdgpu/addrlib: Rewrite tile mode optmization codeXavi Zhang2017-03-305-24/+50
* amdgpu/addrlib: Add a flag "tcCompatible" to surface info output structure.Carlos Xiong2017-03-303-15/+50
* amdgpu/addrlib: Make comments shorterXavi Zhang2017-03-301-47/+29
* amdgpu/addrlib: add new flag nonSplitXiaoYuan Zheng2017-03-302-2/+3
* amdgpu/addrlib: allow tileSplitBytes greater than row sizeXiao-Tao Zai2017-03-301-1/+1
* amdgpu/addrlib: Change to compute TC compatible stencil infoCarlos Xiong2017-03-302-65/+59
* amdgpu/addrlib: rename SiAddrLib/CiAddrLib to match internal spellingNicolai Hähnle2017-03-304-149/+149
* radeonsi: add Polaris12 support (v3)Junwei Zhang2016-12-212-1/+3
* amd/addrlib: limit fastcall/regparm to GCC i386Emil Velikov2016-11-091-1/+5
* amd/addrlib: move addrlib from amdgpu winsys to common codeDave Airlie2016-09-0619-0/+21745
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