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* amdgpu/addrlib: add new flag nonSplitXiaoYuan Zheng2017-03-301-1/+1
| | | | | Flag tcCompatible has different usage in CI and VI. Add a new flag "nonSplit" for CI.
* amdgpu/addrlib: allow tileSplitBytes greater than row sizeXiao-Tao Zai2017-03-301-1/+1
| | | | | | | Carrizo row size is 1K, while tileSplitBytes is 2K for a 4xAA 32bpp depth surface. Remove the sanity check that tileSplitBytes must be greater than row size. There could be performance loss but may be covered by non-split depth which enables tc-compatible read.
* amdgpu/addrlib: Change to compute TC compatible stencil infoCarlos Xiong2017-03-301-65/+57
| | | | | | | | | | | | Change the logic to compute tc compatible stencil info via depth's tileIndex instead of using depth's tileInfo. So the clients can get the stencil's tileInfo computed from macroModeTable. If the stencil tileInfo is same as depth tileInfo, then stencil is tc compatible; otherwise, stencil is not tc compatible. The current suggestion is to create another stencil buffer with the tc compatible tileInfo, use depth-to-color copy to decompress and tile convert the rendered stencil to tc compoatible stencil (And use the new stencil buffer to program TC).
* amdgpu/addrlib: rename SiAddrLib/CiAddrLib to match internal spellingNicolai Hähnle2017-03-304-149/+149
| | | | Signed-off-by: Nicolai Hähnle <[email protected]>
* radeonsi: add Polaris12 support (v3)Junwei Zhang2016-12-212-1/+3
| | | | | | | | | | | v2: use gfxip names for llvm 4.0+ v3: use tonga for llvm <= 3.8, drop gfxip name, we can just change that we change the other asics. Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Junwei Zhang <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Acked-by: Christian König <[email protected]>
* amd/addrlib: move addrlib from amdgpu winsys to common codeDave Airlie2016-09-067-0/+10142
Acked-by: Marek Olšák <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>