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path: root/src/amd/addrlib/core
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* amd: remove always-true BRAHMA_BUILD defineEric Engestrom2017-12-011-13/+2
* amd/addrlib: update to latest versionMarek Olšák2017-11-087-270/+254
* amd/addrlib: add Addr2IsValidDisplaySwizzleModeMarek Olšák2017-10-121-0/+7
* amd/addrlib: fix missing va_end() after va_copy()Nicolai Hähnle2017-09-211-6/+2
* ac/addrlib: enable assertions in debug buildsNicolai Hähnle2017-09-131-9/+17
* amd/addrlib: fix typo in api name.Dave Airlie2017-07-172-4/+4
* amd/addrlib: second update for Vega10 + bug fixesMarek Olšák2017-04-048-1772/+605
* amd/addrlib: fix optimized build warningsGrazvydas Ignotas2017-04-031-1/+1
* amd/addrlib: import gfx9 supportNicolai Hähnle2017-03-305-1/+4360
* amd/addrlib: Not all ETC2 formats are 128bpp... add new ETC2 formats to diffe...Kevin Furrow2017-03-302-19/+43
* amd/addrlib: Fix selection of swizzle modes for 3D compressed images.Kevin Furrow2017-03-301-1/+2
* amd/addrlib: Add support for ETC2 and ASTC formats.Kevin Furrow2017-03-302-1/+105
* amdgpu/addrlib: Seperate 2 dcc related workarounds by different flagsNicolai Hähnle2017-03-301-0/+2
* amdgpu/addrlib: Fix the issue that tcCompatible HTILE slice size is not calcu...Nicolai Hähnle2017-03-301-0/+16
* amdgpu/addrlib: add matchStencilTileCfg and tcCompatible fixesXavi Zhang2017-03-301-5/+14
* amdgpu/addrlib: do some tile mode conversions to display surfaceFrans Gu2017-03-301-2/+3
* amdgpu/addrlib: Add new flags minimizePadding and maxBaseAlignFrans Gu2017-03-302-50/+180
* amdgpu/addrlib: Always returns pixelPitch in original pixelsXavi Zhang2017-03-301-14/+10
* amdgpu/addrlib: fix crash on allocation failureSabre Shao2017-03-303-34/+27
* amdgpu/addrlib: support non-power2 height alignment (for linear surface)Roy Zhan2017-03-301-1/+10
* amdgpu/addrlib: Pad pitch to multiples of 256 for DCC surface on FijiNicolai Hähnle2017-03-302-11/+11
* amdgpu/addrlib: Fix number of //Xavi Zhang2017-03-303-30/+30
* amdgpu/addrlib: Cleanup.Nicolai Hähnle2017-03-309-44/+38
* amdgpu/addrlib: Use namespacesXavi Zhang2017-03-309-483/+517
* amdgpu/addrlib: Adjust 99 "*" to 100 "*" alignmentKevin Zhao2017-03-309-293/+293
* amdgpu/addrlib: Add a new tile mode ADDR_TM_UNKNOWNFrans Gu2017-03-302-12/+31
* amdgpu/addrlib: Stylish cleanup.Xavi Zhang2017-03-305-17/+16
* amdgpu/addrlib: fix pixel index calculation of thick micro tilingXavi Zhang2017-03-301-4/+4
* amdgpu/addrlib: add equation generationNicolai Hähnle2017-03-305-15/+266
* amdgpu/addrlib: rename ComputeSurfaceThickness to ThicknessNicolai Hähnle2017-03-302-9/+9
* amdgpu/addrlib: add define HAVE_TSERVERXavi Zhang2017-03-301-1/+1
* amdgpu/addrlib: Add new interface to support macro mode index queryFrans Gu2017-03-302-0/+41
* amdgpu/addrlib: add explicit Log2NonPow2 functionRoy Zhan2017-03-301-8/+20
* amdgpu/addrlib: add ADDR_ANALYSIS_ASSUMENicolai Hähnle2017-03-301-8/+18
* amdgpu/addrlib: add tcCompatible htile addr from coordinate support.XiaoYuan Zheng2017-03-302-12/+27
* amdgpu/addrlib: Add a member "bpp" for input of method AddrConvertTileIndex a...Nicolai Hähnle2017-03-302-18/+21
* amdgpu/addrlib: style changes and minor cleanupsNicolai Hähnle2017-03-303-29/+23
* amdgpu/addrlib: AddrLib inheritance refactorNicolai Hähnle2017-03-303-526/+641
* amdgpu/addrlib: rearrange code in preparation of refactoringNicolai Hähnle2017-03-304-3528/+3593
* amdgpu/addrlib: add disableLinearOpt flagXavi Zhang2017-03-302-2/+6
* amdgpu/addrlib: Add GetMaxAlignmentsXavi Zhang2017-03-302-0/+39
* amdgpu/addrlib: Rewrite tile mode optmization codeXavi Zhang2017-03-303-20/+32
* amdgpu/addrlib: Add a flag "tcCompatible" to surface info output structure.Carlos Xiong2017-03-301-0/+1
* amdgpu/addrlib: Change to compute TC compatible stencil infoCarlos Xiong2017-03-301-0/+2
* amd/addrlib: move addrlib from amdgpu winsys to common codeDave Airlie2016-09-067-0/+7555
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