| Commit message (Collapse) | Author | Age | Files | Lines |
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Update to the internal master as of 2018-11-15.
This has a lot of gratuitous whitespace change, but on the plus
side it's built using the same tooling that's used for AMDVLK,
which should help going forward.
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Only used, when asserts are enabled.
Fixes an unused-but-set-variable warning with GCC 8:
../../../src/amd/addrlib/addrinterface.cpp: In function 'int ElemGetExportNorm(ADDR_HANDLE, const ELEM_GETEXPORTNORM_INPUT*)':
../../../src/amd/addrlib/addrinterface.cpp:835:23: warning: variable 'returnCode' set but not used [-Wunused-but-set-variable]
ADDR_E_RETURNCODE returnCode = ADDR_OK;
^~~~~~~~~~
Signed-off-by: Kai Wasserbäch <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Alex Deucher <[email protected]>
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This uses C++11 initializer lists.
I just overwrote all Mesa files with internal addrlib and discarded
hunks that we should probably keep, but I might have missed something.
The code depending on ADDR_AM_BUILD is removed. We can add it back next
time if needed.
Acked-by: Nicolai Hähnle <[email protected]>
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Some "standard" (_S) swizzle modes are displayable on Raven,
even though the micro tile mode says it's not displayable.
Expose the addrlib function to the driver.
Reviewed-by: Nicolai Hähnle <[email protected]>
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This fixes the misspelling of ALIGNMENTS in addrlib.
Reviewed-by: Eduardo Lima Mitev <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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Highlights:
- Display needs tiled pitch alignment to be at least 32 pixels
- Implement Addr2ComputeDccAddrFromCoord().
- Macro-pixel packed formats don't support Z swizzle modes
- Pad pitch and base alignment of PRT + TEX1D to 64KB.
- Fix support for multimedia formats
- Fix a case "PRT" entries are not selected on SI.
- Fix wrong upper bits in equations for 3D resource.
- We can't support 2d array slice rotation in gfx8 swizzle pattern
- Set base alignment for PRT + non-xor swizzle mode resource to 64KB.
- Bug workaround for Z16 4x/8x and Z32 2x/4x/8x MSAA depth texture
- Add stereo support
- Optimize swizzle mode selection
- Report pitch and height in pixels for each mip
- Adjust bpp/expandX for format ADDR_FMT_GB_GR/ADDR_FMT_BG_RG
- Correct tcCompatible flag output for mipmap surface
- Other fixes and cleanups
Acked-by: Alex Deucher <[email protected]>
Acked-by: Nicolai Hähnle <[email protected]>
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This partially reverts commit 8a74140a21fe6b0d2e8a60b065b890f797f2db51.
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Find ^/{80,99}$ and replace them to 100 "/"
Signed-off-by: Nicolai Hähnle <[email protected]>
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Signed-off-by: Nicolai Hähnle <[email protected]>
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Signed-off-by: Nicolai Hähnle <[email protected]>
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Signed-off-by: Nicolai Hähnle <[email protected]>
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Add one more abstraction layer into inheritance system.
Signed-off-by: Nicolai Hähnle <[email protected]>
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Acked-by: Marek Olšák <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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