| Commit message (Collapse) | Author | Age | Files | Lines |
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Highlights:
- Display needs tiled pitch alignment to be at least 32 pixels
- Implement Addr2ComputeDccAddrFromCoord().
- Macro-pixel packed formats don't support Z swizzle modes
- Pad pitch and base alignment of PRT + TEX1D to 64KB.
- Fix support for multimedia formats
- Fix a case "PRT" entries are not selected on SI.
- Fix wrong upper bits in equations for 3D resource.
- We can't support 2d array slice rotation in gfx8 swizzle pattern
- Set base alignment for PRT + non-xor swizzle mode resource to 64KB.
- Bug workaround for Z16 4x/8x and Z32 2x/4x/8x MSAA depth texture
- Add stereo support
- Optimize swizzle mode selection
- Report pitch and height in pixels for each mip
- Adjust bpp/expandX for format ADDR_FMT_GB_GR/ADDR_FMT_BG_RG
- Correct tcCompatible flag output for mipmap surface
- Other fixes and cleanups
Acked-by: Alex Deucher <[email protected]>
Acked-by: Nicolai Hähnle <[email protected]>
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This partially reverts commit 8a74140a21fe6b0d2e8a60b065b890f797f2db51.
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Find ^/{80,99}$ and replace them to 100 "/"
Signed-off-by: Nicolai Hähnle <[email protected]>
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Signed-off-by: Nicolai Hähnle <[email protected]>
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Signed-off-by: Nicolai Hähnle <[email protected]>
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Signed-off-by: Nicolai Hähnle <[email protected]>
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Add one more abstraction layer into inheritance system.
Signed-off-by: Nicolai Hähnle <[email protected]>
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Acked-by: Marek Olšák <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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