| Commit message (Collapse) | Author | Age | Files | Lines |
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Commit bfc4c359b282 ("drm/i915/cml: Add Missing PCI IDs") in i915
added 3 new CML PCI ids.
Signed-off-by: Lionel Landwerlin <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
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Fixes: 82f6a746e8 ("intel: Add support for Comet Lake")
Signed-off-by: Lionel Landwerlin <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
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Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
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trivial and urgent
Cc: 19.2 <[email protected]>
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trivial and urgent
Cc: 19.2 <[email protected]>
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Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Lionel Landwerlin <[email protected]>
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Documentation list all of those as "UHD".
Signed-off-by: Lionel Landwerlin <[email protected]>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111629
BSpec: 33266
Acked-by: Tapani Pälli <[email protected]>
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This adds the ability for intel devices that:
* Only load on i965
* Only load on iris
* First attempt i965, and try iris next
* First attempt iris, and try i965 next
Signed-off-by: Jordan Justen <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
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Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
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Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
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Acked-by: Bas Nieuwenhuizen <[email protected]>
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Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Lionel Landwerlin <[email protected]>
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it's the same design
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According to Intel website [1], the description of chipset 8086:3E98 is
Intel(R) UHD Graphics 630. Besides, xserver also mentions it as
"Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)" in commit d3a26bbf
(DRI2: Add another Coffeelake PCI ID) [2].
This patch modifies the description to sync with xserver.
[1]: https://ark.intel.com/content/www/us/en/ark/products/134896/intel-core-i5-9600k-processor-9m-cache-up-to-4-60-ghz.html
[2]: https://gitlab.freedesktop.org/xorg/xserver/commit/d3a26bbf618507e1ca05b2bc99a880075b77db77
Fixes: commit 44f1dcf9b3fd "i965: Add a new CFL PCI ID."
Signed-off-by: Jian-Hong Pan <[email protected]>
Reviewed-by: Sagar Ghuge <[email protected]>
Reviewed-by: Anuj Phogat [email protected]
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Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Jordan Justen <[email protected]>
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Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Lionel Landwerlin <[email protected]>
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This commit introduces a new Gallium driver for Intel Gen8+ GPUs,
named 'iris_dri.so' after the hardware.
Developed by:
- Kenneth Graunke (overall driver)
- Dave Airlie (shaders, conditional render, overflow query, Gen8 port)
- Chris Wilson (fencing, pinned memory, ...)
- Jordan Justen (compute shaders)
- Jason Ekstrand (image load store)
- Caio Marcelo de Oliveira Filho (tessellation control passthrough)
- Rafael Antognolli (auxiliary buffer fixes)
- The rest of the i965 contributors and the Mesa community
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Align with kernel commits:
5e0f5a58b167 ("drm/i915/cfl: Adding another PCI Device ID.")
03ca3cf8e9aa ("drm/i915/icl: Adding few more device IDs for Ice Lake")
Cc: José Roberto de Souza <[email protected]>
Cc: Kenneth Graunke <[email protected]>
Cc: Anuj Phogat <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
Reviewed-by: Lionel Landwerlin <[email protected]>
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Reviewed-by: Samuel Pitoiset <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Cc: [email protected]
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Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Cc: [email protected]
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Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Cc: [email protected]
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See commit c0c46ca461f136a0ae1ed69da6c874e850aeeb53 in the Linux kernel,
where José Roberto de Souza added this new PCI ID there.
Reviewed-by: Jordan Justen <[email protected]>
Reviewed-by: Rodrigo Vivi <[email protected]>
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Whiskey Lake uses the same gen graphics as Coffe Lake, including some
ids that were previously marked as reserved on Coffe Lake, but that
now are moved to WHL page.
This follows the ids and approach used on kernel's commit
b9be78531d27 ("drm/i915/whl: Introducing Whiskey Lake platform")
and commit c1c8f6fa731b ("drm/i915: Redefine some Whiskey Lake SKUs")
v2: Lionel noticed that GT{1,2,3} on kernel wasn't following
spec when looking to number of EUs, so kernel has been updated.
Cc: Lionel Landwerlin <[email protected]>
Cc: José Roberto de Souza <[email protected]>
Cc: Anuj Phogat <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
Reviewed-by: Lionel Landwerlin <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Cc: [email protected]
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No changes here compared to Raven.
Reviewed-by: Marek Olšák <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Kenneth Feng <[email protected]>
Signed-off-by: Huang Rui <[email protected]>
Cc: 18.1 18.2 <[email protected]>
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Amber Lake uses the same gen graphics as Kaby Lake, including a id
that were previously marked as reserved on Kaby Lake, but that
now is moved to AML page.
This follows the ids and approach used on kernel's commit
e364672477a1 ("drm/i915/aml: Introducing Amber Lake platform")
Reported-by: Timo Aaltonen <[email protected]>
Cc: José Roberto de Souza <[email protected]>
Cc: Anuj Phogat <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
Reviewed-by: Lionel Landwerlin <[email protected]>
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One more CFL ID added to spec.
Align with kernel commit d0e062ebb3a4 ("drm/i915/cfl:
Add a new CFL PCI ID.")
Cc: José Roberto de Souza <[email protected]>
Cc: Anuj Phogat <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
Reviewed-by: Lionel Landwerlin <[email protected]>
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Reviewed-by: Alex Deucher <[email protected]>
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v2: Branding changed
Signed-off-by: Matt Atwood <[email protected]>
Reviewed-by: Rafael Antognolli <[email protected]>
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Acked-by: Nicolai Hähnle <[email protected]>
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Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Matt Turner <[email protected]>
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Reviewed-by: Alex Deucher <[email protected]>
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Reviewed-by: Rafael Antognolli <[email protected]>
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Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Jordan Justen <[email protected]>
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Signed-off-by: Anuj Phogat <[email protected]>
Acked-by: Kenneth Graunke <[email protected]>
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More Coffee Lake PCI IDs have been added to the spec.
Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Rodrigo Vivi <[email protected]>
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Reviewed-by: Alex Deucher <[email protected]>
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drm-intel is in favor of keeping the unused pci-id's which
are still listed in the h/w specs. To keep it uniform
across multiple gfx stack components, I'm reverting below
Mesa patches:
b2dae9f8fd310c19e66b161a7ee9845af78f73e0
ebc5ccf3cc88990248695e833d9ff11e10d91240.
Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Rodrigo Vivi <[email protected]>
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I missed this one in Mesa commit ebc5ccf.
Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Matt Turner <[email protected]>
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Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Matt Turner <[email protected]>
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Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Matt Turner <[email protected]>
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Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Matt Turner <[email protected]>
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These PCI IDs are not used in any Kabylake SKUs.
Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Matt Turner <[email protected]>
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Coffee Lake has a gen9 graphics following KBL.
From 3D perspective, CFL is a clone of KBL/SKL features.
v2: Change commit message, correct alignment <Anuj Phogat>
v3: Update IDs.
v4: Initialize l3_banks, correct nomenclature <Anuj>
Cc: Rodrigo Vivi <[email protected]>
Signed-off-by: Anusha Srivatsa <[email protected]>
Acked-by: Benjamin Widawsky <[email protected]>
Reviewed-by: Anuj Phogat <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Cc: 17.0 17.1 <[email protected]>
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v2 (Anuj):
Rebased on master and updated pci ids
Remove redundant initialization of max_wm_threads to 64 * 12.
For gen9+ max_wm_threads are initialized in gen_get_device_info().
v3 (Anuj):
Move the patch to end of series.
Remove unused gt1, gt2, gt3 functions.
Remove l3_banks variable. Variable is now available on master.
Signed-off-by: Anuj Phogat <[email protected]>
Signed-off-by: Ben Widawsky <[email protected]>
Reviewed-by: Anuj Phogat <[email protected]>
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Cc: 17.1 <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
Cc: 17.1 <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Reviewed-by: Christian König <[email protected]>
Cc: 13.0 17.0 <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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