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* intel: Fix the description of Coffeelake pci-id 0x3E98Jian-Hong Pan2019-04-101-1/+1
| | | | | | | | | | | | | | | | | According to Intel website [1], the description of chipset 8086:3E98 is Intel(R) UHD Graphics 630. Besides, xserver also mentions it as "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)" in commit d3a26bbf (DRI2: Add another Coffeelake PCI ID) [2]. This patch modifies the description to sync with xserver. [1]: https://ark.intel.com/content/www/us/en/ark/products/134896/intel-core-i5-9600k-processor-9m-cache-up-to-4-60-ghz.html [2]: https://gitlab.freedesktop.org/xorg/xserver/commit/d3a26bbf618507e1ca05b2bc99a880075b77db77 Fixes: commit 44f1dcf9b3fd "i965: Add a new CFL PCI ID." Signed-off-by: Jian-Hong Pan <[email protected]> Reviewed-by: Sagar Ghuge <[email protected]> Reviewed-by: Anuj Phogat [email protected]
* intel: Add support for Comet LakeAnuj Phogat2019-04-011-0/+18
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* intel: Add Elkhart Lake PCI-IDsAnuj Phogat2019-03-271-0/+4
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* iris: Initial commit of a new 'iris' driver for Intel Gen8+ GPUs.Kenneth Graunke2019-02-211-4/+6
| | | | | | | | | | | | | | | This commit introduces a new Gallium driver for Intel Gen8+ GPUs, named 'iris_dri.so' after the hardware. Developed by: - Kenneth Graunke (overall driver) - Dave Airlie (shaders, conditional render, overflow query, Gen8 port) - Chris Wilson (fencing, pinned memory, ...) - Jordan Justen (compute shaders) - Jason Ekstrand (image load store) - Caio Marcelo de Oliveira Filho (tessellation control passthrough) - Rafael Antognolli (auxiliary buffer fixes) - The rest of the i965 contributors and the Mesa community
* intel: Add more PCI Device IDs for Coffee Lake and Ice Lake.Rodrigo Vivi2019-02-041-0/+5
| | | | | | | | | | | | | Align with kernel commits: 5e0f5a58b167 ("drm/i915/cfl: Adding another PCI Device ID.") 03ca3cf8e9aa ("drm/i915/icl: Adding few more device IDs for Ice Lake") Cc: José Roberto de Souza <[email protected]> Cc: Kenneth Graunke <[email protected]> Cc: Anuj Phogat <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* i965: Add PCI IDs for new Amberlake parts that are Coffeelake basedKenneth Graunke2018-10-151-2/+3
| | | | | | | | See commit c0c46ca461f136a0ae1ed69da6c874e850aeeb53 in the Linux kernel, where José Roberto de Souza added this new PCI ID there. Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]>
* intel: Introducing Whiskey Lake platformRodrigo Vivi2018-10-111-5/+5
| | | | | | | | | | | | | | | | | | | Whiskey Lake uses the same gen graphics as Coffe Lake, including some ids that were previously marked as reserved on Coffe Lake, but that now are moved to WHL page. This follows the ids and approach used on kernel's commit b9be78531d27 ("drm/i915/whl: Introducing Whiskey Lake platform") and commit c1c8f6fa731b ("drm/i915: Redefine some Whiskey Lake SKUs") v2: Lionel noticed that GT{1,2,3} on kernel wasn't following spec when looking to number of EUs, so kernel has been updated. Cc: Lionel Landwerlin <[email protected]> Cc: José Roberto de Souza <[email protected]> Cc: Anuj Phogat <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel: Introducing Amber Lake platformRodrigo Vivi2018-08-311-1/+2
| | | | | | | | | | | | | | | Amber Lake uses the same gen graphics as Kaby Lake, including a id that were previously marked as reserved on Kaby Lake, but that now is moved to AML page. This follows the ids and approach used on kernel's commit e364672477a1 ("drm/i915/aml: Introducing Amber Lake platform") Reported-by: Timo Aaltonen <[email protected]> Cc: José Roberto de Souza <[email protected]> Cc: Anuj Phogat <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* i965: Add a new CFL PCI ID.Rodrigo Vivi2018-08-141-0/+1
| | | | | | | | | | | | One more CFL ID added to spec. Align with kernel commit d0e062ebb3a4 ("drm/i915/cfl: Add a new CFL PCI ID.") Cc: José Roberto de Souza <[email protected]> Cc: Anuj Phogat <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* Intel: Add a Kaby Lake PCI IDMatt Atwood2018-04-251-0/+1
| | | | | | | v2: Branding changed Signed-off-by: Matt Atwood <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* Add more Coffee Lake brand stringsAnuj Phogat2018-04-051-2/+2
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* intel: Add a Ice Lake PCI IDsAnuj Phogat2018-03-221-0/+8
| | | | Reviewed-by: Rafael Antognolli <[email protected]>
* intel: Add Coffee Lake brand stringsAnuj Phogat2018-02-081-3/+3
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* intel: Add Geminilake brand stringsAnuj Phogat2018-01-221-2/+2
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* intel: Add more Coffee Lake PCI IDsAnuj Phogat2018-01-111-1/+9
| | | | | | | More Coffee Lake PCI IDs have been added to the spec. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]>
* Revert "intel: Remove unused Kabylake pci idsAnuj Phogat2017-09-211-0/+8
| | | | | | | | | | | | drm-intel is in favor of keeping the unused pci-id's which are still listed in the h/w specs. To keep it uniform across multiple gfx stack components, I'm reverting below Mesa patches: b2dae9f8fd310c19e66b161a7ee9845af78f73e0 ebc5ccf3cc88990248695e833d9ff11e10d91240. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]>
* intel: Remove unused Kabylake pci idAnuj Phogat2017-09-111-1/+0
| | | | | | | I missed this one in Mesa commit ebc5ccf. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* intel: Add brand string for KBL-RAnuj Phogat2017-09-061-1/+1
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* intel: Change a KBL pci id to GT2 from GT1.5Anuj Phogat2017-09-061-1/+1
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* intel: Fix few KBL brand stringsAnuj Phogat2017-09-061-2/+2
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* intel: Remove unused Kabylake pci idsAnuj Phogat2017-09-061-7/+0
| | | | | | | These PCI IDs are not used in any Kabylake SKUs. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/CFL: Add PCI Ids for Coffee Lake.Anusha Srivatsa2017-06-221-0/+11
| | | | | | | | | | | | | | Coffee Lake has a gen9 graphics following KBL. From 3D perspective, CFL is a clone of KBL/SKL features. v2: Change commit message, correct alignment <Anuj Phogat> v3: Update IDs. v4: Initialize l3_banks, correct nomenclature <Anuj> Cc: Rodrigo Vivi <[email protected]> Signed-off-by: Anusha Srivatsa <[email protected]> Acked-by: Benjamin Widawsky <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965/cnl: Add a preliminary device for CannonlakeBen Widawsky2017-06-091-0/+12
| | | | | | | | | | | | | | | | v2 (Anuj): Rebased on master and updated pci ids Remove redundant initialization of max_wm_threads to 64 * 12. For gen9+ max_wm_threads are initialized in gen_get_device_info(). v3 (Anuj): Move the patch to end of series. Remove unused gt1, gt2, gt3 functions. Remove l3_banks variable. Variable is now available on master. Signed-off-by: Anuj Phogat <[email protected]> Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965: Add Kaby Lake brandstringsBen Widawsky2017-03-021-10/+10
| | | | | | | | While here, use the spacing defined in Ark. https://ark.intel.com/products/codename/82879/Kaby-Lake Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Ben Widawsky <[email protected]>
* i965: Fix KBL typo in stringBen Widawsky2016-11-151-1/+1
| | | | | | Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/glk: Add basic Geminilake supportBen Widawsky2016-11-151-0/+2
| | | | | | | | | | v2: s/bdw/gen; Add the 2x6 config v3: Add min_ds_entries Cc: "13.0" <[email protected]> Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Reorder PCI ID list to match release orderBen Widawsky2016-10-201-9/+9
| | | | | | | I have some OCD... Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* i965: Add some APL and KBL SKU stringsBen Widawsky2016-10-201-4/+4
| | | | | | | We got a couple for products that exist on ark.intel.com, so let's just put them in now. Signed-off-by: Ben Widawsky <[email protected]>
* i965: Removing PCI IDs that are no longer listed as Kabylake.Rodrigo Vivi2016-06-291-5/+0
| | | | | | | | | | | | | | | | This is unusual. Usually IDs listed on early stages of platform definition are kept there as reserved for later use. However these IDs here are not listed anymore in any of steppings and devices IDs tables for Kabylake on configurations overview section of BSpec. So it is better removing them before they become used in any other future platform. Reviewed-by: Dhinakaran Pandiyan <[email protected]> Acked-by: Kenneth Graunke <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]>
* i956: Add more Kabylake PCI IDs.Rodrigo Vivi2016-06-291-0/+3
| | | | | | | | The spec has been updated adding new PCI IDs. Reviewed-by: Dhinakaran Pandiyan <[email protected]> Acked-by: Kenneth Graunke <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]>
* i965/bxt: Add 2x6 variantBen Widawsky2016-05-261-0/+2
| | | | | | Cc: [email protected] Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* i965/chv: Display proper brandingBen Widawsky2016-03-111-2/+2
| | | | | | | | | | | | | | | | | | | | | | "Braswell" is a Cherryview based *thing*. It unfortunately requires extra information to determine its marketing name. Unlike all previous products, and hopefully all future ones, there is no unique 1:1 mapping of PCI device ID to brand string. I put up a fight about adding any complexity to our GL renderer string code for a very long time. However, a wise man made a comment to me that I couldn't argue with: if a user installs Windows on their hardware, the brand string should be the same as what we display in Linux. The Windows driver apparently does this check, so we should too. Note that I did manage to find a good use for this info anyway in the compute shader thread counts. v2: memcpy instead of strncpy, and some minor changes (Matt) Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Jordan Justen <[email protected]
* i965/skl: Update Skylake renderer stringsBen Widawsky2016-02-171-9/+9
| | | | | | | | | | Also adds some of the Iris/Pro parts which we previously didn't have named. v2: 0x192d is gt3, not gt4 Adding some 'e' tags for eDRAM parts Signed-off-by: Ben Widawsky <[email protected]> Acked-by: Michał Winiarski <[email protected]>
* i965/skl: Add two missing device IDsBen Widawsky2016-02-171-0/+2
| | | | | | | | | | | | The Iris part is left unbranded because we did not have these with original SKL. v2: 0x192d is gt3, not gt4 v3: Forgot to update the temporary brand string when I did v2. Cc: "11.0 11.1" <[email protected] Signed-off-by: Ben Widawsky <[email protected]> Acked-by: Michał Winiarski <[email protected]>
* mesa: Add KBL PCI IDs and platform information.Sarah Sharp2016-01-061-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | Add PCI IDs for the Intel Kabylake platforms. The IDs are taken directly from the Linux kernel patches, which are under review: http://lists.freedesktop.org/archives/intel-gfx/2015-October/078967.html http://cgit.freedesktop.org/~vivijim/drm-intel/log/?h=kbl-upstream-v2 The Kabylake PCI IDs taken from the kernel are rearranged to be in order of GT type, then PCI ID. Please note that if this patch is backported, the following fixes will need to be added before this patch: commit 28ed1e08e8ba98e "i965/skl: Remove early platform support" commit c1e38ad37042b0e "i965/skl: Use larger URB size where available." Thanks to Ben for fixing a bug around setting urb.size, and being patient with my questions about what the various fields mean. Signed-off-by: Sarah Sharp <[email protected]> Suggested-by: Ben Widawsky <[email protected]> Tested-by: Rodrigo Vivi <[email protected]> (KBL-GT2) Cc: "11.1" <[email protected]>
* i965/skl: PCI ID cleanup and brand stringsBen Widawsky2015-11-031-15/+19
| | | | | | | | | | | | A few new PCI ids are added here, and one is removed (0x190B) because it no longer seems to exist anywhere. v2-4: Only use ascii characters (Ilia) 0x1921 is no longer marked as f Reviewed-by: Jordan Justen <[email protected]> Signed-off-by: Ben Widawsky <[email protected]>
* i965/skl: Add GT4 PCI IDsBen Widawsky2015-11-031-0/+4
| | | | | | | | | | | | | | | | | | | | Like other gen8+ hardware, the hardware automatically scales up thread counts. We must be careful about the URB sizes since GT4 adds another slice. One of the existing PCI IDs is actually mislabeled as GT3. Arguably this is a real bug since the URB size will be wrong. Because this patch is simply meant to add the missing IDs, that will be fixed in a later patch. v2: No longer relevant. v3: Update the wm thread count to support GT4. The WM thread count is used to determine the maximum scratch space required. Currently the code always allocates the maximum amount even though lower GT SKUs require less. The formula is threads_per_psd * subslices_per_slice * slices Cc: [email protected] Reviewed-by: Jordan Justen <[email protected]> Signed-off-by: Ben Widawsky <[email protected]>
* i965/bxt: Add basic Broxton infrastructureBen Widawsky2015-06-241-0/+3
| | | | | | | | | | | | | | | | | The thread counts and URB information are all speculative numbers that were based on some CHV numbers at the time. v2: Originally this patch had PCI IDs. I've moved that to a new patch at the end of the series. Remove is_cherryview hack. Add PCI ids. These match the ones defined in the kernel. The only one tested by us is 0x0a84. Capitalize the hex string (Mark) Signed-off-by: Ben Widawsky <[email protected]> Tested-by: "Lecluse, Philippe" <[email protected]> Reviewed-by: Mark Janes <[email protected]>
* i965: Add marketing names for CHVVille Syrjälä2015-04-161-4/+4
| | | | | | | All CHV devices will be branded as "Intel(r) HD Graphics". Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]>
* i965/skl: Add Skylake PCI IDsKristian Høgsberg2014-12-081-0/+15
| | | | Signed-off-by: Kristian Høgsberg <[email protected]>
* i965: Include marketing names for Broadwell GPUs.Kenneth Graunke2014-06-261-18/+18
| | | | | | | | | | | | | Intel would like us to include the marketing names. Developers additionally want "Broadwell GT1/2/3" because it makes it easier to identify what hardware users have when they request assistance or report issues. Including both makes it easy for everyone to map between the names. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Cc: "10.2" <[email protected]>
* i965: Add Cherryview support.Kenneth Graunke2014-03-281-0/+4
| | | | | | | | Based on a patch by Ville Syrjälä. As usual, these are placeholder values; actual values will come later. Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Enable Broadwell support.Kenneth Graunke2014-02-201-2/+0
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Add (disabled) Broadwell PCI IDs.Kenneth Graunke2014-01-311-0/+20
| | | | | | | | | This puts the PCI IDs in place so it's easy to enable support. However, it doesn't actually enable support since it's very preliminary still, and a few crucial pieces (such as BLORP) are still missing. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Eric Anholt <[email protected]>
* i965: Add the family name to the PCI ID table.Kenneth Graunke2013-10-131-93/+93
| | | | | | | | I removed this a while ago, since we never used it, but I'm finally resurrecting the idea in the next commits. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Remove #define name from PCI ID table.Kenneth Graunke2013-10-131-93/+93
| | | | | | | | | | Nothing uses the #define name, and it's not terribly useful - the numerical ID serves the same purpose. The only thing we could really do with it is generate slightly prettier preprocessed code. But who looks at that? Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* intel: Use the CHIPSET macro in the PCI ID tables for the device name.Kenneth Graunke2013-06-061-93/+93
| | | | | | | | | | | | | Putting the human readable device names directly in the PCI ID list consolidates things in one place. It also makes it easy to customize the name on a per-PCI ID basis without a huge code explosion. Based on a patch by Kristian Høgsberg. v2: Fix 830M/845G names and #undef CHIPSET (caught by Emit Velikov). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* intel: Remove 'misc' parameter from CHIPSET macro in PCI ID tables.Kenneth Graunke2013-06-061-93/+93
| | | | | | | This has never actually been used for anything. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Adding more reserved PCI IDs for Haswell.Rodrigo Vivi2013-06-051-0/+24
| | | | | | | | | | | At DDX commit Chris mentioned the tendency we have of finding out more PCI IDs only when users report. So Let's add all new reserved Haswell IDs. NOTE: This is a candidate for stable branches. Bugzilla: http://bugs.freedesktop.org/show_bug.cgi?id=63701 Signed-off-by: Rodrigo Vivi <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* i965: make GT3 machines work as GT3 instead of GT2Paulo Zanoni2013-05-091-12/+12
| | | | | | | | | | | | | We were not allowed to say the "GT3" name, but we really needed to have the PCI IDs because too many people had such machines, so we had to make the GT3 machines work as GT2. Let's just say that GT2_PLUS was a short for GT2_PLUS_1 :) NOTE: This is a candidate for stable branches. Signed-off-by: Paulo Zanoni <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]>
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