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* freedreno: Stop doing binning shaders other than the VS in shader-db.Eric Anholt2020-05-011-1/+1
* freedreno/ir3: Fix register allocation assertion failures.Eric Anholt2020-05-013-21/+30
* freedreno/ir3: Drop hack to clean up split varsKristian H. Kristensen2020-05-011-24/+0
* freedreno/ir3: Lower GS builtins before lowering IOKristian H. Kristensen2020-05-014-61/+64
* freedreno/ir3: Add ir3_nir_lower_to_explicit_input() passKristian H. Kristensen2020-05-013-46/+65
* freedreno/ir3: Rename ir3_nir_lower_to_explicit_ioKristian H. Kristensen2020-05-013-6/+6
* freedreno/ir3: Pass stream output info to ir3_shader_from_nirKristian H. Kristensen2020-05-013-5/+10
* freedreno/ir3: Fix the a3xx TF outputs stores.Eric Anholt2020-05-011-1/+1
* freedreno/ir3: Set up the block predecessors for a3xx TFEric Anholt2020-05-012-2/+8
* intel/fs: Update location of Render Target Array Index for gen12D Scott Phillips2020-05-011-1/+9
* pan/decode: Properly print tripped zeroesTomeu Vizoso2020-05-011-1/+1
* panfrost: Add Bifrost texture trampoline BO to batchTomeu Vizoso2020-05-011-0/+6
* pan/bi: Lower for now sincosAlyssa Rosenzweig2020-05-011-0/+1
* panfrost: mali_attr_meta.unknown1 is zero on BifrostTomeu Vizoso2020-05-011-1/+1
* panfrost: GPUs newer than G-71 don't have swizzles...Tomeu Vizoso2020-05-015-8/+47
* pan/decode: Trace to stderr with PANDECODE_DUMP_FILE=stderrTomeu Vizoso2020-05-011-18/+16
* panfrost: Update Bifrost fields in mali_shader_metaAlyssa Rosenzweig2020-05-011-3/+12
* pan/bi: Print shaders only if BIFROST_MESA_DEBUG=shadersTomeu Vizoso2020-05-012-4/+34
* pan/bi: Enable lower_mediump_outputs NIR passAlyssa Rosenzweig2020-05-011-0/+1
* panfrost: Add a bit more info about some tiler fieldsTomeu Vizoso2020-05-012-7/+10
* panfrost: Create additional BO for the checksum of imported BOs (Bifrost)Tomeu Vizoso2020-05-013-2/+16
* panfrost: Split bit out of format.unk3Tomeu Vizoso2020-05-013-1/+7
* ci: add lists of expected failures & skipped tests for RAVEN with ACOSamuel Pitoiset2020-05-012-0/+16
* scripts: remove unittest.mock dependency when not usedAndres Gomez2020-05-011-2/+0
* ci: fix reporting the number of unexpected/flakesSamuel Pitoiset2020-05-011-2/+2
* gitlab-ci: Use YAML anchor for llvmpipe paths in virgl rulesMichel Dänzer2020-05-011-3/+4
* freedreno: we don't need aligned vbo'sRob Clark2020-05-011-3/+5
* freedreno/a6xx: add some more formatsRob Clark2020-05-011-0/+8
* pan/decode: Don't crash on missing payloadAlyssa Rosenzweig2020-05-011-3/+5
* panfrost: Fix tiled texture "stride"s on BifrostAlyssa Rosenzweig2020-05-011-6/+29
* panfrost: Fix norm coords on bifrost samplerAlyssa Rosenzweig2020-05-013-8/+5
* panfrost: Fix sampler wrap/filter field ordersAlyssa Rosenzweig2020-05-011-3/+3
* panfrost: Fix size of bifrost sampler descriptorAlyssa Rosenzweig2020-05-012-6/+5
* panfrost: Fix texture field sizeAlyssa Rosenzweig2020-05-011-1/+1
* pan/bit: Add round testsAlyssa Rosenzweig2020-05-011-0/+16
* pan/bit: Interpret ROUNDAlyssa Rosenzweig2020-05-011-1/+19
* pan/bit: Add framework forinterpreting double vs floatAlyssa Rosenzweig2020-05-011-3/+6
* pan/bi: Pack round opcodes (FMA, either 16 or 32)Alyssa Rosenzweig2020-05-012-1/+17
* pan/bi: Pipe multiple textures throughAlyssa Rosenzweig2020-05-012-6/+6
* pan/bi: Add texture indices to IRAlyssa Rosenzweig2020-05-012-2/+18
* freedreno/a6xx: fix LRZ hangRob Clark2020-05-012-2/+1
* freedreno/ir3: Leave bools as 1-bit, storing them in full regs.Eric Anholt2020-04-302-119/+111
* freedreno/ir3: Drop redundant IR3_REG_HALF setup in ALU ops.Eric Anholt2020-04-301-6/+0
* radeonsi: revert an accidental change in si_clear_bufferMarek Olšák2020-04-301-1/+1
* radeonsi: fix si_compute_clear_render_target with render condition enabledMarek Olšák2020-04-301-6/+9
* radeonsi: add a workaround to fix KHR-GL45.texture_view.view_classes on gfx9Marek Olšák2020-04-301-0/+15
* radeonsi: implement and use compute-based DCC decompression on gfx9-10Marek Olšák2020-04-307-14/+128
* radeonsi: add SI_IMAGE_ACCESS_DCC_OFF to ignore DCC for shader imagesMarek Olšák2020-04-304-6/+9
* radeonsi: bind shader images after DCC is disabled for image storesMarek Olšák2020-04-301-3/+3
* radeonsi: clean up and deduplicate code around internal compute dispatchesMarek Olšák2020-04-301-38/+43
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