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* st/glsl_to_tgsi: handle doubles outputs in arrays.Dave Airlie2016-01-011-4/+31
* st/glsl_to_tgsi: store if dst is double in arrayDave Airlie2016-01-011-3/+10
* nvc0: Set winding order regardless of domain.Kenneth Graunke2015-12-301-2/+4
* glsl: Fix varying struct locations when varying packing is disabled.Kenneth Graunke2015-12-301-13/+2
* drirc: Disable ARB_blend_func_extended for Heaven 4.0/Valley 1.0.Kenneth Graunke2015-12-301-0/+8
* glsl: add GL_ARB_shader_draw_parameters defineIlia Mirkin2015-12-301-0/+3
* nvc0: add ARB_shader_draw_parameters supportIlia Mirkin2015-12-3014-15/+74
* st/mesa: add GL_ARB_shader_draw_parameters supportIlia Mirkin2015-12-303-2/+4
* gallium: add a drawid to pipe_draw_infoIlia Mirkin2015-12-301-0/+2
* gallium: add PIPE_CAP_DRAW_PARAMETERSIlia Mirkin2015-12-3016-2/+19
* gallium: add baseinstance/drawid semanticsIlia Mirkin2015-12-303-1/+18
* nv50/ir: attempt to do more constant folding on mad -> add conversionIlia Mirkin2015-12-301-11/+10
* i965/gen8: Always use BRW_REGISTER_TYPE_UW for MUL on GEN8+Marta Lofstedt2015-12-302-29/+1
* glsl: tidy up struct with a single memberTimothy Arceri2015-12-308-19/+15
* glsl/linker: annotate static functions as suchEmil Velikov2015-12-302-3/+3
* glsl: annotate ast_process_struct_or_iface_block_members() as staticEmil Velikov2015-12-301-1/+1
* nir/builder: Add an init function that creates a simple shader for youJason Ekstrand2015-12-294-34/+28
* mesa/st: Pad out _mesa_sysval_to_semantic for new SYSTEM_VALUE_* enumsKristian Høgsberg Kristensen2015-12-291-0/+2
* nv50/ir: float(s32 & 0xff) = float(u8), not s8Ilia Mirkin2015-12-291-0/+3
* i965: Reemit vertex state between indirect multi drawsKristian Høgsberg Kristensen2015-12-291-2/+22
* nir: Teach nir_opt_algebraic about adding and subtracting the same thingKristian Høgsberg Kristensen2015-12-291-0/+4
* i965: Add support for gl_DrawIDARB and enable extensionKristian Høgsberg Kristensen2015-12-2912-5/+145
* i965: Add support for gl_BaseVertexARB and gl_BaseInstanceARBKristian Høgsberg Kristensen2015-12-2911-37/+88
* i965: Assert that SYSTEM_VALUE_VERTEX_ID gets loweredKristian Høgsberg Kristensen2015-12-291-0/+1
* mesa: Add core mesa support for GL_ARB_shader_draw_parametersKristian Høgsberg Kristensen2015-12-299-0/+41
* mesa/vbo: Add draw_id field to struct _mesa_primKristian Høgsberg Kristensen2015-12-292-0/+5
* nir: Remove function overload in control flow testAaron Watry2015-12-291-2/+1
* radeonsi: add RADEON_REPLACE_SHADERS debug optionNicolai Hähnle2015-12-293-5/+105
* radeonsi: count compilations in si_compile_llvmNicolai Hähnle2015-12-292-1/+2
* gallium/util: add DEBUG_GET_ONCE_OPTIONNicolai Hähnle2015-12-291-0/+13
* r600: fix constant buffer size programmingGrazvydas Ignotas2015-12-292-2/+2
* docs: Mark ARB_tessellation_shader as done on all i965 platforms.Kenneth Graunke2015-12-282-2/+2
* i965: Enable ARB_tessellation_shader on Gen7-7.5.Kenneth Graunke2015-12-282-3/+3
* i965: Don't set interleave or complete on TCS EOT message.Kenneth Graunke2015-12-285-5/+41
* i965: Relase input URB Handles on Gen7/7.5 when TCS threads finish.Kenneth Graunke2015-12-285-1/+93
* i965: Use proper TCS barrier ID bits for Ivybridge/Baytrail.Kenneth Graunke2015-12-281-4/+6
* i965: Use proper TCS Instance ID bits for Ivybridge/Baytrail.Kenneth Graunke2015-12-281-2/+5
* i965: Port tessellation evaluation shaders to vec4 mode.Kenneth Graunke2015-12-288-2/+365
* i965: Emit a real 3DSTATE_DS on Gen7.Kenneth Graunke2015-12-281-11/+54
* i965: Emit a real 3DSTATE_HS on Gen7.Kenneth Graunke2015-12-281-11/+47
* i965: Add the TCS/TES state upload atoms to the gen7_atoms list.Kenneth Graunke2015-12-283-30/+14
* nir: Get rid of function overloadsJason Ekstrand2015-12-2859-386/+313
* nvc0: don't forget to reset VTX_TMP bufctx slot after blit completionIlia Mirkin2015-12-271-0/+2
* nv50,nvc0: add a note when converting vertex elements using CPUIlia Mirkin2015-12-272-0/+6
* gallium/auxiliary: don't build NIR sources with MSVC2008 flagsConnor Abbott2015-12-232-7/+15
* i965: Add tr_mode and mip tail information in surface state dumpAnuj Phogat2015-12-231-2/+5
* i965/gen8/cs: Gen8 requires 64 byte alignment for push constant dataJordan Justen2015-12-221-3/+3
* freedreno/ir3: spelling..Rob Clark2015-12-231-6/+6
* nir/print: print variable constant-initializersRob Clark2015-12-231-0/+53
* docs: Clarify that ARB_tessellation_shader is only done on i965/gen8+.Kenneth Graunke2015-12-221-1/+1
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