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* intel/compiler: Discount NOPs from instruction countsMatt Turner2020-03-091-3/+9
| | | | | | | | | | Scheduler changes can cause changes in the number of instructions due to this workaround, so just don't include NOPs in the instruction counts to prevent shader-db noise. Reviewed-by: Ian Romanick <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
* intel/compiler: Pass shader_stats for each SIMD modeMatt Turner2020-03-097-24/+21
| | | | | | | | | | | | | | | | | | | | Passing shader_stats to the fs_generator constructor means that the SIMD8 shader stats from the visitor (such as the scheduler mode) will be reported out for the SIMD16/SIMD32 versions as well. As you can see, we are now passing 'shader_stats' and 'stats' to generate_code(), which is obviously odd looking. Ian rebased and committed an old patch of mine which added the shader_stats struct on July 30 in commit dabb5d4bee07 (i965/fs: Add a shader_stats struct.) and shortly after on August 12 Jason added the brw_compile_stats struct in commit 134607760ac2 (intel/compiler: Fill a compiler statistics struct). I'd like to combine the two, but I'm not sure how. shader_stats is an input to generate_code() while brw_compile_stats is an output and is only used by the Vulkan driver. Leave it as is for now... Reviewed-by: Ian Romanick <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
* intel/compiler: Pass backend_shader * to cfg_t()Matt Turner2020-03-097-16/+20
| | | | | | | | As you can see, not having a pointer to the backend_shader from within the class makes for some weird looking code. Reviewed-by: Ian Romanick <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
* intel/compiler: Mark visitor parameters to scheduler constMatt Turner2020-03-091-10/+10
| | | | | Reviewed-by: Ian Romanick <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
* intel/compiler: Mark some methods and parameters constMatt Turner2020-03-098-27/+27
| | | | | Reviewed-by: Ian Romanick <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
* intel/compiler: Make instructions_to_schedule a local variableMatt Turner2020-03-091-4/+2
| | | | | Reviewed-by: Ian Romanick <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
* intel/compiler: Remove unnecessary local variablesMatt Turner2020-03-091-3/+0
| | | | | | | These are already provided in the fs_reg_alloc class. Reviewed-by: Ian Romanick <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
* intel/vec4: Make implied_mrf_writes() a vec4_instruction methodMatt Turner2020-03-094-9/+8
| | | | | | | | Same as commit c20dc9b8363b (intel/fs: Make implied_mrf_writes() an fs_inst method.) Reviewed-by: Ian Romanick <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
* etnaviv: implement emit_string_markerChristian Gmeiner2020-03-082-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Writes string to cmdstream in payload of a nop command. Could be useful for internal driver debugging too. Here is how it looks decoded: 0x18000000, /* NOP (3) OP=NOP */ 0x65736572, /* rese */ 0x18000000, /* NOP (3) OP=NOP */ 0x00000074, /* t */ 0x00000000, /* GL.API_MODE := OPENGL */ or 0x00000705, /* GL.STALL_TOKEN := FROM=RA,TO=PE,FLIP0=0,FLIP1=0 */ 0x00000001, /* TS.FLUSH_CACHE := FLUSH=1 */ 0x18000000, /* NOP (3) OP=NOP */ 0x616e7465, /* etna */ 0x18000000, /* NOP (3) OP=NOP */ 0x6275735f, /* _sub */ 0x18000000, /* NOP (3) OP=NOP */ 0x5f74696d, /* mit_ */ 0x18000000, /* NOP (3) OP=NOP */ 0x735f7372, /* rs_s */ 0x18000000, /* NOP (3) OP=NOP */ 0x65746174, /* tate */ 0x00004606, /* RS.CONFIG := SOURCE_FORMAT=A8R8G8B8 Signed-off-by: Christian Gmeiner <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3744> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3744>
* etnaviv: increase number of supported varyings to 16Christian Gmeiner2020-03-084-7/+10
| | | | | | | | | No deqp regressions. Signed-off-by: Christian Gmeiner <[email protected]> Reviewed-by: Jonathan Marek <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3827> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3827>
* etnaviv: update headers from rnndbChristian Gmeiner2020-03-083-7/+7
| | | | | | | | Update to etna_viv commit fd2e2cfd. Signed-off-by: Christian Gmeiner <[email protected]> Reviewed-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3827>
* etnaviv: ask kernel for max number of supported varyingsChristian Gmeiner2020-03-081-8/+6
| | | | | | | | | The inital etnaviv kernel driver in 4.5 has support for this param. See kernel commit 602eb48966d7b7f7e64dca8d9ea2842d83bfae73 Signed-off-by: Christian Gmeiner <[email protected]> Reviewed-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3827>
* gitlab-ci: Always name artifacts archive after the job producing itMichel Dänzer2020-03-072-2/+5
| | | | | | | | | | | | | This will help determine which artifacts generate how much traffic. v2: * Add "mesa_" prefix to make it obvious which project the artifacts are from. Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4085> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4085>
* anv: stop storing prog param data into shader blobsLionel Landwerlin2020-03-072-14/+5
| | | | | | | | | We have no use for this data in Anv. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason EKstrand <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3517> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3517>
* anv: Bounds-check pushed UBOs when robustBufferAccess = trueJason Ekstrand2020-03-075-41/+267
| | | | | | | | | | | We also have to add nir_intrinsic_load_push_constant to the list of intrinsics which use push constants in brw_nir_analyze_ubo_ranges because we're moving the loop where we rewrite the intrinsics to after we've analyzed UBO loads. Reviewed-by: Lionel Landwerlin <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
* anv: Add an align_down_u32 helperJason Ekstrand2020-03-072-2/+9
| | | | | Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
* anv: Align UBO sizes to 32BJason Ekstrand2020-03-073-0/+13
| | | | | | | | This makes all of our bounds checking consistent with the block loads we do for constant offset UBO accesses. Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
* anv: Delete some pointless break statementsJason Ekstrand2020-03-071-2/+0
| | | | | | | They immediately follow returns. Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
* anv: Pass buffer addresses into emit_push_constant*Jason Ekstrand2020-03-071-26/+32
| | | | | | | | | While we're here, we add an assert that bind_map::push_ranges is tightly packed. If it isn't, it breaks assumptions in the emit_push_constant* functions. Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
* anv: Mark max_push_range UNUSED and simplify the codeJason Ekstrand2020-03-071-3/+2
| | | | | | | | | The compiler should be smart enough to figure out that it's unused on Gen11 and earlier and delete the code which calculates. Us adding an `if (GEN_GEN >= 12)` check is unnecessary and just dirties the code. Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
* anv: Parse VkPhysicalDeviceFeatures2 in CreateDeviceJason Ekstrand2020-03-071-10/+45
| | | | | | | | | | The client may enable robustBufferAccess2 via either pCreateInfo->pEnabledFeatures or via a chained-in VkPhysicalDeviceFeatures2 struct. We need to parse both. Fixes: 022e5c7e5a5 "anv: Implement VK_KHR_get_physical_device_properties2" Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
* docs/relnotes/20.0: fix vulkan version reportedEric Engestrom2020-03-072-2/+2
| | | | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4092> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4092>
* docs/relnotes/19.3: fix vulkan version reportedEric Engestrom2020-03-075-5/+5
| | | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4092>
* gen_release_notes: fix vulkan version reportedEric Engestrom2020-03-071-1/+1
| | | | | | | | | Fixes: 4ef3f7e3d37ece7b4339 ("anv: Enable Vulkan 1.2 support") Fixes: 7f5462e349a3f082e294 ("radv: enable Vulkan 1.2") Fixes: 75755e0eba17f8500367 ("turnip: Pretend to support Vulkan 1.2") Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4092>
* pan/bi: Fix Android.mkAlyssa Rosenzweig2020-03-071-2/+2
| | | | | | | | | | | | Files listed in Makefile.sources did not exist, this affects the android build for other drivers as well. [Patch by Tapani manually cherrypicked into this branch] Signed-off-by: Tapani Pälli <[email protected]> Signed-off-by: Alyssa Rosenzweig <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
* pan/bi: Rename next-wait to simply 'wait'Alyssa Rosenzweig2020-03-071-1/+1
| | | | | | | | | | next-wait is from a quirk of packing that the dependency indices are "off by one"; we don't emulate this quirk in the IR since it's easy enough to patch over in the disassembler. Let's not confuse anybody with it. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
* pan/bi: Add dummy schedulerAlyssa Rosenzweig2020-03-075-5/+86
| | | | | | | | | | | | | | | Do the absolute simplest possible thing -- create a clause for every instruction, and just pick whichever slot we can, nopping the other, copying whatever constant we have whether it's used or not. To be clear - this is not to be used in a production compiler. But this lets actual bundles and clauses show up in the BIR, which unblocks work on final code generation and packing (which can happen more or less in parallel to NIR->BIR, optimization, register allocation, and writing an actual scheduling). Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
* pan/bi: Implement load_constAlyssa Rosenzweig2020-03-071-6/+25
| | | | | | | | | | | In the laziest possible way... We can just emit worst case moves which DCE will eat for breakfast anyway, and inline constants on instructions where that is supported directly. This approach eliminates a lot of nasty corner cases that Midgard's crazy cache scheme has hit, at the expense of slightly more work for DCE (but it's only a single iteration of an O(N) pass that has to run anyway..) Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
* pan/bi: Add preliminary LOAD_UNIFORM implementationAlyssa Rosenzweig2020-03-074-4/+30
| | | | | | | | Lots of things are missing (indirect access, UBOs) but we have this stubbed out for now. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
* pan/bi: Implement store_vary for vertex shadersAlyssa Rosenzweig2020-03-071-3/+29
| | | | | | | As far as I/O goes, these four should hold us over for a while. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
* pan/bi: Add helpers for creating temporariesAlyssa Rosenzweig2020-03-072-0/+17
| | | | | | | Also from Midgard, adapted to our addressing scheme. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
* pan/bi: Implement load_input for vertex shadersAlyssa Rosenzweig2020-03-071-1/+36
| | | | | | | Corresponds to a single LD_ATTR instruction, easy enough. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
* pan/bi: Implement store_output for fragment shadersAlyssa Rosenzweig2020-03-072-0/+33
| | | | | | | | Corresponds to a BLEND instruction, possibly preceded by an ATEST instruction. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
* pan/bi: Add bi_schedule_barrier helperAlyssa Rosenzweig2020-03-071-0/+13
| | | | | | | Copypaste from Midgard. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
* pan/bi: Add blend_location to IR for BI_BLENDAlyssa Rosenzweig2020-03-072-0/+5
| | | | | | | To specify which render target is being written. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
* pan/bi: Implement nir_intrsinic_load_interpolated_inputAlyssa Rosenzweig2020-03-071-0/+47
| | | | | | | Enough for basic varying reads. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
* pan/bi: Fix destination printingAlyssa Rosenzweig2020-03-071-20/+21
| | | | | | | It should get the same treatment as sources to handle SSA/reg/etc. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
* pan/bi: Handle jumps (breaks, continues)Alyssa Rosenzweig2020-03-071-1/+60
| | | | | | | Loops should behave reasonably now. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
* pan/bi: Handle loops when ingesting CFGAlyssa Rosenzweig2020-03-072-2/+33
| | | | | | | | | Not very useful without also handling breaks and continues, of course. We use the strategy from v3d (vir_to_nir) instead of Midgard's, since the latter is mildly insane. I mean, it passes deqp but... Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
* pan/bi: Add support for if-else blocksAlyssa Rosenzweig2020-03-071-2/+109
| | | | | | | Branch lowering code lifted from Midgard as usual. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
* pan/bi: Call nir_lower_io_to_temporaries in cmdlineAlyssa Rosenzweig2020-03-071-0/+1
| | | | | | | | | Normally mesa/st would do this for us, but we're using the standalone compiler (in advance of having the hardware) and need this pass particularly for fragment writeout. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
* pan/bi: Add instruction emit/remove helpersAlyssa Rosenzweig2020-03-071-1/+17
| | | | | | | As we start descending into code generation these will be of interest. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
* pan/bi: Print branch targetAlyssa Rosenzweig2020-03-071-0/+7
| | | | | | | ...if it's present, anyway. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
* pan/bi: Don't print types for unconditional branchesAlyssa Rosenzweig2020-03-071-3/+5
| | | | | | | There's nothing to type! Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
* pan/bi: Improve block printingAlyssa Rosenzweig2020-03-071-5/+9
| | | | | | | | Skip predecessor printing if there are none and match a missing brace, also fixup the spacing. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
* pan/bi: Walk through the NIR control flow graphAlyssa Rosenzweig2020-03-072-0/+82
| | | | | | | | Copypaste from Midgard with some cleanups. That seems to be a trend these days. Hopefully boilerplate will come to a close soon. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
* pan/bi: Lower and optimize NIRAlyssa Rosenzweig2020-03-073-2/+100
| | | | | | | | | | | | | | | | | | | Pretty much a copypaste from Midgard except where architectural decisions diverge around vectorization. On that note, we will need our own ALU scalarization pass at some point (or rather we'll need to extend nir_lower_alu_scalar) to allow partial lowering for 8/16-bit ops. I.e. we'll approximately need to lower vec4 16 ssa_2 = fadd ssa_0, ssa_1 to vec2 16 ssa_2 = fadd ssa_0.xy, ssa_1.xy vec2 16 ssa_3 = fadd ssa_0.zw, ssa_1.zw vec4 16 ssa_4 = vec4 ssa_2.x, ssa_2.y, ssa_3.x, ssa_4 Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
* anv: Flatten the logic add_aux_surface_if_supported (v3)Chad Versace2020-03-061-85/+101
| | | | | | | | | | | | | | | Reduces the function's max indentation level from 5 to 3 inside the big 'if' tree. And enables more comments to be attached to the condition they describe. v2: - Add missing DEBUG_NO_RBC check. v3: - Return early on DISABLE_AUX_BIT. - Restore original order of gen7 hiz check. Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4096> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4096>
* anv: Refactor creation of aux surfaces (v2)Chad Versace2020-03-061-86/+112
| | | | | | | | | | | | | make_surface() contained a giant if-tree for creation of aux surfaces. Move the if-tree into its own function, add_aux_surface_if_supported(). This will simplify future changes for VK_EXT_image_drm_format_modifier. This patch merely moves the code verbatim, then extracts duplicate assertions to the top. v2: Rename func to add_aux_surface_if_supported [for jekstrand]. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4096>
* anv: Add anv_image_plane_needs_shadow_surface() (v2)Chad Versace2020-03-061-31/+58
| | | | | | | | | | | | | | | | | | | The function returns true if hardware limitations require the image plane to use a shadow surface. It replaces equivalent code in make_surface(). Refactor only. No intended change in behavior. Why extract this code out of vkCreateImage? If an image requires a shadow surface, then that may impact its support for DRM format modifiers, which must be evaluated during vkGetPhysicalDeviceImageFormatProperties2. v2: - Use early return. [for jekstrand] - Unexport function. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4096>
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