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* radeon/vcn: add VP9 prob table bufferLeo Liu2018-04-122-18/+37
| | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Christian König <[email protected]>
* vl: add VP9 probability tablesLeo Liu2018-04-123-1/+588
| | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Christian König <[email protected]>
* radeon/vcn: add VP9 dpb buffer sizeLeo Liu2018-04-121-0/+6
| | | | | | | | | The current FW has restricted the size to the worse case, and the new dynamic dpb buffer support is on the way from firmware side, we will change accordingly. Signed-off-by: Leo Liu <[email protected]> Acked-by: Christian König <[email protected]>
* radeon/vcn: add VP9 stream type for decoderLeo Liu2018-04-122-0/+4
| | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Christian König <[email protected]>
* vl: add VP9 picture descriptionLeo Liu2018-04-121-0/+94
| | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Christian König <[email protected]>
* vl: add VP9 profile0 and formatLeo Liu2018-04-122-2/+7
| | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Christian König <[email protected]>
* radv: fix radv_layout_dcc_compressed() when image doesn't have DCCSamuel Pitoiset2018-04-121-1/+1
| | | | | | | | | | | | | | | | num_dcc_levels means that DCC is supported, but this doesn't mean that it's enabled by the driver. Instead, we should rely on radv_image_has_dcc(). This fixes some multisample regressions since 0babc8e5d66 ("radv: fix picking the method for resolve subpass") on Vega. This is because the resolve method changed from HW to FS, but those fails are totally unexpected, so there might some differences between Polaris and Vega here. Fixes: 44fcf587445 ("radv: Disable DCC for GENERAL layout and compute transfer dest.") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add radv_decompress_resolve_{subpass}_src() helpersSamuel Pitoiset2018-04-124-54/+73
| | | | | | | | This helper shares common code before resolving using either a fragment or a compute shader. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add radv_init_dcc_control_reg() helperSamuel Pitoiset2018-04-121-32/+52
| | | | | | | And add some comments. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* glsl: fix compat shaders in GLSL 1.40Timothy Arceri2018-04-121-0/+2
| | | | | | | | | | | | | | The compatibility and core tokens were not added until GLSL 1.50, for GLSL 1.40 just assume all shaders built with a compat profile are compat shaders. Fixes rendering issues in Dawn of War II on radeonsi which has enabled OpenGL 3.1 compat support. Fixes: a0c8b49284ef "mesa: enable OpenGL 3.1 with ARB_compatibility" Reviewed-by: Marek Olšák <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105807
* mesa: Silence remaining unused parameter warnings in teximage.cIan Romanick2018-04-111-21/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | src/mesa/main/teximage.c: In function ‘_mesa_test_proxy_teximage’: src/mesa/main/teximage.c:1301:51: warning: unused parameter ‘level’ [-Wunused-parameter] GLuint numLevels, GLint level, ^~~~~ src/mesa/main/teximage.c: In function ‘texsubimage_error_check’: src/mesa/main/teximage.c:2186:30: warning: unused parameter ‘dsa’ [-Wunused-parameter] bool dsa, const char *callerName) ^~~ src/mesa/main/teximage.c: In function ‘copytexture_error_check’: src/mesa/main/teximage.c:2297:32: warning: unused parameter ‘width’ [-Wunused-parameter] GLint width, GLint height, GLint border ) ^~~~~ src/mesa/main/teximage.c:2297:45: warning: unused parameter ‘height’ [-Wunused-parameter] GLint width, GLint height, GLint border ) ^~~~~~ src/mesa/main/teximage.c: In function ‘check_rtt_cb’: src/mesa/main/teximage.c:2679:21: warning: unused parameter ‘key’ [-Wunused-parameter] check_rtt_cb(GLuint key, void *data, void *userData) ^~~ src/mesa/main/teximage.c: In function ‘override_internal_format’: src/mesa/main/teximage.c:2756:55: warning: unused parameter ‘width’ [-Wunused-parameter] override_internal_format(GLenum internalFormat, GLint width, GLint height) ^~~~~ src/mesa/main/teximage.c:2756:68: warning: unused parameter ‘height’ [-Wunused-parameter] override_internal_format(GLenum internalFormat, GLint width, GLint height) ^~~~~~ src/mesa/main/teximage.c: In function ‘texture_sub_image’: src/mesa/main/teximage.c:3293:24: warning: unused parameter ‘dsa’ [-Wunused-parameter] bool dsa) ^~~ src/mesa/main/teximage.c: In function ‘can_avoid_reallocation’: src/mesa/main/teximage.c:3788:53: warning: unused parameter ‘x’ [-Wunused-parameter] mesa_format texFormat, GLint x, GLint y, GLsizei width, ^ src/mesa/main/teximage.c:3788:62: warning: unused parameter ‘y’ [-Wunused-parameter] mesa_format texFormat, GLint x, GLint y, GLsizei width, ^ src/mesa/main/teximage.c: In function ‘valid_texstorage_ms_parameters’: src/mesa/main/teximage.c:5987:40: warning: unused parameter ‘samples’ [-Wunused-parameter] GLsizei samples, unsigned dims) ^~~~~~~ Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa: Silence unused parameter warning in compressedteximage_only_formatIan Romanick2018-04-113-10/+10
| | | | | | | | | | | | | | | Passing ctx to compressedteximage_only_format was the only use of the ctx parameter in _mesa_format_no_online_compression, so that parameter had to go too. ../../SOURCE/master/src/mesa/main/teximage.c: In function ‘compressedteximage_only_format’: ../../SOURCE/master/src/mesa/main/teximage.c:1355:57: warning: unused parameter ‘ctx’ [-Wunused-parameter] compressedteximage_only_format(const struct gl_context *ctx, GLenum format) ^~~ Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* blorp: Silence unused function warningsNanley Chery2018-04-113-4/+4
| | | | | | | | | | | | | | | | | | | vulkan/genX_blorp_exec.c:69:1: warning: ‘blorp_get_surface_base_address’ defined but not used [-Wunused-function] blorp_get_surface_base_address(struct blorp_batch *batch) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ In file included from vulkan/genX_blorp_exec.c:35:0: ./blorp/blorp_genX_exec.h:1249:1: warning: ‘blorp_emit_memcpy’ defined but not used [-Wunused-function] blorp_emit_memcpy(struct blorp_batch *batch, ^~~~~~~~~~~~~~~~~ genX_blorp_exec.c:99:1: warning: ‘blorp_get_surface_base_address’ defined but not used [-Wunused-function] blorp_get_surface_base_address(struct blorp_batch *batch) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ In file included from genX_blorp_exec.c:33:0: ../../../../../src/intel/blorp/blorp_genX_exec.h:1249:1: warning: ‘blorp_emit_memcpy’ defined but not used [-Wunused-function] blorp_emit_memcpy(struct blorp_batch *batch, ^~~~~~~~~~~~~~~~~ Reviewed-by: Lionel Landwerlin <[email protected]>
* nir/vars_to_ssa: Simplify node matching codeCaio Marcelo de Oliveira Filho2018-04-111-36/+31
| | | | | | | | | | The matching code doesn't make real use of the return value. The main function return value is ignored, and while the worker function propagate its return value, the actual callback never returns false. v2: Style fixes. (Jason) Reviewed-by: Jason Ekstrand <[email protected]>
* nir/vars_to_ssa: Remove an unnecessary deref_arry_type checkCaio Marcelo de Oliveira Filho2018-04-111-4/+5
| | | | | | | | Only fully-qualified direct derefs, collected in direct_deref_nodes, are checked for aliasing, so it is already known up front that they have only array derefs of type direct. Reviewed-by: Jason Ekstrand <[email protected]>
* nir/vars_to_ssa: Rework register_variable_uses()Caio Marcelo de Oliveira Filho2018-04-111-28/+23
| | | | | | | | | | | The return value was needed to make use of the old nir_foreach_block helper, but not needed anymore with the macro version. Then go one step further and move the foreach directly into the register variable uses function. v2: Move foreach to register_variable_uses(). (Jason) Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Use nir_builder in lower_io_to_temporariesJason Ekstrand2018-04-111-19/+16
| | | | Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* radv: Enable RB+ on Raven.Bas Nieuwenhuizen2018-04-111-1/+2
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* vulkan: fix build issue on android (both anv/radv)Tapani Pälli2018-04-112-5/+5
| | | | | | | | | | Fixes linking errors against: anv_GetPhysicalDeviceImageFormatProperties2KHR radv_GetPhysicalDeviceImageFormatProperties2KHR Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: correctly parse disassembly with labelsNicolai Hähnle2018-04-111-31/+32
| | | | | | | | | | LLVM now emits labels as part of the disassembly string, which is very useful but breaks the old parsing approach. Use the semicolon to detect the boundary of instructions instead of going by line breaks. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: pass -O halt_waves to umr for hang debuggingNicolai Hähnle2018-04-112-3/+3
| | | | | | | | | | | This will give us meaningful wave information in the case of a hang where shaders are still running in an infinite loop. Note that we call umr multiple times for different sections of the ddebug hang dump, and so the wave information will not necessarily match up between sections. Reviewed-by: Marek Olšák <[email protected]>
* vulkan: Drop vk_android_native_buffer.xmlJason Ekstrand2018-04-1012-109/+26
| | | | | | | | All the information in vk_android_native_buffer.xml is now in vk.xml. The only exception is the extension type attribute which we can work around in the generators while we wait for the XML to be fixed. Reviewed-by: Dylan Baker <[email protected]>
* nir/lower_atomics: Rework the main walker loop a bitJason Ekstrand2018-04-101-8/+16
| | | | | | | | This replaces some "if (...} { }" with "if (...) continue;" to reduce nesting depth and makes nir_metadata_preserve conditional on progress for the given impl. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* radv: Enable RB+ where possible.Bas Nieuwenhuizen2018-04-113-6/+151
| | | | | | | | | | | | | | | According to Marek, not enabling it on Stoney has a significant negative performance impact. (And I guess this might impact performance on Raven as well) The register settings are pretty much copied from radeonsi. I did not put this in the pipeline as that would make the pipeline more dependent on the format which mean we would have to have more pipelines for the meta shaders. v2: Don't clear RB+ regs if not enabled as the CLEAR_STATE packet does already. Reviewed-by: Samuel Pitoiset <[email protected]>
* nir: Check if u_vector_init() succeedsTopi Pohjolainen2018-04-111-2/+9
| | | | | | | | | | | However, it only fails when running out of memory. Now, if we are about to check that, we should be consistent and check the allocation of the worklist as well. CID: 1433512 Fixes: edb18564c7 nir: Initial implementation of a nir_instr_worklist Reviewed-by: Thomas Helland <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* mesa: Assert base format before truncating to unsigned shortTopi Pohjolainen2018-04-111-2/+3
| | | | | | | | | CID: 1433709 Fixes: ca721b3d8: mesa: use GLenum16 in a few more places Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* intel/dev: Assert the number of slices is not zeroTopi Pohjolainen2018-04-111-1/+1
| | | | | | | Fixes: c1900f5b intel: devinfo: add helper functions to fill... CID: 1433511 Reviewed-by: Lionel Landwerlin <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965: Remove brw_bo_alloc_tiled_2d from intel_detect_swizzling.Kenneth Graunke2018-04-101-10/+4
| | | | | | I'd like to drop this pre-isl function. This drops one of the two uses. Reviewed-by: Iago Toral Quiroga <[email protected]>
* mesa: fix glsl version mismatch in compat profileTimothy Arceri2018-04-111-2/+6
| | | | | | | | | | Drivers that only support compat 3.0 were reporting GLSL 1.40 support. This fixes issues with the menu of Dawn of War II. Fixes: a0c8b49284ef "mesa: enable OpenGL 3.1 with ARB_compatibility" Reviewed-by: Marek Olšák <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105807
* radv: fix picking the method for resolve subpassSamuel Pitoiset2018-04-101-1/+1
| | | | | | | | | | | The source and destination image parameters were swapped. No CTS changes on Polaris10, but I suspect this might fix something. Fixes: 2a04f5481df ("radv/meta: select resolve paths") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add shader BOs to the list at pipeline bind timeSamuel Pitoiset2018-04-101-3/+15
| | | | | | | | | | | | Otherwise, the shader BOs are not added to the list on SI because prefetching isn't supported. Calling radv_cs_add_buffer() in the prefetch codepath was a bad idea. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105952 Fixes: 4ad7595f35 ("radv: rename radv_emit_prefetch() to radv_emit_prefetch_L2") Signed-off-by: Samuel Pitoiset <[email protected]> Tested-by: Turo Lamminen <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/surface: don't set the display flag for obviously unsupported cases (v2)Marek Olšák2018-04-104-4/+33
| | | | | | | This enables the tile swizzle for some cases of the displayable micro mode, and it also fixes an addrlib assertion failure on Vega. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add shader binary padding for UMRMarek Olšák2018-04-101-3/+15
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* ac/surface/gfx9: request desired micro tile mode explicitlyMarek Olšák2018-04-101-4/+16
| | | | Tested-by: Dieter Nützel <[email protected]>
* docs/release-calendar: update to include 18.1 and 18.2Emil Velikov2018-04-101-4/+84
| | | | | | | | | | | | | | Dylan has kindly stepped up to help with 18.1.0, while I've taken the liberty to nominate Andres for 18.2.0 ;-) As always, people are welcome to swap/adjust where needed. v2: Add Juan for 18.0.x (Juan) Cc: Andres Gomez <[email protected]> Reviewed-by: Juan A. Suarez <[email protected]> Acked-by: Dylan Baker <[email protected]> (v1) Signed-off-by: Emil Velikov <[email protected]>
* glsl: remove unreachable assert()Emil Velikov2018-04-101-2/+0
| | | | | | | | | | Earlier commit enforced that we'll bail out if the number of terminators is different than 2. With that in mind, the assert() will never trigger. Fixes: 56b867395de ("glsl: fix infinite loop caused by bug in loop unrolling pass") Reviewed-by: Timothy Arceri <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* spirv: autotools: add vtn_gather_types_c.py in distribution tarballJuan A. Suarez Romero2018-04-101-1/+2
| | | | | | | Fixes: 042ee4bea26 "(spirv: Move SPIR-V building to Makefile.spirv.am and spirv/meson.build") Reviewed-by: Emil Velikov <[email protected]>
* radeonsi: autotools: add si_build_pm4.h in dist tarballJuan A. Suarez Romero2018-04-101-0/+1
| | | | | | | | Fixes: 5777488406c ("radeonsi: move r600_cs.h contents into si_pipe.h, si_build_pm4.h") Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* ac/nir: Use an array instead of hashtable for SSA defs.Bas Nieuwenhuizen2018-04-101-9/+13
| | | | | | | | | Saves about 2% of compile time for F1 2017, as well as reduce code size of an optimized libvulkan_radeon.so by about 1 KiB. This still keeps the hashtable, as we also stored blocks in there. Reviewed-by: Samuel Pitoiset <[email protected]>
* st/mesa: finalise tcs/tes/geom NIR before storing it to the cacheTimothy Arceri2018-04-101-2/+9
| | | | | | | We don't create variants of the NIR so here we finalise it before caching to avoid unnecessary processing when restoring it. Reviewed-by: Marek Olšák <[email protected]>
* st/mesa: exit st_translate_fragment_program() earlier for NIR pathTimothy Arceri2018-04-101-6/+6
| | | | | | This avoids a bunch of scanning that is only used by the TGSI path. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: tidy up si_nir_load_sampler_desc()Timothy Arceri2018-04-101-5/+3
| | | | | | | | This makes it easier to follow the code, and also initialises dynamic_index which will be useful for adding bindless textures support. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: set uses_bindless_images for imagesTimothy Arceri2018-04-101-1/+16
| | | | | | V2: add missing intrinsics (Spotted-by: Samuel Pitoiset) Reviewed-by: Marek Olšák <[email protected]>
* nir: dont lower bindless samplersTimothy Arceri2018-04-101-1/+7
| | | | | | | We neeed to skip the var if its not a uniform here as well as checking the bindless flag since UBOs can contain bindless samplers. Reviewed-by: Marek Olšák <[email protected]>
* st/glsl_to_nir: set paramater value offset as driver location for packed ↵Timothy Arceri2018-04-103-11/+11
| | | | | | | | | uniforms This allows us to simplify the code and will also be useful for supporting bindless textures. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: don't add bindless samplers/images to declared bitmasksTimothy Arceri2018-04-101-6/+6
| | | | Reviewed-by: Marek Olšák <[email protected]>
* st/mesa: stop calling _mesa_init_shader_object_functions()Timothy Arceri2018-04-101-1/+0
| | | | | | | This sets the LinkShader function for the driver, but for the st we set it properly with the following call to st_init_program_functions(). Reviewed-by: Marek Olšák <[email protected]>
* anv/pipeline: Lower more constant initializers earlierJason Ekstrand2018-04-091-7/+5
| | | | | | | | Once we've gotten rid of everything but the main entrypoint, there's no reason why we should go ahead and lower them all. This is what radv does and it will make future work easier. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* spirv: Use the LOCAL_GROUP_SIZE system valueJason Ekstrand2018-04-091-15/+2
| | | | Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* nir/lower_system_values: Support SYSTEM_VALUE_LOCAL_GROUP_SIZEJason Ekstrand2018-04-091-0/+10
| | | | Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
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