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* intel: Drop program size pointer from vec4/fs assembly getters.Kenneth Graunke2018-03-029-25/+17
* i965: Mark upload buffers with MAP_ASYNC and MAP_PERSISTENT.Kenneth Graunke2018-03-021-1/+3
* i965: Generalize intel_upload.c to support multiple uploaders.Kenneth Graunke2018-03-029-91/+101
* intel/compiler: Memory fence commit must always be enabled for gen10+Anuj Phogat2018-03-021-1/+3
* Revert "i965/fs: Predicate byte scattered writes if needed"Francisco Jerez2018-03-021-14/+1
* intel/fs: Handle surface opcode sample masks via predication.Francisco Jerez2018-03-021-1/+42
* intel/eu: Plumb header present bit to codegen helpers for HDC messages.Francisco Jerez2018-03-024-29/+50
* intel/ir: Allow arbitrary scratch flag registers for SHADER_OPCODE_FIND_LIVE_...Francisco Jerez2018-03-023-4/+6
* intel/ir: Allow representing additional flag subregisters in the IR.Francisco Jerez2018-03-027-14/+24
* intel/l3: Don't allocate SLM partition on ICL+.Francisco Jerez2018-03-021-1/+1
* svga: add SVGA_NEW_PRESCALE to the tracked dirty mask for gsCharmaine Lee2018-03-021-1/+2
* svga: fix blending regressionBrian Paul2018-03-021-11/+24
* svga: check svga_have_vgpu10() in svga_delete_blend_state()Brian Paul2018-03-021-1/+1
* svga: if svga_update_state() fails, skip the draw callBrian Paul2018-03-021-5/+5
* svga: let svga_update_state_retry() return a boolBrian Paul2018-03-022-6/+9
* svga: s/unsigned/boolean/ for a few local varsBrian Paul2018-03-021-6/+6
* meson: install vulkan_intel.h headerDylan Baker2018-03-021-0/+4
* st/omx_bellagio: add picture profile and entry pointBoyuan Zhang2018-03-021-0/+2
* radeonsi: fix radeon create encoder returnBoyuan Zhang2018-03-021-1/+1
* loader: Add support for platform and host1x bussesThierry Reding2018-03-021-0/+27
* disk cache: Link with -latomic if necessaryThierry Reding2018-03-022-1/+18
* radv: do not set pending_reset_query in BeginCommandBuffer()Samuel Pitoiset2018-03-021-7/+0
* r600/cayman: fix fragcood loading recip generation.Dave Airlie2018-03-021-1/+1
* i965: Allow 48-bit addressing on Gen8+.Kenneth Graunke2018-03-017-18/+127
* i965: Shorten the name of the workaround BO.Kenneth Graunke2018-03-011-3/+1
* i965: Add debugging code to dump the validation list.Kenneth Graunke2018-03-011-0/+22
* intel/fs: Set up sampler message headers in the visitor on gen7+Jason Ekstrand2018-03-012-22/+39
* ac: fix nir_intrinsic_shared_atomic_comp_swap handlingTimothy Arceri2018-03-021-1/+1
* st/glsl_to_nir: simplify st_nir_assign_var_locations() and fix for fs outputsTimothy Arceri2018-03-021-17/+13
* anv: Enable MSAA fast-clearsJason Ekstrand2018-03-011-4/+7
* anv/cmd_buffer: Add support for MCS fast-clears and resolvesJason Ekstrand2018-03-011-5/+39
* anv/cmd_buffer: Add helpers for computing resolve predicatesJason Ekstrand2018-03-011-10/+64
* anv/cmd_buffer: Handle MCS identical to CCS_E in compute_aux_usageJason Ekstrand2018-03-011-9/+5
* anv/blorp: Pass the clear address to blorp for subpass MSAA resolvesJason Ekstrand2018-03-011-0/+6
* anv/blorp: Allow indirect clear colors on blorp sources on gen7Jason Ekstrand2018-03-011-2/+2
* anv/blorp: Add partial clear support to anv_image_mcs_opJason Ekstrand2018-03-011-1/+14
* intel/blorp: Add indirect clear color support to mcs_partial_resolveJason Ekstrand2018-03-013-10/+70
* intel/blorp: Add a helper for filling out VERTEX_BUFFER_STATEJason Ekstrand2018-03-011-36/+33
* i965: Fix RELOC_WRITE typo in brw_store_data_imm64()Andriy Khulap2018-03-011-1/+1
* gallium/util: use sockets on PIPE_OS_UNIX in u_networkJonathan Gray2018-03-012-10/+4
* util: use clock_gettime() on PIPE_OS_BSDJonathan Gray2018-03-011-1/+1
* nir/search: Include 8 and 16-bit support in construct_valueJose Maria Casanova Crespo2018-03-011-0/+15
* nir/search: Support 8 and 16-bit constants in match_valueJason Ekstrand2018-03-011-0/+20
* travis: make Meson find the proper llvm-configAndres Gomez2018-03-011-4/+26
* meson: fix LLVM version detection when <= 3.4Andres Gomez2018-03-011-1/+8
* i965/sbe: fix number of inputs for active componentsIago Toral Quiroga2018-03-011-4/+2
* radv: only emit cache flushes when the pool size is large enoughSamuel Pitoiset2018-03-013-11/+15
* radv: keep track of the query pool sizeSamuel Pitoiset2018-03-012-5/+5
* radv: make sure to emit cache flushes before starting a querySamuel Pitoiset2018-03-013-7/+33
* nir/serialize: handle var->name being NULLAlejandro Piñeiro2018-03-011-1/+2
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