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* anv: Add a layout_to_aux_state helperJason Ekstrand2020-01-242-82/+134
* anv: Use TRANSFER_SRC_OPTIMAL for depth/stencil MSAA resolvesJason Ekstrand2020-01-241-4/+4
* intel/blorp: resize src and dst surfaces separatelyJason Ekstrand2020-01-241-45/+53
* aco: combine MRTZ (depth, stencil, sample mask) exportsSamuel Pitoiset2020-01-242-280/+259
* aco/gfx10: Fix VcmpxExecWARHazard mitigation.Timur Kristóf2020-01-242-3/+2
* aco: Transform uniform bitwise instructions to 32-bit if possible.Timur Kristóf2020-01-241-0/+87
* etnaviv: update Android build filesMartin Fuzzey2020-01-248-2/+92
* aco: use nir_move_copiesRhys Perry2020-01-241-1/+2
* radv/aco: use ACO for GS copy shadersRhys Perry2020-01-243-4/+7
* aco: implement GS copy shadersRhys Perry2020-01-244-148/+327
* aco: remove needs_instance_idRhys Perry2020-01-242-6/+0
* aco: explicitly mark end blocks for exportsRhys Perry2020-01-243-12/+8
* radv/aco: allow ACO for GSRhys Perry2020-01-241-8/+9
* aco: implement GS on GFX7-8Rhys Perry2020-01-244-69/+186
* radv/aco,aco: implement GS on GFX9+Rhys Perry2020-01-249-141/+523
* aco: improve support for s_sendmsgRhys Perry2020-01-244-2/+79
* radv: move gs copy shader creation before other variantsRhys Perry2020-01-241-36/+36
* aco: Make a better guess at which instructions need the VCC hint.Timur Kristóf2020-01-242-1/+17
* gallium/swr: implementation of tessellation shaders compilationJan Zielinski2020-01-2416-47/+1885
* radv: Allow DCC & TC-compat HTILE with VK_IMAGE_CREATE_EXTENDED_USAGE_BIT.Bas Nieuwenhuizen2020-01-241-4/+2
* radv: Expose VK_KHR_swapchain_mutable_format.Bas Nieuwenhuizen2020-01-243-1/+3
* freedreno: Document CP_INDIRECT_BUFFER_CHAINConnor Abbott2020-01-241-0/+6
* freedreno: Document CP_UNK_A6XX_55Connor Abbott2020-01-242-23/+62
* freedreno: Document CP_COND_REG_EXEC moreConnor Abbott2020-01-243-13/+40
* ac/llvm: fix missing casts in ac_build_readlane()Samuel Pitoiset2020-01-241-6/+9
* anv/apply_pipeline_layout: Initialize the nir_builder before useJason Ekstrand2020-01-231-1/+2
* meson: Prefer 'iris' by default over 'i965'.Kenneth Graunke2020-01-231-1/+1
* drisw: Cache the depth of the X drawableAdam Jackson2020-01-233-6/+34
* turnip: Convert the rest of tu_cmd_buffer.c over to the new pack macros.Eric Anholt2020-01-231-112/+96
* turnip: Convert renderpass setup to the new register packing macros.Eric Anholt2020-01-232-182/+188
* turnip: Port krh's packing macros from freedreno to tu.Eric Anholt2020-01-234-17/+107
* freedreno: Fix OUT_REG() on address regs without a .bo supplied.Eric Anholt2020-01-232-0/+4
* freedreno: Add some missing a6xx address declarations.Eric Anholt2020-01-231-0/+5
* relnotes: Add GL_INTEL_shader_integer_functions2 and VK_INTEL_shader_integer_...Ian Romanick2020-01-231-0/+1
* lima: use imul for calculations with intrinsic srcVasily Khoruzhick2020-01-231-1/+1
* nir: don't emit ishl in _nir_mul_imm() if backend doesn't support bitopsVasily Khoruzhick2020-01-231-1/+2
* pan/decode: Rotate trace filesIcecream952020-01-233-4/+26
* pan/decode: Dump to a fileIcecream952020-01-232-1/+35
* pan/decode: Support dumping to a fileIcecream952020-01-233-19/+24
* pan/bifrost: Support disassembling to a fileIcecream952020-01-235-402/+407
* pan/midgard: Support disassembling to a fileIcecream952020-01-234-279/+279
* pan/midgard: Fix a memory leak in the disassemblerIcecream952020-01-231-0/+2
* turnip: Fix execution of secondary cmd bufs with nothing in primary.Eric Anholt2020-01-231-6/+2
* panfrost: Drop mysterious zero=0xFFFF fieldAlyssa Rosenzweig2020-01-231-13/+0
* pan/midgard: Fix bundle dynarray leakIcecream952020-01-231-1/+2
* radeonsi: separate LLVM compilation from non-LLVM codeMarek Olšák2020-01-231-20/+38
* radeonsi: change prototypes of si_is_multi_part_shader & si_is_merged_shaderMarek Olšák2020-01-233-16/+16
* radeonsi: make si_compile_shader return boolMarek Olšák2020-01-233-21/+18
* radeonsi: make si_compile_llvm return boolMarek Olšák2020-01-234-32/+32
* radeonsi: move more LLVM functions into si_shader_llvm.cMarek Olšák2020-01-233-396/+398
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