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* freedreno/ir3: post-RA sched passRob Clark2020-02-016-5/+679
* freedreno/ir3: fix kill schedulingRob Clark2020-02-012-1/+2
* freedreno/ir3/ra: make use()/def() functions instead of macrosRob Clark2020-02-011-15/+24
* freedreno/ir3: a bit more optmsgs debugRob Clark2020-02-011-0/+10
* freedreno/ir3: move atomic fixup after RARob Clark2020-02-013-28/+38
* freedreno/ir3: move block-scheduling into legalizeRob Clark2020-02-014-49/+45
* freedreno/ir3: move nop padding to legalizeRob Clark2020-02-015-85/+74
* freedreno/ir3: split out delay helpersRob Clark2020-02-015-183/+350
* freedreno/ir3: fix crash when no non-input instructionsRob Clark2020-02-011-1/+1
* freedreno/ir3: cleanup after lower_locals_to_regsRob Clark2020-02-011-8/+17
* freedreno/ir3: shuffle a few ir3_register fieldsRob Clark2020-02-011-14/+16
* intel/gen12+: Set way_size_per_bank to 4Anuj Phogat2020-01-311-1/+1
* intel/gen12+: Reserve 4KB of URB space per bank for Compute EngineAnuj Phogat2020-01-311-1/+19
* virgl: Use align_free for align_malloc allocated bufferSzymon Andrzejuk2020-02-011-1/+1
* freedreno/drm: readonly cmdstreamRob Clark2020-01-314-16/+11
* intel/fs: Write the address register with NoMask for MOV_INDIRECTJason Ekstrand2020-01-311-0/+9
* intel/tools: Handle strides better when dumping buffersJason Ekstrand2020-01-311-2/+5
* intel/disasm: SEND has two sources on Gen12+Jason Ekstrand2020-01-311-2/+4
* intel/eu/validate: Don't validate regions of sendsJason Ekstrand2020-01-311-3/+3
* aco: fix image_atomic_cmp_swapDaniel Schürmann2020-01-312-2/+3
* aco: fix MUBUF VS input loads when expanding vec3 to vec4 on GFX6Samuel Pitoiset2020-01-311-1/+6
* gallium/swr: Fix gcc 4.8.5 compile errorKrzysztof Raszkowski2020-01-311-6/+5
* swr: Fix build with GCC 10.Vinson Lee2020-01-311-1/+3
* gallium/swr: fix gcc warningsKrzysztof Raszkowski2020-01-318-32/+34
* zink: implement support for derivative-controlErik Faye-Lund2020-01-312-0/+8
* zink: implement load_instance_idErik Faye-Lund2020-01-312-3/+22
* zink: enable texture-buffer objectsErik Faye-Lund2020-01-311-0/+6
* radeonsi: Add support for midstream bitrate change in encoderZhang, Boyuan2020-01-312-1/+17
* panfrost: Use DBG macro to avoid noise in the consoleTomeu Vizoso2020-01-316-11/+10
* pan/midgard: Handle nir_intrinsic_load_barycentric_centroidTomeu Vizoso2020-01-311-1/+2
* panfrost: Add more info to some assertionsTomeu Vizoso2020-01-312-7/+13
* panfrost: Print intended field when decodingTomeu Vizoso2020-01-311-1/+1
* anv: Always fill out the AUX table even if CCS is disabledJason Ekstrand2020-01-303-16/+18
* iris: Plumb deref block size through to 3DSTATE_SFJason Ekstrand2020-01-302-6/+10
* anv: Plumb deref block size through to 3DSTATE_SFJason Ekstrand2020-01-304-11/+18
* intel/blorp: Plumb deref block size through to 3DSTATE_SFJason Ekstrand2020-01-302-7/+11
* intel/common: Return the block size from get_urb_configJason Ekstrand2020-01-306-6/+54
* anv: Emit URB setup earlierJason Ekstrand2020-01-301-2/+2
* iris: Consolodate URB emitJason Ekstrand2020-01-303-36/+15
* intel/blorp: Always emit URB config on Gen7+Jason Ekstrand2020-01-304-46/+68
* intel: Take a gen_l3_config in gen_get_urb_configJason Ekstrand2020-01-305-22/+13
* i965: Re-emit l3 state before BLORP executesJason Ekstrand2020-01-303-3/+7
* iris: Use the URB size from the L3$ configJason Ekstrand2020-01-303-5/+2
* iris: Store the L3$ configs in the screenJason Ekstrand2020-01-303-14/+21
* iris: Set SLMEnable based on the L3$ configJason Ekstrand2020-01-301-4/+4
* intel/genxml: Drop SLMEnable from L3CNTLREG on Gen11Jason Ekstrand2020-01-304-4/+4
* anv,iris: Set 3DSTATE_SF::DerefBlockSize to per-poly on Gen12+Jason Ekstrand2020-01-303-1/+13
* genxml: Add a new 3DSTATE_SF field on gen12Jason Ekstrand2020-01-301-0/+5
* docs/release-calendar: 20.0.0-rc1 has been releasedDylan Baker2020-01-301-7/+1
* turnip: Fix vkCmdCopyQueryPoolResults with available flag20.0-branchpointBrian Ho2020-01-301-46/+52
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