aboutsummaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* iris: Honor scanout requirement from DRIDanylo Piliaiev2020-06-251-1/+1
| | | | | | | | | | | | | | | | Translate PIPE_BIND_SCANOUT as ISL_SURF_USAGE_DISPLAY_BIT, instead of PIPE_BIND_DISPLAY_TARGET. PIPE_BIND_DISPLAY_TARGET isn't used for dri images and seem to be set only for fake winsys buffers (which aren't displayed). The trouble is that a fake buffer could be multisampled and we cannot have multisampled surface with display bit. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2313 Signed-off-by: Danylo Piliaiev <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4784>
* vulkan/overlay: fix crash on destroying NULL swapchainPavel Asyutchenko2020-06-251-0/+6
| | | | | | Cc: <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5616>
* gitlab-ci: add parallel-rdp fossilsSamuel Pitoiset2020-06-251-1/+5
| | | | | | | | | | | | | https://github.com/Themaister/parallel-rdp These fossils contain very large and complex shaders. The small_*.foz files use 8/16-bit arithmetic. Only RADV uses Fossilize. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Andres Gomez <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5542>
* freedreno/ir3/ra: fix pre-color edge caseRob Clark2020-06-251-7/+3
| | | | | | | | | | | | | | | | Fixes a case where you have something like: aVecOutput.z = aScalarInput; In particular, skipping over things that are not the first component is wrong.. in the above case the input we need to precolor is the 3rd component. But we need to adjust the target register according to the offset. Fixes android.hardware.nativehardware.cts.AHardwareBufferNativeTests Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5601>
* turnip: disable early_z for VK_FORMAT_S8_UINTJonathan Marek2020-06-252-5/+7
| | | | | | | | | | This format doesn't have depth, and apparently having earlyz enabled can cause issues. Fixes at least these tests: dEQP-VK.renderpass.suballocation.multisample.s8_uint.samples_* Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5586>
* turnip: fix update_stencil_maskJonathan Marek2020-06-251-2/+2
| | | | | | | | | | | | | The previous value was not being cleared, resulting in some dynamic stencil state failures. Fixes these two tests: dEQP-VK.dynamic_state.ds_state.stencil_params_advanced dEQP-VK.dynamic_state.ds_state.stencil_params_basic_1 Fixes: 233610f8cf8d8810 ("turnip: refactor draw states and dynamic states") Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5586>
* turnip: fix empty scissor caseJonathan Marek2020-06-251-7/+11
| | | | | | | | | Fixes these two tests: dEQP-VK.draw.scissor.empty_dynamic_scissor_first_draw dEQP-VK.draw.scissor.empty_static_scissor Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5586>
* freedreno: handle batch flush in resource trackingRob Clark2020-06-251-4/+30
| | | | | | | | | | | | | | | In rare cases, we can get into situations where the tracking of read/ written resources triggers a flush of the current batch. To handle that, (1) take a reference to the current batch, so it doesn't disappear under us, and (2) check after resource tracking whether the current batch was flushed. If it is, we have to re-do the resource tracking, but since we have a fresh batch, it should not get flushed the second time around. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3160 Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5634>
* freedreno: split out batch clear tracking helperRob Clark2020-06-251-15/+25
| | | | | Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5634>
* freedreno: split out batch draw tracking helperRob Clark2020-06-251-72/+82
| | | | | Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5634>
* freedreno: make foreach_bit() declare it's cursorRob Clark2020-06-255-5/+3
| | | | | Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5634>
* turnip: implement VK_EXT_vertex_attribute_divisorJonathan Marek2020-06-253-2/+29
| | | | | Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5640>
* docs: fix 20.1.2 relnotesEric Engestrom2020-06-251-0/+17
| | | | | | | | | I manually converted them from html and didn't double-check the result... Fixes: e94f81e9df8f038813a4 ("docs: Add release notes for 20.1.2") Signed-off-by: Eric Engestrom <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5639>
* docs: update calendar and link releases notes for 20.1.2Eric Engestrom2020-06-242-3/+3
| | | | Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5638>
* docs: Add release notes for 20.1.2Eric Engestrom2020-06-241-0/+116
| | | | Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5638>
* freedreno/ir3: switch PIPE_CAP_TGSI_TEXCOORDRob Clark2020-06-243-6/+11
| | | | | | | | | | | | We don't really need the varying remapping, and it seems to somehow happen twice when shader-cache comes into the picture. But we can just choose not to have this problem. Now that everything is using the ir3_point_sprite() helper, we can flip this pipe cap without it being a massive flag-day. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5595>
* freedreno: convert builtin blit VS prog to ureg builderRob Clark2020-06-241-17/+43
| | | | | | | | | The correct varying semantic to use depends on PIPE_CAP_TGSI_TEXCOORD. To handle this transition switch it over to ureg builder, and query the pipe-cap to choose the appropriate semantic. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5595>
* freedreno/a3xx: use point-coord helperRob Clark2020-06-241-33/+25
| | | | | Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5595>
* freedreno/a4xx: use point-coord helperRob Clark2020-06-241-33/+25
| | | | | Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5595>
* freedreno/a5xx: use point-coord helperRob Clark2020-06-241-33/+25
| | | | | Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5595>
* freedreno/a6xx: use point-coord helperRob Clark2020-06-241-33/+25
| | | | | Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5595>
* freedreno/a6xx: de-duplicate vinterp/vpsrepl state buildingRob Clark2020-06-241-92/+71
| | | | | | | | | | | When we flip the texcoord patch, we'll setup PNTC input slot in the pre-built interp stateobj, rather than this being a draw-time (slow- path) built stateobj. But rather than duplicate more of the slow- path logic, refactor it out into a helper that is reused in both cases. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5595>
* freedreno/ir3: add helper to determine point-coord inputsRob Clark2020-06-242-2/+18
| | | | | | | | | This will simplify a bit the logic for setting up vinterp/vprepl in the driver backend, and also avoid it being a flag-day when we switch the texcoord pipe cap. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5595>
* turnip: move some logic out of create_render_pass_commonJonathan Marek2020-06-241-30/+19
| | | | | | | | | CreateRenderPass2 is the common path now, it doesn't make sense to have a create_render_pass_common. Rename it to tu_render_pass_gmem_config and move logic not related to gmem config out of it. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5451>
* turnip: use RenderPassCreateInfo for render_pass_add_implicit_depsJonathan Marek2020-06-242-81/+66
| | | | | | | | | This gets rid of the some unnecessary values that were stored in tu_render_pass for this. It also makes the render_pass_add_implicit_deps more generic, with very few references to the tu_render_pass. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5451>
* turnip: replace a memset(0) with zalloc in CreateRenderPassJonathan Marek2020-06-241-2/+1
| | | | | Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5451>
* turnip: translate CreateRenderPass to CreateRenderPass2Jonathan Marek2020-06-241-132/+106
| | | | | | | | | | | It doesn't cut down the code size by much, and might not be the ideal for performance (unless the compiler is unexpectedly smart), but makes it easier to maintain (no modifying the same code in two places) and will allow some simplifications since we wont have to worry about trying to share code between the two versions. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5451>
* turnip: implement depthBoundsJonathan Marek2020-06-243-6/+17
| | | | | Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5628>
* freedreno/registers: a6xx depth bounds test registersJonathan Marek2020-06-243-9/+11
| | | | | Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5628>
* aco: remove outdated assert in handle_operands()Rhys Perry2020-06-241-2/+0
| | | | | | | | "target" is no longer expected to be completely inside "swap". Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5626>
* aco: ignore blocked registers when checking edges in get_reg_impl()Rhys Perry2020-06-241-2/+11
| | | | | | | | | | | | | | | If the only two registers available are consecutive and used by killed operands, both of them will be blocked and fail the edge check. Totals from 903 (0.66% of 135946) affected shaders: VGPRs: 30892 -> 30884 (-0.03%) CodeSize: 1584468 -> 1584044 (-0.03%); split: -0.05%, +0.02% MaxWaves: 14374 -> 14378 (+0.03%) Instrs: 306482 -> 306399 (-0.03%); split: -0.06%, +0.03% Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5626>
* radv: fix checking the return value of cs_finalize()Samuel Pitoiset2020-06-241-1/+1
| | | | | | | | | cs_finalize() now returns a Vulkan error code and VK_SUCCESS is 0. Fixes: 64a92ef7a26 ("radv/winsys: Distinguish device/host memory errors.") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5629>
* gitlab-ci: update the list of expected failures for PitcairnSamuel Pitoiset2020-06-241-34/+0
| | | | | | | | | These tests have been fixed as part of https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207. Signed-off-by: Samuel Pitoiset <[email protected]> Acked-by: Bas Nieuwenhuizen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5625>
* radv: Make radv_alloc_shader_memory static.Bas Nieuwenhuizen2020-06-242-5/+1
| | | | | | | Just a cleanup. Reviewed-by: Samuel Pitoiset <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5578>
* radv/winsys: Distinguish device/host memory errors.Bas Nieuwenhuizen2020-06-244-17/+20
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5578>
* radv: Handle mmap failures.Bas Nieuwenhuizen2020-06-243-15/+61
| | | | | | | | Which can happen if we have to many mmaps active in the process. CC: <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5578>
* radv/winsys: Deal with realloc failures in BO lists.Bas Nieuwenhuizen2020-06-241-3/+10
| | | | | | | | Otherwise if realloc fails we silently try to use it. Make recording fail instead. CC: <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5578>
* aco: improve vectorization of 8/16-bit loads/storesRhys Perry2020-06-241-9/+3
| | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
* aco: fix when sub-dword create_vector operand cannot be placed perfectlyRhys Perry2020-06-241-15/+18
| | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
* aco: don't allow partial copies on GFX6/7Daniel Schürmann2020-06-241-1/+1
| | | | | | | These are not supported due to missing SDWA instructions Reviewed-by: Rhys Perry <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
* aco: align swap operations to 4 bytes on GFX6/7Daniel Schürmann2020-06-241-1/+5
| | | | | | | GFX6/7 can only swap full registers Reviewed-by: Rhys Perry <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
* aco: don't create byte-aligned short loadsRhys Perry2020-06-241-1/+3
| | | | | | | | | | | | The ISA docs don't seem to say if this is allowed, so just assume short loads require short alignment. In practice, the only situation this should affect are byte-aligned u8vec2 loads. Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
* aco: add missing bld.scc() in byte_align_scalar()Rhys Perry2020-06-241-1/+1
| | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
* aco: don't store byte-aligned short storesRhys Perry2020-06-241-4/+4
| | | | | | | | | The ISA docs don't seem to say if this is allowed, so just assume short stores require short alignment. Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
* aco: fix copy+paste error in split_buffer_storeRhys Perry2020-06-241-1/+1
| | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
* radv/aco,aco: allow SMEM SSBO loads on GFX6/7Rhys Perry2020-06-243-4/+3
| | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
* aco: allow SMEM for some sub-dword accessesRhys Perry2020-06-242-8/+20
| | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
* aco: only use SMEM if we can prove it's safeRhys Perry2020-06-242-7/+218
| | | | | | | | | | | | | | | | | | | | Totals from 26 (0.02% of 127638) affected shaders: SGPRs: 1680 -> 1664 (-0.95%) VGPRs: 1492 -> 1504 (+0.80%) CodeSize: 233140 -> 233016 (-0.05%); split: -0.09%, +0.04% Instrs: 47121 -> 47114 (-0.01%); split: -0.08%, +0.06% VMEM: 4930 -> 4655 (-5.58%); split: +0.12%, -5.70% SMEM: 2030 -> 2001 (-1.43%); split: +3.79%, -5.22% VClause: 891 -> 947 (+6.29%) SClause: 876 -> 816 (-6.85%) Copies: 4734 -> 4716 (-0.38%); split: -0.40%, +0.02% Branches: 2048 -> 2047 (-0.05%) PreSGPRs: 1400 -> 1396 (-0.29%) PreVGPRs: 1440 -> 1443 (+0.21%) Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
* radv: fix image variable types in meta shadersRhys Perry2020-06-244-39/+36
| | | | | | | | | We write to these variables using image intrinsics. Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
* spirv: set variables to restrict by defaultRhys Perry2020-06-243-1/+13
| | | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-02 01:38:38 +0000