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* bump version to 19.2-rc2mesa-19.2.0-rc2Dylan Baker2019-09-041-1/+1
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* glsl: replace 'x + (-x)' with constant 0Pierre-Eric Pelloux-Prayer2019-09-041-0/+12
| | | | | | | | | | | | | | This fixes a hang in shadertoy for radeonsi where a buffer was initialized with: value -= value with value being undefined. In this case LLVM replace the operation with an assignment to NaN. Cc: 19.1 19.2 <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111241 Reviewed-by: Marek Olšák <[email protected]> (cherry picked from commit 47cc660d9c19572e5ef2dce7c8ae1766a2ac9885)
* Revert "radeonsi: don't emit PKT3_CONTEXT_CONTROL on amdgpu"Thong Thai2019-09-041-7/+4
| | | | | | | | | | | | This reverts commit 5a2e65be89d97ed5d7263f0296ea69ae8517187b. Even though CONTEXT_CONTROL is emitted by the kernel, CONTEXT_CONTROL still needs to be emitted by the UMD, or else the driver will hang Cc: 19.2 <[email protected]> Signed-off-by: Thong Thai <[email protected]> Reviewed-by: Marek Olšák <[email protected]> (cherry picked from commit 2a3a5604076e94445079a0b25aa108ee99b5fcba)
* nir/range-analysis: Handle constants in nir_op_mov just like nir_op_bcselIan Romanick2019-09-041-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I discovered this while looking at a shader that was hurt by some other work I'm doing. When I examined the changes, I was confused that one instance of a comparison that was used in a discard_if was (incorrectly) eliminated, while another instance used by a bcsel was (correctly) not eliminated. I had to use NIR_PRINT=true to see exactly where things when wrong. A bunch of shaders in Goat Simulator, Dungeon Defenders, Sanctum 2, and Strike Suit Zero were impacted. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Fixes: 405de7ccb6c ("nir/range-analysis: Rudimentary value range analysis pass") All Intel platforms had similar results. (Ice Lake shown) total instructions in shared programs: 16280659 -> 16281075 (<.01%) instructions in affected programs: 21042 -> 21458 (1.98%) helped: 0 HURT: 136 HURT stats (abs) min: 1 max: 9 x̄: 3.06 x̃: 3 HURT stats (rel) min: 1.16% max: 6.12% x̄: 2.23% x̃: 2.03% 95% mean confidence interval for instructions value: 2.93 3.19 95% mean confidence interval for instructions %-change: 2.08% 2.37% Instructions are HURT. total cycles in shared programs: 367168270 -> 367170313 (<.01%) cycles in affected programs: 172020 -> 174063 (1.19%) helped: 14 HURT: 111 helped stats (abs) min: 2 max: 80 x̄: 21.21 x̃: 9 helped stats (rel) min: 0.10% max: 4.47% x̄: 1.35% x̃: 0.79% HURT stats (abs) min: 2 max: 584 x̄: 21.08 x̃: 5 HURT stats (rel) min: 0.12% max: 17.28% x̄: 1.55% x̃: 0.40% 95% mean confidence interval for cycles value: 5.41 27.28 95% mean confidence interval for cycles %-change: 0.64% 1.81% Cycles are HURT. (cherry picked from commit 7dba7df5e577b94e009848a2ca3e0b0a41629fe9)
* nir/range-analysis: Fix incorrect fadd range result for (ne_zero, ne_zero)Ian Romanick2019-09-041-3/+8
| | | | | | | | | | | | | | | | Found by inspection. I tried really, really hard to make a test case that would trigger this problem, but I was unsuccesful. It's very hard to get an instruction to produce a ne_zero result without ne_zero sources. The most plausible way is using bcsel. That proves problematic because bcsel interprets its sources as integers, so it cannot currently be used to "clean" values for floating point instructions. No shader-db changes on any Intel platform. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Fixes: 405de7ccb6c ("nir/range-analysis: Rudimentary value range analysis pass") (cherry picked from commit 0b4782fccd22b0a01ded1e4cbfe06821bdf19d05)
* nir/range-analysis: Adjust result range of multiplication to account for ↵Ian Romanick2019-09-041-31/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | flush-to-zero Fixes piglit tests (new in piglit!110): - fs-underflow-fma-compare-zero.shader_test - fs-underflow-mul-compare-zero.shader_test v2: Add back part of comment accidentally deleted. Noticed by Caio. Remove is_not_zero function as it is no longer used. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111308 Fixes: fa116ce357b ("nir/range-analysis: Range tracking for ffma and flrp") Fixes: 405de7ccb6c ("nir/range-analysis: Rudimentary value range analysis pass") Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> All Gen7+ platforms** had similar results. (Ice Lake shown) total instructions in shared programs: 16278465 -> 16279492 (<.01%) instructions in affected programs: 16765 -> 17792 (6.13%) helped: 0 HURT: 23 HURT stats (abs) min: 7 max: 275 x̄: 44.65 x̃: 8 HURT stats (rel) min: 1.15% max: 17.51% x̄: 4.23% x̃: 1.62% 95% mean confidence interval for instructions value: 9.57 79.74 95% mean confidence interval for instructions %-change: 1.85% 6.61% Instructions are HURT. total cycles in shared programs: 367135159 -> 367154270 (<.01%) cycles in affected programs: 279306 -> 298417 (6.84%) helped: 0 HURT: 23 HURT stats (abs) min: 13 max: 6029 x̄: 830.91 x̃: 54 HURT stats (rel) min: 0.17% max: 45.67% x̄: 7.33% x̃: 0.49% 95% mean confidence interval for cycles value: 100.89 1560.94 95% mean confidence interval for cycles %-change: 0.94% 13.71% Cycles are HURT. total spills in shared programs: 8870 -> 8869 (-0.01%) spills in affected programs: 19 -> 18 (-5.26%) helped: 1 HURT: 0 total fills in shared programs: 21904 -> 21901 (-0.01%) fills in affected programs: 81 -> 78 (-3.70%) helped: 1 HURT: 0 LOST: 0 GAINED: 1 ** On Broadwell, a shader was hurt for spills / fills instead of helped. No changes on any earlier platforms. (cherry picked from commit ef2e235252ea3dbadad79bb48c760bb6c376b97c)
* nir/range-analysis: Adjust result range of exp2 to account for flush-to-zeroIan Romanick2019-09-041-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes piglit tests (new in piglit!110): - fs-underflow-exp2-compare-zero.shader_test Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111308 Fixes: 405de7ccb6c ("nir/range-analysis: Rudimentary value range analysis pass") Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Most of the shaders affected are, unsurprisingly, in Unigine Heaven. All Gen6+ platforms had similar results. (Ice Lake shown) total instructions in shared programs: 16278207 -> 16278465 (<.01%) instructions in affected programs: 11374 -> 11632 (2.27%) helped: 0 HURT: 58 HURT stats (abs) min: 2 max: 13 x̄: 4.45 x̃: 4 HURT stats (rel) min: 0.54% max: 4.11% x̄: 2.42% x̃: 2.82% 95% mean confidence interval for instructions value: 3.77 5.13 95% mean confidence interval for instructions %-change: 2.19% 2.64% Instructions are HURT. total cycles in shared programs: 367134284 -> 367135159 (<.01%) cycles in affected programs: 81207 -> 82082 (1.08%) helped: 17 HURT: 36 helped stats (abs) min: 6 max: 356 x̄: 90.35 x̃: 6 helped stats (rel) min: 0.69% max: 21.45% x̄: 5.71% x̃: 0.78% HURT stats (abs) min: 4 max: 235 x̄: 66.97 x̃: 16 HURT stats (rel) min: 0.35% max: 27.58% x̄: 5.34% x̃: 1.09% 95% mean confidence interval for cycles value: -20.36 53.38 95% mean confidence interval for cycles %-change: -1.08% 4.67% Inconclusive result (value mean confidence interval includes 0). No changes on any earlier platforms. (cherry picked from commit 33ad2bab4bcb52c0f6be56e2f9cce5f52601a4ea)
* nir/algebraic: Mark some value range analysis-based optimizations impreciseIan Romanick2019-09-041-9/+13
| | | | | | | | | | | | | | | | | | | This didn't fix bug #111308, but it was found will trying to find the actual cause of that bug. Fixes piglit tests (new in piglit!110): - fs-fract-of-NaN.shader_test - fs-lt-nan-tautology.shader_test - fs-ge-nan-tautology.shader_test No shader-db changes on any Intel platform. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111308 Fixes: b77070e293c ("nir/algebraic: Use value range analysis to eliminate tautological compares") Reviewed-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> (cherry picked from commit ccb236d1bc6375bdf9bc47550bdfa348ea7369b9)
* iris: Fix partial fast clear checks to account for miplevel.Kenneth Graunke2019-09-041-2/+2
| | | | | | | | | | | | | | | We enabled fast clears at level > 0, but didn't minify the dimensions when comparing the box size, so we always thought it was a partial clear and as a result never actually enabled any. This eliminates some slow clears in Civilization VI, but they are mostly during initialization and not the main rendering. Thanks to Dan Walsh for noticing we had too many slow clears. Fixes: 393f659ed83 ("iris: Enable fast clears on other miplevels and layers than 0.") Reviewed-by: Rafael Antognolli <[email protected]> (cherry picked from commit 30b9ed92ea423a4857023ca5e2222ae409672fa5)
* intel/compiler: Request bitfield_reverse lowering on pre-Gen7 hardwareIan Romanick2019-09-041-0/+1
| | | | | | | | | | | See the previous commit for the explanation of the Fixes tag. Hurts 21 shaders in shader-db. All of the hurt shaders are in Unreal Engine 4 tech demos. Reviewed-by: Matt Turner <[email protected]> Fixes: 7afa26d4e39 ("nir: Add lowering for nir_op_bitfield_reverse.") (cherry picked from commit b418269d7dd576a7c9afd728bf8a883b4da98b30)
* nir/algrbraic: Don't optimize open-coded bitfield reverse when lowering is ↵Ian Romanick2019-09-041-1/+1
| | | | | | | | | | | | | | | | | | | | | enabled This caused a problem on Sandybridge where an open-coded bitfieldReverse() function could be optimized to a nir_op_bitfield_reverse that would generate an unsupported BFREV instruction in the backend. This was encountered in some Unreal4 tech demos in shader-db. The bug was not previously noticed because we don't actually try to run those demos on Sandybridge. The fixes tag is a bit a lie. The actual bug was introduced about 26,000 commits earlier in 371c4b3c48f ("nir: Recognize open-coded bitfield_reverse."). Without the NIR lowering pass, the flag needed to avoid the optimization does not exist. Hopefully nobody will care to fix this on an earlier Mesa release. Reviewed-by: Matt Turner <[email protected]> Fixes: 7afa26d4e39 ("nir: Add lowering for nir_op_bitfield_reverse.") (cherry picked from commit d3fd1c761aab01e06665180ab86c9528c0b285b2)
* mesa: Fix _mesa_float_to_unorm() on 32-bit systems.Kenneth Graunke2019-09-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes the following CTS test on 32-bit systems: GTF-GL46.gtf30.GL3Tests.packed_depth_stencil.packed_depth_stencil_init It does glGetTexImage of a 16-bit SNORM image, requesting 32-bit UNORM data. In get_tex_rgba_uncompressed, we round trip through float to handle image transfer ops for clamping. _mesa_format_convert does: _mesa_float_to_unorm(0.571428597f, 32) which translated to: _mesa_lroundevenf(0.571428597f * 0xffffffffu) which produced different results on 64-bit and 32-bit systems: 64-bit: result = 0x92492500 32-bit: result = 0x80000000 This is because the size of "long" varies between the two systems, and 0x92492500 is too large to fit in a signed 32-bit integer. To fix this, we switch to the new _mesa_i64roundevenf function which always does the 64-bit operation. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104395 Fixes: 594fc0f8595 ("mesa: Replace F_TO_I() with _mesa_lroundevenf().") Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Matt Turner <[email protected]> (cherry picked from commit e18cd5452aa4434fb22105eb939843381771b91c)
* util: Add a _mesa_i64roundevenf() helper.Kenneth Graunke2019-09-041-0/+16
| | | | | | | | | | This always returns a int64_t, translating to _mesa_lroundevenf on systems where long is 64-bit, and llrintf where "long long" is needed. Fixes: 594fc0f8595 ("mesa: Replace F_TO_I() with _mesa_lroundevenf().") Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Matt Turner <[email protected]> (cherry picked from commit b59914e179a9e5930af37e7f7c0d8eafd682caff)
* radeonsi: fix scratch buffer WAVESIZE setting leading to corruptionMarek Olšák2019-09-043-31/+39
| | | | | | Cc: 19.2 19.1 <[email protected]> Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> (cherry picked from commit 360cf3c4b05679709574ef4d20b5097b0fd0be82)
* radeonsi: unbind blend/DSA/rasterizer state correctly in delete functionsMarek Olšák2019-09-041-1/+9
| | | | | | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111414 Fixes: b758eed9c37 ("radeonsi: make sure that blend state != NULL and remove all NULL checking") Cc: 19.2 <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> (cherry picked from commit f95a28d361e9dc542f49d88ccad112ca2beeedf2)
* gallivm: fix atomic compare-and-swapDave Airlie2019-09-041-0/+2
| | | | | | | | | Not sure how I missed this before, but compswap was hitting an assert here as it is it's own special case. Fixes: b5ac381d8f ("gallivm: add buffer operations to the tgsi->llvm conversion.") Reviewed-by: Roland Scheidegger <[email protected]> (cherry picked from commit 1eda49cc3de22e97a70944367d17d5afe611f3cc)
* intel/fs: grab fail_msg from v32 instead of v16 when v32->run_cs failsPaulo Zanoni2019-09-041-1/+1
| | | | | | | | | | | | | | | | | | Looks like a copy/paste error. This patch prevents a segfault when running the following on BDW: INTEL_DEBUG=no8,no16,do32 ./deqp-vk -n \ dEQP-VK.subgroups.arithmetic.compute.subgroupmin_dvec4 For the curious, the message we're getting is: CS compile failed: Failure to register allocate. Reduce number of live scalar values to avoid this. Fixes: 864737ce6cd5 ("i965/fs: Build 32-wide compute shader when needed.") Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> (cherry picked from commit 848d5e444a881a1a3ac6824f07d95988b312530b)
* isl: Don't set UnormPathInColorPipe for integer surfaces.Kenneth Graunke2019-09-041-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes dEQP-GLES3.functional.texture.specification subtests on iris: - texsubimage3d_depth.depth24_stencil8_2d_array - texsubimage3d_depth.depth32f_stencil8_2d_array - texsubimage3d_depth.depth_component32f_2d_array - texsubimage3d_depth.depth_component24_2d_array - texstorage2d.format.depth24_stencil8_2d - texstorage2d.format.depth32f_stencil8_2d - texstorage2d.format.depth_component24_2d - texstorage2d.format.depth_component32f_2d - texstorage3d.format.depth24_stencil8_2d_array - texstorage3d.format.depth32f_stencil8_2d_array - texstorage3d.format.depth_component24_2d_array - texstorage3d.format.depth_component32f_2d_array Here, something appears to be going wrong with having this bit set during blorp_copy operations for texture upload, which override the format to R8G8B8A8_UINT. AFAICT this bit should have no effect for integer surfaces, as it has to do with blending, and integer blending is not a thing. So it should be harmless to disable it. The Windows driver appears to be setting this bit universally, so I am unclear why we would need to. Perhaps they simply haven't run into this issue. Fixes: f741de236b5 ("isl: Enable Unorm Path in Color Pipe") Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 2e1be771e47adf1d06901283ffb8df0d83f28b3c)
* isl: Drop UnormPathInColorPipe for buffer surfaces.Kenneth Graunke2019-09-041-4/+0
| | | | | | | | | Jason suggested I remove this in review, and he's right. AFAICT this affects blending, and that just isn't going to happen on buffers. Fixes: f741de236b5 ("isl: Enable Unorm Path in Color Pipe") Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 1b090f065e0f39856ef4b228091f76241f1bbe2b)
* radv: fix getting the index type size for uint8_tSamuel Pitoiset2019-09-041-1/+1
| | | | | | | | | | | 16-bit and 32-bit values match hardware values but 8-bit doesn't. This fixes dEQP-VK.pipeline.input_assembly.* with 8-bit index. Fixes: 372c3dcfdb8 ("radv: implement VK_EXT_index_type_uint8") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected] (cherry picked from commit 89671ef205fa93d391e01884da48a876847a5682)
* virgl: fix format conversion for recent gallium changes.Dave Airlie2019-09-048-18/+305
| | | | | | | | | | | | | | | | | | | The virgl formats are fixed in time snapshots of the gallium ones, we just need to provide a translation table between them when we enter the hardware. This fixes a regression since Eric renumbered the gallium table. Fixes: c45c33a5a2 (gallium: Remove manual defining of PIPE_FORMAT enum values.) Bugzilla: https://bugs.freedesktop.org/111454 v1 by Dave Airlie <[email protected]> v2: virgl: Add a number of formats to the table that are used, e.g. for vertex attributes v3: cover some more missing formats from a piglit run Signed-off-by: Gert Wollny <[email protected]> (cherry picked from commit bba4d2f442f33bc68a4573a6f1f559f277d7ec51)
* radv: Change memory type order for GPUs without dedicated VRAMAlex Smith2019-09-041-3/+15
| | | | | | | | | | | | | | | | | | | | | | | | | Put the uncached GTT type at a higher index than the visible VRAM type, rather than having GTT first. When we don't have dedicated VRAM, we don't have a non-visible VRAM type, and the property flags for GTT and visible VRAM are identical. According to the spec, for types with identical flags, we should give the one with better performance a lower index. Previously, apps which follow the spec guidance for choosing a memory type would have picked the GTT type in preference to visible VRAM (all Feral games will do this), and end up with lower performance. On a Ryzen 5 2500U laptop (Raven Ridge), this improves average FPS in the Rise of the Tomb Raider benchmark by up to ~30%. Tested a couple of other (Feral) games and saw similar improvement on those as well. Signed-off-by: Alex Smith <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Cc: 19.2 <[email protected]> (Bas: CCing this to 19.2-rc due to high impact and limited complexity) (cherry picked from commit fe0ec41c4d36fd5a82e7579d89e34cce7423c4e5)
* anv: Only re-emit non-dynamic state that has changed.Rafael Antognolli2019-09-042-24/+50
| | | | | | | | | | | | | | | | | | | On commit f6e7de41d7b, we started emitting 3DSTATE_LINE_STIPPLE as part of the non-dynamic state. That gets re-emitted every time we bind a new VkPipeline. But that instruction is non-pipelined, and it caused a perf regression of about 9-10% on Dota2. This commit makes anv_dynamic_state_copy() return a mask with only the state that has changed when copying it. 3DSTATE_LINE_STIPPLE won't be emitted anymore unless it has changed, fixing the problem above. v2: Improve commit message and add documentation about skipped checks (Jason) Fixes: f6e7de41d7b ("anv: Implement VK_EXT_line_rasterization") Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit 2b7ba9f239c09049408d86eb71be18887691dc58)
* util: fix compilation on macosLionel Landwerlin2019-09-041-1/+1
| | | | | | | | | | | timespec_get() is not available on macos, we need to pull in the include/c11/threads_posix.h helper. Signed-off-by: Lionel Landwerlin <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103674 Fixes: e2d761de03 ("util: drop final reference to p_compiler.h") Reviewed-by: Eric Engestrom <[email protected]> (cherry picked from commit 9d3fc737afcb98e3882b4d54c9d093980cfb4874)
* radv: additional query fixesAndres Rodriguez2019-09-041-7/+8
| | | | | | | | | | Make sure we read the updated data from the gpu in cases where WAIT_BIT is not set. Cc: 19.1 19.2 <[email protected] Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit a410823b3ede9ff3bf7f56ffca295d1b3d04dbad)
* iris: Fix large timeout handling in rel2abs()Kenneth Graunke2019-09-041-13/+14
| | | | | | | | | | | | ...by copying the implementation of anv_get_absolute_timeout(). Appears to fix a CTS test with 32-bit builds: GTF-GL46.gtf32.GL3Tests.sync.sync_functionality_clientwaitsync_flush Fixes: f459c56be6b ("iris: Add fence support using drm_syncobj") Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> (cherry picked from commit 7ee7b0ecbc0de098cba631b2ca0b3291c3817665)
* radv/gfx10: do not use NGG with NAVI14Samuel Pitoiset2019-09-041-0/+1
| | | | | | | Cc: 19.2 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit a4e6e59db82e61b47ef905f28dde80ae36a67d35)
* radv/gfx10: don't initialize VGT_INSTANCE_STEP_RATE_0Samuel Pitoiset2019-09-041-1/+2
| | | | | | | | | | Only gfx9 and older use it to get InstanceID in VGPR1. Ported from RadeonSI. Cc: 19.2 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit 0813c27d8d4a7e9372a8a86d970b598fc4e3bfd1)
* egl: reset blob cache set/get functions on terminateTapani Pälli2019-09-041-0/+4
| | | | | | | | | | Fixes errors seen with eglSetBlobCacheFuncsANDROID on Android when running dEQP that terminates and reinitializes a display. Fixes: 6f5b57093b3 "egl: add support for EGL_ANDROID_blob_cache" Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> (cherry picked from commit 3e03a3fc5315b488468b28aa40a7e9416f506520)
* iris: Avoid unnecessary resolves on transfer mapsKenneth Graunke2019-09-042-16/+31
| | | | | | | | | | | We were always resolving the buffer as if we were accessing it via CPU maps, which don't understand any auxiliary surfaces. But we often copy to a temporary using BLORP, which understands compression just fine. So we can avoid the resolve, and accelerate the copy as well. Fixes: 9d1334d2a0f ("iris: Use copy_region and staging resources to avoid transfer stalls") Reviewed-by: Rafael Antognolli <[email protected]> (cherry picked from commit 2d799250346331a93b21678dc5605cff74dfa3a1)
* iris: Drop copy format hacks from copy region based transfer path.Kenneth Graunke2019-09-041-16/+5
| | | | | | | | | | | | | | | This doesn't work for compressed formats, as the source texture and temporary texture would have different block sizes. (Forcing the driver to always take the GPU path would expose the bug.) Instead, just use the source format for the temporary, and let blorp_copy deal with overrides. The one case where we can't do this is ASTC, because isl won't let us create a linear ASTC surface. Fall back to the CPU paths there for now. Fixes: 9d1334d2a0f ("iris: Use copy_region and staging resources to avoid transfer stalls") Reviewed-by: Rafael Antognolli <[email protected]> (cherry picked from commit 136629a1e3aace12297ff61c2ee32caa21aba99b)
* iris: Update fast clear colors on Gen9 with direct immediate writes.Kenneth Graunke2019-09-042-9/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Gen11 stores the fast clear color in an "indirect clear buffer", as a packed pixel value. Gen9 hardware stores it as a float or integer value, which is interpreted via the format. We were trying to store that in a buffer, for similarity with Icelake, and MI_COPY_MEM_MEM it from there to the actual SURFACE_STATE bytes where it's stored. This unfortunately doesn't work for blorp_copy(), which does bit-for-bit copies, and overrides the format to a CCS-compatible UINT format. This causes the clear color to be interpreted in the overridden format. Normally, we provide the clear color on the CPU, and blorp_blit.c:2611 converts it to a packed pixel value in the original format, then unpacks it in the overridden format, so the clear color we use expands to the bits we originally desired. However, BLORP doesn't support this pack/unpack with an indirect clear buffer, as it would need to do the math on the GPU. On Gen11+, it isn't necessary, as the hardware does the right thing. This patch changes Gen9 to stop using an indirect clear buffer and simply do PIPE_CONTROLs with post-sync write immediate operations to store the new color over the surface states for regular drawing. BLORP continues streaming out surface states, and handles fast clear colors on the CPU. Fixes: 53c484ba8ac ("iris: blorp using resolve hooks") Reviewed-by: Rafael Antognolli <[email protected]> (cherry picked from commit 1cd13ccee7bc2733e7a56284dc02bdb1b1c40081)
* iris: Fix broken aux.possible/sampler_usages bitmask handlingKenneth Graunke2019-09-041-5/+6
| | | | | | | | | | | | | | | | | | | | | | | For renderable surfaces, we allocate SURFACE_STATEs for each bit in res->aux.possible_usages. Sampler views use res->aux.sampler_usages. When pinning buffers, we call surf_state_offset_for_aux() to calculate the offset to the desired surface state. surf_state_offset_for_aux() took an aux_modes parameter, which should be one of those two fields. However...it was not using that parameter. It always used the broader res->aux.possible_usages field directly. One of the callers, update_clear_value(), was passing incorrect masks for this parameter. It iterated through the bits in order, using u_bit_scan(), which destructively modifies the mask. So each time we called it, the count of bits before our selected mode was 0, which would cause us to always update the SURFACE_STATE for ISL_AUX_USAGE_NONE, rather than updating each in turn. This was hidden by the earlier bug where surf_state_offset_for_aux() ignored the parameter. Fixes: 7339660e803 ("iris: Add aux.sampler_usages.") Reviewed-by: Rafael Antognolli <[email protected]> (cherry picked from commit 117a0368b0cc741aec88d2538ffdebd26618a6fb)
* iris: Replace devinfo->gen with GEN_GENKenneth Graunke2019-09-041-22/+18
| | | | | | | | This is genxml, we can compile out this code. Fixes: 26606672847 ("iris/gen8: Re-emit the SURFACE_STATE if the clear color changed.") Reviewed-by: Rafael Antognolli <[email protected]> (cherry picked from commit f6c44549ee2dd0f218deea1feba3965523609406)
* pan/midgard: Fix writeout combiningAlyssa Rosenzweig2019-09-041-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | shader-db regression in the scheduler. Fixes: dff4986b1aa ("pan/midgard: Emit store_output branch just-in-time") total bundles in shared programs: 2055 -> 2019 (-1.75%) bundles in affected programs: 1055 -> 1019 (-3.41%) helped: 36 HURT: 0 helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1 helped stats (rel) min: 0.35% max: 20.00% x̄: 6.71% x̃: 5.16% 95% mean confidence interval for bundles value: -1.00 -1.00 95% mean confidence interval for bundles %-change: -8.45% -4.97% Bundles are helped. total quadwords in shared programs: 3444 -> 3408 (-1.05%) quadwords in affected programs: 1897 -> 1861 (-1.90%) helped: 36 HURT: 0 helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1 helped stats (rel) min: 0.19% max: 14.29% x̄: 3.97% x̃: 2.99% 95% mean confidence interval for quadwords value: -1.00 -1.00 95% mean confidence interval for quadwords %-change: -5.08% -2.86% Quadwords are helped. Signed-off-by: Alyssa Rosenzweig <[email protected]> (cherry picked from commit 272ce6f5a7cd646be495f1d71918476e94b29c4b)
* radv: Disable NGG for geometry shaders.Bas Nieuwenhuizen2019-09-041-0/+20
| | | | | | | | | A bunch of remaining issues including some that affect users. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111248 Fixes: ee21bd7440c "radv/gfx10: implement NGG support (VS only)" Reviewed-by: Samuel Pitoiset <[email protected]> (cherry picked from commit c037fe5ad1b3556809e5a549306a52a8a8bd1cbf)
* util/timespec: use unsigned 64 bit integers for nsec valuesLionel Landwerlin2019-09-042-35/+18
| | | | | | | | | | | | | | | | We added this utility for vulkan where all timeouts are given as uint64_t values. We can switch from signed to unsigned as this is the only user and if we ever deal with signed integers somewhere else we'll have to be careful to use the corresponding timespec_(add|sub)_msec and always pass absolute values. v2: Forgot to drop the test calling add_nsec() with a negative number Signed-off-by: Lionel Landwerlin <[email protected]> Reported-by: Juan A. Suarez Romero <[email protected]> Fixes: d2d70c3bb5 ("util: add a timespec helper") Acked-by: Daniel Stone <[email protected]> (cherry picked from commit 5833f433055cbc259bfe53286a6d3f6687fdd7db)
* iris/android: fix build and link with libmesa_intel_perfTapani Pälli2019-09-042-0/+2
| | | | | | | Fixes: 0fd4359733e "iris/perf: implement routines to return counter info" Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> (cherry picked from commit 728ebcdec2bfc38f28fd7feb3b89194c64287ac6)
* ac: fix exclusive scans on GFX8-GFX9Samuel Pitoiset2019-09-041-4/+3
| | | | | | | | | | | | | This fixes a regression introduced with scan&reduce operations on GFX10. Note that some subgroups CTS still fail on GFX10 but I assume it's a different issue. This fixes dEQP-VK.subgroups.arithmetic.*.subgroupexclusive*. Fixes: 227c29a80de "amd/common/gfx10: implement scan & reduce operations" Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit 2d9f401a830693cd2a97a25ee49c0671606b1878)
* util: fix os_create_anonymous_file on androidTapani Pälli2019-09-041-4/+5
| | | | | | | | | Commit fixes current crashes with Vulkan applications on Android. Fixes: c0376a123418 "util: add anon_file.h for all memfd/temp file usage" Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> (cherry picked from commit ce8fd042a5b0130cc5c62981828b122127711712)
* gallium/noop: Implement resource_get_paramKenneth Graunke2019-09-041-0/+23
| | | | | | | | v2: Pass through to oscreen rather than faking it (review from Marek). Fixes: 0346b700833 ("gallium/screen: Add pipe_screen::resource_get_param") Reviewed-by: Marek Olšák <[email protected]> (cherry picked from commit bc844d92ce0fd000a85c370ecef27ad42a27cf14)
* gallium/rbug: Wrap resource_get_param if availableKenneth Graunke2019-09-041-0/+17
| | | | | | | Fixes: 0346b700833 ("gallium/screen: Add pipe_screen::resource_get_param") Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Marek Olšák <[email protected]> (cherry picked from commit f02d1a0b75c72f600ecdd73020673e4bec015153)
* gallium/trace: Wrap resource_get_param if availableKenneth Graunke2019-09-041-0/+16
| | | | | | | Fixes: 0346b700833 ("gallium/screen: Add pipe_screen::resource_get_param") Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Marek Olšák <[email protected]> (cherry picked from commit c43a44791bfce12da6fb86e05a29fc819c1c1878)
* gallium/ddebug: Wrap resource_get_param if availableKenneth Graunke2019-09-041-0/+13
| | | | | | | Fixes: 0346b700833 ("gallium/screen: Add pipe_screen::resource_get_param") Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Marek Olšák <[email protected]> (cherry picked from commit 0e6b573ae57da2fd15891c7e9d2a9024203aa507)
* mesa: recover target_check before get_current_tex_objectsJose Maria Casanova Crespo2019-09-041-7/+7
| | | | | | | | | | | | | | | | | | At compressed_tex_sub_image we only can obtain the tex_object after compressed_subtexture_target_check is validated for TEX_MODE_CURRENT. So if the target is wrong the error is raised to the user. This completes the fix for the regression introduced on "mesa: refactor compressed_tex_sub_image function" of the pending failing tests: dEQP-GLES3.functional.negative_api.texture.compressedtexsubimage3d dEQP-GLES31.functional.debug.negative_coverage.get_error.texture.compressedtexsubimage3d v2: Fix warning that texObj might be used uninitialized (Gert Wollny) Fixes: 7df233d68dc ("mesa: refactor compressed_tex_sub_image function") Reviewed-By: Gert Wollny <[email protected]> (cherry picked from commit 74a7e3ed3b297f441b406ff62ef9ba504ba3b06c)
* radv: force enable VK_AMD_shader_ballot for Wolfenstein YoungbloodSamuel Pitoiset2019-09-041-0/+8
| | | | | | | | | | | | | | | This gives a nice boost, +20% at this time on my Vega 56. Shader ballot should be enabled by default at some point but it reduces performance a bit (-6%) with Wolfeinstein II. Enable it only for Youngblood at the moment, like what we did for Talos in the past. As a bonus point, it gets rid of some minor artifacts that only happens when ballot is disabled for some reasons. Cc: 19.2 <[email protected] Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit a6ad9e8ccf970a0da68508eb2ce26b316045b9f0)
* radv: add a new debug option called RADV_DEBUG=noshaderballotSamuel Pitoiset2019-09-042-0/+2
| | | | | | | | | | Shader ballot will be enabled by default for Wolfenstein Youngblood. This follows what we did for sisched. Cc: 19.2 <[email protected] Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit f202ac27a99caf9009aa9d60e2e0d7f3b528e99f)
* radv: allow to enable VK_AMD_shader_ballot only on GFX8+Samuel Pitoiset2019-09-042-2/+3
| | | | | | | | | Scans aren't implemented on SI/CIK. Cc: 19.2 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit e73d863a66caac796ed5fb543a77f0b892df8573)
* nir/loop_unroll: Prepare loop for unrolling in wrapper_unrollDanylo Piliaiev2019-09-041-25/+1
| | | | | | | | | | Without loop_prepare_for_unroll loops are losing phis. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111411 Fixes: 5db98195 "nir: add loop unroll support for wrapper loops" Signed-off-by: Danylo Piliaiev <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> (cherry picked from commit 84b3ef6a96eabc28b18e8cdf1b0d61826b1a8a67)
* radv: Emit VGT_GS_ONCHIP_CNTL for tess on GFX10.Bas Nieuwenhuizen2019-09-041-0/+8
| | | | | | | | | Otherwise hangs are possible. This register was already set for GS and NGG. Fixes: 5eaed7ecfce "radv/gfx10: enable support for NAVI10, NAVI12 and NAVI14" Reviewed-by: Samuel Pitoiset <[email protected]> (cherry picked from commit e04761d0f9b5b10eed01bc4c2893070a31aa35cf)
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-01 12:26:10 +0000