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* glsl: fix gl_nir_set_uniform_initializers() for image arraysTimothy Arceri2020-02-141-1/+1
| | | | | | | | | | | | | The if was incorrectly checking for an image type on what could be an array of images. Here we change it to use the type stored in uniform storage which has already been stripped of arrays, this is what the above code for samplers does also. Fixes: 2bf91733fcb5 ("nir/linker: Set the uniform initial values") Reviewed-by: Alejandro Piñeiro <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3757> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3757>
* intel/tools: Update aubinator_error_decode.Rafael Antognolli2020-02-131-0/+2
| | | | | | | | | | "ringbuffer" is now called only "ring" in the error state. v2: Keep compatible with old error state (Lionel). v3: Also update "gtt_offset" -> "batch". Closes: https://gitlab.freedesktop.org/drm/intel/issues/1206 Reviewed-by: Lionel Landwerlin <[email protected]>
* freedreno: allow INVALID modifierRob Clark2020-02-131-0/+1
| | | | | | | | | | | | | Re-allow INVALID modifier in import path. The legacy import path (createImageFromFds()), which is used by android, uses the INVALID modifier. Previously we would ignore this and just setup the imported buffer as linear. Restore this behavior to unbreak the legacy import path. Fixes: 9891062642a freedreno/a6xx: Implement layout for DRM_FORMAT_MOD_QCOM_COMPRESSED Signed-off-by: Rob Clark <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3817> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3817>
* intel/isl: Switch to R8_UNORM format for compatiblitySagar Ghuge2020-02-131-0/+9
| | | | | | | | | | | | | | | | | | | | | | | Gen12 added CCS_E support for A8_UNORM. Intercept A8_UNORM format and switch to R8_UNORM, as both share the same aux map format encoding so they are compatible. Fixes Piglit's ext_framebuffer_multisample-formats all_samples, which was hitting an assert about A8_UNORM and R8_UINT not being CCS_E compatible formats. v2: Add gen check (Kenneth Graunke) v3: Intercept A8_UNORM and set format to R8_UNORM (Jason Ekstrand) v4: - Remove gen check and move block little bit down (Jason Ekstrand) Signed-off-by: Sagar Ghuge <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3719> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3719>
* intel/isl: Move get_format_encoding function to islSagar Ghuge2020-02-133-73/+75
| | | | | | | | | | | | | | | Move get_format_encoding function to isl and rename to isl_get_aux_map_format_encoding. v2: - Rename isl_get_aux_map_format_encoding to isl_format_get_aux_map_encoding (Jason Ekstrand) Signed-off-by: Sagar Ghuge <[email protected]> Suggested-by: Kenneth Graunke <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3719>
* Revert "gitlab-ci: disable a630 tests as mesa-cheza is down (again)"Fritz Koenig2020-02-131-6/+6
| | | | | | | This reverts commit 18657c0c0a9074d3dfc0763b396929bcf34f71b4 Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3804> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3804>
* freedreno/a6xx: fix Z24_UNORM_S8_UINT_AS_R8G8B8A8Jonathan Marek2020-02-131-1/+1
| | | | | | | | | | | | | | | CI didn't run so missed this. Note previously had : texfmt = TFMT6_Z24_UNORM_S8_UINT rbfmt = RB6_Z24_UNORM_S8_UINT_AS_R8G8B8A8 which are both now FMT6_Z24_UNORM_S8_UINT_AS_R8G8B8A8 Fixes: 18786cc7d55 ("freedreno/a6xx: use single format enum") Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3804>
* iris: add support INTEL_blackhole_renderLionel Landwerlin2020-02-134-0/+69
| | | | | | | | | | | | | | | v2: Use a software mechanism to manage blackhole state v3: s/iris_batchbuffer/iris_batch/ (Ken) v4: Fixup state transition mistake (Ken/Lionel) v5: Cleanup iris_batch_flush (Ken) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2964> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2964>
* st: add support for INTEL_blackhole_renderLionel Landwerlin2020-02-135-0/+21
| | | | | | | | | | | | | | | | Adding a new CSO proved to be fairly difficult especially because this extension affect draw/dispatch/blit alike. Instead this change passes the state of the noop into the entry points emitting the operations affected. v2: Fix assert in default pipe caps v3: Drop whitespace changes (Ken) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2964>
* i965: enable INTEL_blackhole_renderLionel Landwerlin2020-02-135-0/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v2: condition the extension on context isolation support from the kernel (Chris) v3: (Lionel) The initial version of this change used a feature of the Gen7+ command parser to turn the primitive instructions into no-ops. Unfortunately this doesn't play well with how we're using the hardware outside of the user submitted commands. For example resolves are implicit operations which should not be turned into no-ops as part of the previously submitted commands (before blackhole_render is enabled) might not be disabled. For example this sequence : glClear(); glEnable(GL_BLACKHOLE_RENDER_INTEL); glDrawArrays(...); glReadPixels(...); glDisable(GL_BLACKHOLE_RENDER_INTEL); While clear has been emitted outside the blackhole render, it should still be resolved properly in the read pixels. Hence we need to be more selective and only disable user submitted commands. This v3 manually turns primitives into MI_NOOP if blackhole render is enabled. This lets us enable this feature on any platform. v4: Limit support to gen7.5+ (Lionel) v5: Enable Gen7.5 support again, requires a kernel update of the command parser (Lionel) v6: Disable Gen7.5 again... Kernel devs want these patches landed before they accept the kernel patches to whitelist INSTPM (Lionel) v7: Simplify change by never holding noop (there was a shortcoming in the test not considering fast clears) Only program register using MI_LRI (Lionel) v8: Switch to software managed blackhole (BDW hangs on compute batches...) v9: Simplify the noop state tracking (Lionel) v10: Don't modify flush function (Ken) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> (v8) Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2964>
* mesa: add INTEL_blackhole_renderLionel Landwerlin2020-02-133-0/+17
| | | | | | | | | | | | | | | v2: Implement missing Enable/Disable (Emil) v3: Drop unused NewIntelBlackholeRender (Ken) v4: Bring back NewIntelBlackholeRender as i965 implementation uses it again (Lionel) v5: Drop atom (Ken) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2964>
* Revert "st/va: Convert interlaced NV12 to progressive"Thong Thai2020-02-131-51/+4
| | | | | | | | | | | This reverts commit 2add63060b51ea2ae432d10e1bd52d6cc0a4dcbb. Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2454 Fixes: 2add63060b51 "st/va: Convert interlaced NV12 to progressive" Signed-off-by: Thong Thai <[email protected]> Acked-by: Leo Liu <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3815> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3815>
* anv: Reject modifiers on depth/stencil formatsJason Ekstrand2020-02-131-3/+7
| | | | | | | | | | | | | | 6790397346cc added code which attempts to reject modifiers on depth/stencil formats but it was placed after the early return for depth and stencil aspects. This commit moves it up so it actually works. Of course, this doesn't actually matter because the only user of any of the modifiers stuff is the WSI code and it will never do anything with depth/stencil. Reviewed-by: Lionel Landwerlin <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3794> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3794>
* gallium/swr: fix rdtsc debug statistics mechanismKrzysztof Raszkowski2020-02-139-58/+44
| | | | | | Reviewed-by: Jan Zielinski <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3812> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3812>
* gitlab-ci: remove load_store_vectorizer from expected s390x test failuresRhys Perry2020-02-131-1/+0
| | | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3690> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3690>
* nir: fix nir_const_value_as_uint bit size in load/store vectorizer testsRhys Perry2020-02-132-4/+6
| | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3690>
* Revert "nir: Add a couple trivial abs optimizations"Erik Faye-Lund2020-02-131-2/+0
| | | | | | | | | | | | | These were already added in 9fdaeb7776c ("nir: add min/max optimisation"), and there's no point in doing them twice. This reverts commit e4d346c86db0ae332fcdf55eac0e075cfb99a7eb. Fixes: e4d346c86db ("nir: Add a couple trivial abs optimizations") Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3786> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3786>
* iris: fix aux buf map failure in 32bits app on AndroidTapani Pälli2020-02-131-8/+9
| | | | | | | | | Cc: [email protected] Reported-by: Zhifang Long <[email protected]> Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3784> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3784>
* radv: remove unused RADV_HASH_SHADER_IS_GEOM_COPY_SHADERSamuel Pitoiset2020-02-131-6/+5
| | | | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3789> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3789>
* radv: remove RADV_DEBUG=nosisched and RADV_PERFTEST=sischedSamuel Pitoiset2020-02-136-47/+32
| | | | | | | | They are no longer useful. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3789>
* radv: remove LLVM sicheduler enable for The Talos PrincipleSamuel Pitoiset2020-02-131-9/+1
| | | | | | | | | | sisched is completely unmaintained, it used to give few more FPS in the past but with ACO, it's now obsolete. It seems even faster without sisched now. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3789>
* glsl: fix a memory leak with resource_setTapani Pälli2020-02-131-1/+3
| | | | | | | | | | | | | | | | | ==7265== 248 (120 direct, 128 indirect) bytes in 1 blocks are definitely lost in loss record 1,438 of 1,465 ==7265== at 0x483980B: malloc (vg_replace_malloc.c:309) ==7265== by 0x598A2AB: ralloc_size (ralloc.c:119) ==7265== by 0x598F861: _mesa_set_create (set.c:127) ==7265== by 0x599079D: _mesa_pointer_set_create (set.c:570) ==7265== by 0x58BD7D1: build_program_resource_list(gl_context*, gl_shader_program*, bool) (linker.cpp:4026) ==7265== by 0x548231B: st_link_shader (st_glsl_to_ir.cpp:170) ==7265== by 0x54DA269: _mesa_glsl_link_shader (ir_to_mesa.cpp:3119) Fixes: a6aedc66 ("st/glsl_to_nir: use nir based program resource list builder") Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3574> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3574>
* radv: implement VK_EXT_line_rasterizationSamuel Pitoiset2020-02-135-7/+112
| | | | | | | | | | Only Bresenham lines are supported. GFX9 is currently disabled because there is some CTS failures for some weird reasons. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2982> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2982>
* radv: fix line width range and granularitySamuel Pitoiset2020-02-131-2/+2
| | | | | | | | The hardware supports wide lines and the granularity is way larger. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2982>
* tu: Force sysmem with mipmapped non-aligned linear storesConnor Abbott2020-02-122-1/+65
| | | | | | | | | Fixes hangs with dEQP-VK.api.image_clearing.core.clear_color_image.1d.linear.single_layer.r8g8b8a8_unorm and many others on a640, and presumably silent corruption with a630. Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
* tu: Support input attachments with sysmemConnor Abbott2020-02-121-12/+34
| | | | Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
* tu: Support resolve ops with sysmem renderingConnor Abbott2020-02-121-12/+98
| | | | | | | | | Similar to vkCmdClearAttachments(), we use CP_COND_REG_EXEC to conditionally execute both the gmem and sysmem paths, except for after the last subpass where it's known whether we're using sysmem rendering or not. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
* tu: Handle vkCmdClearAttachments() with sysmemConnor Abbott2020-02-124-92/+166
| | | | Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
* tu: Add helper for CP_COND_REG_EXECConnor Abbott2020-02-121-0/+40
| | | | Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
* tu: Sysmem renderingConnor Abbott2020-02-123-18/+240
| | | | | | | | | | This has only lightly been tested. It passes dEQP-VK.api.smoke.triangle, so at least we're able to show a triangle. For now, it's just enabled under a debug flag. In the future we'll probably want some heuristics like what freedreno has and another debug flag to disable it except when it's forced. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
* tu: Disable linear depth attachmentsConnor Abbott2020-02-121-10/+44
| | | | | | Also, disable importing depth/stencil textures. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
* tu: Support multisample image clearsConnor Abbott2020-02-121-1/+6
| | | | | | | | | | | We may need shader workarounds for some formats, but for now this seems to work at least as well as the gmem path for clearing multisample attachments. And soon we'll start calling this even on the gmem path, since we leave the final decision of whether to use sysmem or not up till the end, so we can't have it assert or otherwise working tests would assert. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
* tu/blit: Support blits in secondary cmdstreamsConnor Abbott2020-02-127-34/+36
| | | | | | | For sysmem rendering we'll have to emit a delayed clear IB to implement LOAD_OP_*, similar to the existing tile_load_ib. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
* tu: Properly set UBWC flags in RB_RENDER_CNTLConnor Abbott2020-02-121-5/+38
| | | | Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
* tu: Don't emit initial render target state in tile_load_ibConnor Abbott2020-02-121-6/+13
| | | | | | | Emitting it directly in CmdBeginRenderPass should be around the same, except that now we can easily share it with the sysmem path. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
* radeonsi: make si_fence_server_signal flush pipe without workPeng Huang2020-02-121-0/+4
| | | | | | | | | | | glSignalSemaphoreEXT sometime doesn't signal the semaphore, it is because radeonsi doesn't flush if gl context doesn't have pending work. Fix the porblem by always submit ib. Reviewed-by: Marek Olšák <[email protected]> Cc: 19.3 20.0 <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3779> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3779>
* turnip: Add a618 supportChad Versace2020-02-121-0/+8
| | | | | | | | | | | | | | | | | | | | | | | I merely ported a freedreno patch to turnip which updates some magic regsiter values. commit ff6e148a3d60e6e7f3b33f134228b1ed4216903e Author: Rob Clark <[email protected]> CommitDate: Tue Oct 29 09:19:34 2019 -0700 Subject: freedreno/a6xx: add a618 support That's all that Rob did for gallium for a618, so I assume that's we need for turnip also. Tested manually with: dEQP-VK.api.image_clearing.core.clear_color_image.2d.linear.single_layer.* pass 300/555 fail 0/555 skip 255/555 Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3743> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3743>
* turnip: Add magic register values to tu_physical_deviceChad Versace2020-02-124-6/+23
| | | | | | | | | | | | | | | The value of some magic regsiters differ across chipsets. fd6_context manages the differences by initializing them at runtime. Let's do the same. Add to tu_physical_device a subset of those found in fd6_context: RB_UNKNOWN_8E04_blit RB_CCU_CNTL_gmem PC_UNKNOWN_9805 SP_UNKNOWN_A0F8 Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3743>
* freedreno/a6xx: use single format enumJonathan Marek2020-02-1215-866/+755
| | | | | | | | | | | | | | | Loses some information about which formats can be used in which cases, but we encode that information in the format table anyway. Important notes: * RB6_R10G10B10A2_UNORM becomes FMT6_R10G10B10A2_UNORM_DEST * TFMT6_8_8_8_UNORM becomes FMT6_8_8_8_X8_UNORM (not FMT6_8_8_8_UNORM) Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3798> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3798>
* anv: Respect ISL_SURF_USAGE_DISABLE_AUX_BIT in make_surface()Chad Versace2020-02-121-3/+4
| | | | | | | | | If set, then don't make the aux surface. Only anv_android.c used the flag, but anv_image.c fully ignored it. Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3797> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3797>
* anv: Clarify behavior of anv_image_aspect_to_plane()Chad Versace2020-02-121-0/+6
| | | | | | | | It returns the aspect's _format_ plane, not its _memory_ plane (using the vocabulary of VK_EXT_image_drm_format_modifier). Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3796> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3796>
* anv: Delete anv_image::ccs_e_compatibleChad Versace2020-02-122-14/+10
| | | | | | | | | | | It was set exactly once, and read exactly once, both times during anv_image_create(). I found its permanency as a member of anv_image to be distracting while implementing VK_EXT_image_drm_format_modifier. Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3795> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3795>
* aco: improve SCC handling in some SALU combinesRhys Perry2020-02-121-6/+4
| | | | | | | | | | | Add some checks and remove some unnecessary checks. Found by observation. No pipeline-db changes. Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3599> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3599>
* aco: disable some instruction combining if it could change an exec operandRhys Perry2020-02-121-2/+13
| | | | | | | | Found by observation. No pipeline-db changes. Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3599>
* Rename nir_lower_constant_initializers to nir_lower_variable_initalizersArcady Goldmints-Orlov2020-02-1212-19/+19
| | | | | | | | | This is naming is more clear as nir_variables can be initializes not just with a nir_constant but with a pointer to another nir_variable. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3047> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3047>
* compiler/spirv: Add support for non-constant initializersArcady Goldmints-Orlov2020-02-121-7/+25
| | | | | | | | | | | | This adds support for OpVariable having an initializer that points to another variable, rather than a constant. In this case, the variable is initialized to a pointer to the other variable. Fixes Vulkan CTS tests: dEQP-VK.spirv_assembly.instruction.compute.variable_init.private.* Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3047>
* compiler/nir: Add support for variable initialization from a pointerArcady Goldmints-Orlov2020-02-128-11/+41
| | | | | | | | | | | Add a pointer_initializer field to nir_variable analogous to constant_initializer, which can be used to initialize the nir_variable to a pointer to another nir_variable. Just like the constant_initializer, the pointer_initializer gets eliminated in the nir_lower_constant_initializers pass. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3047>
* radeon/vce: Move global function pointer si_get_pic_param to local encoder ↵Veerabadhran2020-02-125-9/+6
| | | | | | | | | | structure Multi gpu use case broken when the function was global Reviewed-by: Leo Liu <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3731> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3731>
* anv: Rename param make_surface::dev to deviceChad Versace2020-02-111-22/+22
| | | | | | | | | Everywhere in anvil, each variable of type anv_device is named 'device', except this single instance. Rename it for consistency. Reviewed-by: Jason Ekstrand <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3773> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3773>
* anv: Drop unused anv_image_get_surface_for_aspect_mask()Chad Versace2020-02-112-63/+0
| | | | | | | | | | | | Replaced by anv_image.c:get_surface() in: commit a62a97933578a813beb0d27cc8e404850f7fd302 Author: Lionel Landwerlin <[email protected]> CommitDate: Fri Oct 6 16:32:20 2017 +0100 Subject: anv: enable multiple planes per image/imageView Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3773>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-12 17:59:22 +0000