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* v3d: moving v3d simulator to src/broadcomAlejandro Piñeiro2020-06-2713-44/+204
| | | | | | | | | | | | So it could be used by both the OpenGL and the Vulkan driver. In addition to the move, some small changes were needed to be made on the API. For example, the simulator was receiving v3d_screen on initialization, and that code setted v3d_screen->sim_file. Now it returns the new sim_file created. Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5666>
* turnip: Put VK_KHR_external_fence_fd stubs backKristian H. Kristensen2020-06-261-0/+19
| | | | | | | | tu_ImportFenceFdKHR is used by tu_AcquireImageANDROID, which may or may not work, but let's at least keep things compiling until somebody has time to tie up the loose ends on the Android side. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5670>
* iris: Implement pipe->texture_subdata directlyKenneth Graunke2020-06-261-1/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Chris Wilson noted that u_default_texture_subdata's transfer path sometimes results in wasteful double copies. This patch is based on an earlier path he wrote, but updated now that we have staging blits for busy or compressed textures. Consider the case of idle, non-CCS-compressed, tiled images: The transfer-based CPU path has to return a "linear" mapping, so upon map, it mallocs a temporary buffer. u_default_texture_subdata then copies the client memory to this malloc'd buffer, and transfer unmap performs a tiled_memcpy to copy it back into the texture. By writing a direct texture_subdata() implementation, we're able to directly do a tiled_memcpy from the client memory into the destination texture, resulting in only one copy. For linear buffers, there is no advantage to doing things directly, so we simply fall back to u_default_texture_subdata()'s transfer path to avoid replicating those cases. We still may want to use GPU staging buffers for busy destinations (to avoid stalls) or CCS-compressed images (to compress the data), at which point we also fall back to the existing path. We thought to try and use a tiled temporary, but this didn't appear to help. Improves performance in x11perf -shmput500 by 1.96x on my Icelake. Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2500 Reviewed-by: Tapani Pälli <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3818>
* turnip: Properly return VK_DEVICE_LOST on queuesubmit failures.Eric Anholt2020-06-264-8/+59
| | | | | | The device lost support closely matches the anv code for the same. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2769>
* turnip: Fix error handling of DRM_MSM_GEM_INFO ioctls.Eric Anholt2020-06-261-5/+11
| | | | | | | | | | | drmCommandWriteRead gives us a -errno, and we only checked for -1 (-EPERM, incidentally). All the callers wanted 0 for errors, which they were getting by the fact that req.value was 0-initialized in our stack allocation (though this only works as long as the kernel doesn't return an error after setting req.value to something), and -EPERM not really being an answer we would expect from an ioctl at this stage in the driver. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2769>
* turnip: Do better TU_DEBUG=startup logging of drmGetDevices2() failure.Eric Anholt2020-06-261-2/+6
| | | | Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2769>
* turnip: semaphore support.Bas Nieuwenhuizen2020-06-264-45/+312
| | | | | | | | | There is only one queue for now, so for non-shared semaphores, the implementation is basically a no-op. For shared semaphores, this always uses syncobjs. This depends on syncobj support in the msm kernel driver. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2769>
* ci/baremetal: Bump the kernel to a recent drm-msm-fixes for msm semaphores.Eric Anholt2020-06-264-3/+3
| | | | | | We need this to test the new VK feature we're about to land. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2769>
* aco: fix partial copies on GFX6/7Daniel Schürmann2020-06-261-2/+3
| | | | | | | | While we don't allow partial subdword copies, we still need to be able to split 64bit registers Reviewed-by: Rhys Perry <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5663>
* mapi: x86: Fix dynamic entries in x86 tsd stubs.Lepton Wu2020-06-261-8/+42
| | | | | | | | | We need to update dynamic entries related code after updating asm stubs. Fixes: 45206d7673a ("mapi: Adapted libglvnd x86 tsd changes") Signed-off-by: Lepton Wu <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5598>
* ci/bare-metal: Fail early when we get stuck powering on a cheza.Eric Anholt2020-06-261-1/+2
| | | | | | | I think I've seen about 3 of this error total so far, but waiting 60 minutes for the scripts to give up wastes marge time. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5651>
* freedreno/ir3: move nir finalization to after cache missRob Clark2020-06-262-7/+12
| | | | | | | | | In cases where every variant is a shader-cache-hit, we never need the post-finalize round of nir opt/lowering passes. So defer this until the first shader-cache-miss to avoid doing pointless work. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>
* freedreno/ir3: disk-cache supportRob Clark2020-06-268-3/+284
| | | | | | | | | | | | Adds a shader disk-cache for ir3 shader variants. Note that builds with `-Dshader-cache=false` have no-op stubs with `disk_cache_create()` that returns NULL. Binning pass variants are serialized together with their draw-pass counterparts, due to shared const-state. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>
* freedreno/ir3: build binning variant at same time as draw variantRob Clark2020-06-262-35/+76
| | | | | | | | | | | For shader-cache, we are going to want to serialize them together. Which is awkward if the two related variants are not compiled together. This also decouples allocation and compile, which will simplify adding shader-cache (which still needs to allocate, but can skip compile). Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>
* freedreno/a6xx+ir3: stop generating pointless binning shadersRob Clark2020-06-264-13/+21
| | | | | | | | | | | | Currently we always do sysmem if there is tess. And for GS, the binning pass VS ends up identical to the draw pass VS, so no point in compiling it twice. (For GS what we should do someday is generate a binning pass GS, and possibly if we can do cross-stage linking opts, an optimized binning pass VS, but the required outputs would somehow have to end up in the shader variant key.) Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>
* freedreno/ir3: shuffle some variant fieldsRob Clark2020-06-261-11/+20
| | | | | | | | Just to group together the parts that will get serialized when we have shader disk-cache. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>
* freedreno/ir3: add ir3_compiler_destroy()Rob Clark2020-06-264-4/+14
| | | | | | | | | Use ir3_compiler_destroy() rather than open-coding ralloc_free(). This will give us a place to add more compiler related cleanup code in the following patches. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>
* freedreno/ir3: move finalize_nir to pscreen hookRob Clark2020-06-268-2/+21
| | | | | Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>
* freedreno/ir3: add ir3_finalize_nir()Rob Clark2020-06-264-36/+49
| | | | | | | | | | | The next step is to hook this into pscreen->finalize_nir() so it can come before the state tracker's shader-caching. Unfortunately we still need to do lower_io after mesa/st, so that is split out into a post-finalize pass. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>
* zink: use OpFUnordNotEqual for nir_op_fneMike Blumenkrantz2020-06-261-1/+1
| | | | | | | we want to detect NaNs here, and OpFUnordNotEqual is the variant which does this Reviewed-by: Erik Faye-Lund <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>
* zink: set lower_mul_high and lower_rotate in ntv compiler optionsMike Blumenkrantz2020-06-261-0/+2
| | | | | | | we don't implement these Reviewed-by: Erik Faye-Lund <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>
* zink: handle isign alu in ntvMike Blumenkrantz2020-06-261-0/+1
| | | | | Reviewed-by: Erik Faye-Lund <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>
* zink: handle ixor in ntvMike Blumenkrantz2020-06-261-0/+1
| | | | | | | fixes [email protected]@execution@built-in-functions@fs-op-assign-bitxor tests Reviewed-by: Erik Faye-Lund <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>
* zink: lower byte/word extract ops in nirMike Blumenkrantz2020-06-261-0/+2
| | | | | | | we don't implement these, and pre-optimizing them breaks things in ntv->vtn Reviewed-by: Erik Faye-Lund <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>
* zink: add bitfield_reverse handling to ntvMike Blumenkrantz2020-06-261-0/+1
| | | | | | | fixes several piglit tests Reviewed-by: Erik Faye-Lund <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>
* zink: add ult handling for ntvMike Blumenkrantz2020-06-261-0/+1
| | | | | | | fixes shaders@glsl-vs-absolutedifference-uint piglit test Reviewed-by: Erik Faye-Lund <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>
* zink: handle signed and unsigned min/max ops in ntvMike Blumenkrantz2020-06-261-0/+4
| | | | | | | fixes a number of piglit amd_shader_trinary_minmax tests Reviewed-by: Erik Faye-Lund <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>
* radv: remove the load/store workaround for Monster Hunter World with LLVMSamuel Pitoiset2020-06-266-24/+9
| | | | | | | | Now that ACO is default, this is pointless. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5658>
* radv: remove the shader ballot workaround for Youngblood with LLVMSamuel Pitoiset2020-06-263-18/+5
| | | | | | | | Now that ACO is default, this is now pointless. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5658>
* docs: update faviconErik Faye-Lund2020-06-263-0/+8
| | | | | | | | | | | I created a new and cleaner favicon for mesa3d.org, and it seems like a good idea to use that one for the docs as well. While we're at it, replace the original PNG with the original SVG asset the ICO-file was generated from. Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5643>
* turnip: fix huge scissor min/max caseJonathan Marek2020-06-261-0/+9
| | | | | | | | | | | | Now that tu_cs_emit_regs is used for the scissor, it hits an assert when the scissor is too large. Fixes this dEQP test: dEQP-VK.draw.scissor.static_scissor_max_int32 Fixes: 9c0ae5704d654108fd36b ("turnip: fix empty scissor case") Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5655>
* turnip: fix VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_1_FEATURESJonathan Marek2020-06-261-15/+15
| | | | | | | | | | My attempt to be clever here backfired, it overwrites the pNext and stops the loop (causing deqp to fail to query extension features after that). Fixes: 62de79ac4492ac9e ("turnip: implement VK_KHR_shader_draw_parameters") Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5654>
* panfrost: Add PAN_MESA_DEBUG=gl3 flagIcecream952020-06-262-5/+22
| | | | | | | | This flag allows forcing GL 3.3 without having to use MESA_GL_VERSION_OVERRIDE etc. Reviewed-by: Tomeu Vizoso <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5584>
* freedreno/a6xx: use firstIndex fieldConnor Abbott2020-06-261-3/+2
| | | | | | Analogous to the turnip change. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5644>
* tu: Pass firstIndex directly to CP_DRAW_INDX_OFFSETConnor Abbott2020-06-262-5/+4
| | | | | | | | Saves some minor overhead, cleans things up a bit, and removes one more unknown. We now program the internal registers in the same way between direct/indirect draws. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5644>
* freedreno/registers: Label firstIndex field in CP_DRAW_INDX_OFFSETConnor Abbott2020-06-261-0/+1
| | | | | | | Based on comparing the implementations of CP_DRAW_INDX_OFFSET and CP_DRAW_INDIRECT, this is what this field is for. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5644>
* freedreno: On a5xx+ INDX_SIZE is MAX_INDICESConnor Abbott2020-06-264-16/+17
| | | | | | | | | This was already done correctly for the indirect variants, and turnip was setting the correct value, but it seems freedreno missed the change in the non-indirect variant. Also, fix a misspelling of "indices" and add a type to INDX_SIZE. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5644>
* freedreno: Share constlen between different stages properlyConnor Abbott2020-06-262-8/+42
| | | | Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5607>
* freedreno: Refactor ir3_cache shader compilationConnor Abbott2020-06-261-22/+29
| | | | | | | Use an array, which makes it more like turnip and makes implementing the const limits easier. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5607>
* tu: Share constlen between different stages properlyConnor Abbott2020-06-261-2/+23
| | | | Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5607>
* ir3: Add ir3_trim_constlen()Connor Abbott2020-06-262-0/+71
| | | | | | | This provides the policy for how to handle reducing constlen for some stages. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5607>
* ir3: Support variants with different constlen'sConnor Abbott2020-06-267-12/+83
| | | | | | | | This provides the mechanism for compiling variants with a reduced constlen. The next patch provides the policy for choosing which to reduce. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5607>
* ir3: Include ir3_compiler from ir3_shaderConnor Abbott2020-06-267-7/+8
| | | | | | | I wanted to access the ir3_compiler from a small helper inside ir3_shader.h, which currently isn't possible. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5607>
* ir3, freedreno: Round up constlen earlierConnor Abbott2020-06-268-14/+24
| | | | | | | Prevents problems when calculating whether we overflow the shared limit. Note that on a6xx, the macros handle the assert for us. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5607>
* v3d/compiler: don't rewrite unused temporaries to point to NOP registerIago Toral Quiroga2020-06-261-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This was assuming that unused temporaries are written but never read, since the NOP register can only be used as a destination register, but we can end up here also for temporaries that are read once but never written. This was found with a graphicsfuzz test that has a switch with cases that have unreachable discards. In that test, NIR genrates code like this: decl_reg vec3 32 r19 ... r20 = mov r19.z r21 = mov r19.y r22 = mov r19.x Where r19.xyz would generate 3 temporary registers that are read but never written, so we would rewrite them to point to the NOP register as QPU instruction sources, which is not allowed and would hit an assert that expect magic reads to be from [r0,r5] only. Fixes: dEQP-VK.graphicsfuzz.unreachable-switch-case-with-discards Reviewed-by: Alejandro Piñeiro <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5645>
* v3d: Use stvpmd for non-uniform offsets in GSNeil Roberts2020-06-261-1/+12
| | | | | | | | | | | | | | The offset for the VPM write for storing outputs from the geometry shader isn’t necessarily uniform across all the lanes. This can happen if some of the lanes don’t emit some of the vertices. In that case the offset for the subsequent vertices will be different in each lane. In that case we need to use the stvpmd instruction instead of stvpmv because it will scatter the values out. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3150 Reviewed-by: Iago Toral Quiroga <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5621>
* v3d: Add missing macro for stvpmd instructionNeil Roberts2020-06-261-0/+1
| | | | | | | | stvpmd is like stvpmv but it scatters the output. It can be used with non-dynamically uniform offsets. Reviewed-by: Iago Toral Quiroga <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5621>
* radeonsi: remove tabsMarek Olšák2020-06-269-56/+56
| | | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
* radeonsi: clear per-context buffers at the end of si_create_contextMarek Olšák2020-06-261-5/+11
| | | | | | | We don't want any packets before CONTEXT_CONTROL. Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
* radeonsi: make si_pm4_cmd_begin/end static and simplify all usagesMarek Olšák2020-06-264-15/+8
| | | | | | | There is no longer the confusing trailing si_pm4_cmd_end call. Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-02 19:00:12 +0000