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* panfrost: Preload gl_FragCoord on BifrostAlyssa Rosenzweig2020-05-291-1/+4
| | | | | | | | It's a precoloured register but we do need to specify in the cmdstream that we want the preloading to happen. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5267>
* panfrost: Set reads_frag_coord as a sysvalAlyssa Rosenzweig2020-05-291-0/+3
| | | | | | | | In addition to parsing out the varying. This is needed so it works on Bifrost as well. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5267>
* panfrost: Don't generate gl_FragCoord varying on BifrostAlyssa Rosenzweig2020-05-291-5/+7
| | | | | | | It's treated as a sysval there, so that's silly. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5267>
* freedreno/a6xx: fix vsc assertRob Clark2020-05-291-2/+1
| | | | | | | | | Fixes a debug build assert seeing with an android app. Not quite sure which path was passing us draw_info w/ instance_count==0. But we should just treat non-instanced draws as having a single instance. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5091>
* freedreno/a6xx: Program VFD_DEST_CNTL from program stateobjKristian H. Kristensen2020-05-292-19/+14
| | | | | | This only depends on the generated shader. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5140>
* freedreno/a6xx: Create stateobj for VFD_DECODEKristian H. Kristensen2020-05-295-23/+71
| | | | | | | This now only depends on vertex state and we can create it once up front in pctx->create_vertex_elements_state(). Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5140>
* freedreno/a6xx: Decouple VFD_FETCH and VFD_DECODEKristian H. Kristensen2020-05-291-22/+14
| | | | | | | | | | | We used to output a VFD_FETCH entry for each VFD_DECODE, but we can instead output just one VFD_FETCH per VBO and point multiple VFD_DECODE entries at the same VFD_FETCH entry. There's typically fewer VBOs than vertex elements so this is a small win in itselfs, but more importantly, the VFD_DECODE state now only depends on program state. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5140>
* freedreno/a6xx: Move per element offset to VFD_DECODEKristian H. Kristensen2020-05-291-1/+2
| | | | Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5140>
* ci: Rename x86_cross_arm_test to just arm_test.Eric Anholt2020-05-292-8/+8
| | | | | | | | | This gets us back to the behavior we used to have for freedreno: clicking play on arm_test gets you testing of the ARM platforms that aren't under arm-build (the LAVA runners). Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5247>
* ci: Don't build an arm_test container now that the last user is gone.Eric Anholt2020-05-292-88/+0
| | | | | | | db410c and cheza used to use it, and now both are on baremetal. Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5247>
* ci: Switch cheza (freedreno a630) testing to baremetal.Eric Anholt2020-05-291-22/+40
| | | | | | | | | | | | | | | | | | | | | | | | Now that we have scripts in place to do baremetal testing of cheza, switch it over. As of this writing, we have 5 chezas for baremetal and 4 for the old docker CI setup (just 2 fewer than we originally had before this work, since some had had filesystem failures and I switched those first), and once we are sure of this we can backport to stable branch CI and move the rest of them to baremetal. I've run a lot of jobs through the baremetal scripts as I worked on sorting out vulkan CTS stability, so I feel good about the stability of the GLES CTS here. The options job is now split out to separate jobs, as we don't currently have a way to stack multiple sets deqp runs with different env vars in a single baremetal run, and just chaining cros_servo.sh invocations runs into a lack of cleanup of the serial-watching scripts which we rely on container exit sorting out for us. This means a little less than 2x the artifacts downloads we had before for a630 and a few more container instantiations. Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5247>
* ci: Add scripts for controlling bare-metal chezas.Eric Anholt2020-05-295-73/+232
| | | | | | | | | | | | This will let us: - deploy kernels for testing code depending on new kernel featuers - Ensure a pristine state in the HW before starting our tests - Avoid disk rot on the chezas taking them out (we'd lost 3/9 in a few months). Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5247>
* ci: Build a cheza kernel.Eric Anholt2020-05-294-6/+50
| | | | | | | | | | | | | | | | | | This is a set of kernel options I've come up with mostly cribbing from chrome os's kernel config snippet. We also build an lzma kernel, as uncompressed kernel is big but lzma is the only compression supported by the bootloader. With that image, we have to pack it into a FIT formatted image+dtb blob. CONFIG_SUNRPC_DEBUG is added so that you can set "nfsrootdebug" to figure out what's going wrong with your nfs mount (mine were "both the tcp and nfsvers options were required, and don't try to use 'default' as the root path to defer to DHCP's answer because otherwise you get /tftpboot/default, just use an empty root path which doesn't prepend /tftpboot.") Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5247>
* ci: Disable the firmware loader user helper option in arm64 kernels.Eric Anholt2020-05-292-2/+3
| | | | | | | | We won't have a user helper, so don't block for 60 seconds for it to show up. Speeds up debug of new kernel builds. Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5247>
* radv/aco: enable VK_KHR_subgroup_extended_types on GFX8+Samuel Pitoiset2020-05-293-2/+3
| | | | | | | | Should be working now. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Rhys Perry <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5148>
* aco: sign-extend input/indentity for 32-bit reduce ops on GFX10Samuel Pitoiset2020-05-291-0/+14
| | | | | | | | | | Because some 16-bit instructions are already VOP3 on GFX10, we use the 32-bit variants to remove the temporary VGPR and to use DDP with the arithmetic instructions. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Rhys Perry <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5148>
* aco: allow gfx10_wave64_bpermute with 8-bit/16-bit inputSamuel Pitoiset2020-05-291-1/+1
| | | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Rhys Perry <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5148>
* aco: allocate a temp VGPR for some 8-bit/16-bit reduction ops on GFX10Samuel Pitoiset2020-05-291-1/+4
| | | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Rhys Perry <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5148>
* aco: implement 8-bit/16-bit reductions on GFX10Samuel Pitoiset2020-05-291-8/+21
| | | | | | | | | Some 16-bit instructions are VOP3 on GFX10 and we have to emit a 32-bit DPP mov followed by the ALU instruction. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Rhys Perry <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5148>
* aco: fix register allocation for subdword instructions on GFX10Samuel Pitoiset2020-05-291-3/+1
| | | | | | | Cc: 20.1 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5148>
* frontend/dri: Implement mapping individual planes.Bas Nieuwenhuizen2020-05-292-3/+17
| | | | | | | | | | | | | | | | | | | | | | | | It is kinda surprising that image2 = fromPlanar(image, 2, NULL) mapImage(..., image2, ...) does not map the third plane. This implements that behavior in the case where the DRI frontend lowers the multi-planar textures. In the case it doesn't this would need driver support. AFAIU at least etnaviv is impacted, and while it looks possible, I don't have the etnaviv knowledge to implement it. Instead of silently returning weird results (either always plane 0 or possibly something interleaved) this adds an error return on mapping multi-planar textures otherwise. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5200>
* zink: Check fopen result.Vinson Lee2020-05-291-3/+5
| | | | | | | | | | | | | Fix warning reported by Coverity. Dereference null return value (NULL_RETURNS) dereference: Dereferencing a pointer that might be NULL fp when calling fwrite. Fixes: 8d46e35d16e3 ("zink: introduce opengl over vulkan") Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Erik Faye-Lund <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5235>
* radv/aco: enable VK_EXT_subgroup_size_controlSamuel Pitoiset2020-05-292-1/+2
| | | | | | | | | | ACO should already support Wave32 on GFX10 with all shader stages and CTS pass. RADV currently only allows Wave32 with the compute shader stage. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Rhys Perry <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5056>
* freedreno/a6xx: document LRZ flag bufferRob Clark2020-05-292-2/+33
| | | | | | | | | Doesn't seem to be a big win, although I could still be missing something in my implementation. But might as well add the documentation. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5217>
* freedreno/a6xx: LRZ fix for alpha-testRob Clark2020-05-291-2/+37
| | | | | | | | | Similarly to stencil-test, if alpha-test is enabled, we don't know necessarily whether the fragment will pass. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3045 Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5217>
* util: Initialize pipe_shader_state for passthrough and transform shadersNeha Bhende2020-05-284-9/+9
| | | | | | | | | | | | | | | mesa/st is initializing pipe_shader_state for user define shaders. This patch intialized pipe_shader_state for all passthough and transform shaders. This fixes crashes for several opengl apps. Issue is found in vmware internal testing Fixes: f01c0565bb9 ("draw: free the NIR IR.") Reviewed-by: Charmaine Lee <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5240>
* iris: Rename iris_seqno to iris_fine_fenceChris Wilson2020-05-288-143/+145
| | | | | | | | | Rename iris_seqno to iris_fine_fence, borrowed from si_fine_fence, to avoid introducing any confusion with any other seqno used for tracking pipelines. Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5233>
* nir: lower_tex: Don't normalize coordinates for TXF with RECTGert Wollny2020-05-281-1/+2
| | | | | | | | | | | | | | v2: remove the option to actually request normalization and its application in Intel < Gen6 (Jason) v3: Also don't lower for query operations (Jason) Fixes: 1ce8060c25c7f2c7a54159fab6a6974c0ba182a8 nir/lower_tex: support for lowering RECT textures Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5105>
* ci: Quick exit qpa extraction for non-matching qpas.Eric Anholt2020-05-281-2/+8
| | | | | | | | | | | | | | When you're bringing up a new driver in CI with significant number of failures (or when a CI run breaks a driver), the QPA extraction can easily take the whole job timeout as we go about processing each QPA (100 of them in my early VK CI fails) per unexpected result we're saving (50), which involves reading and each line of the file in shell. By quickly filtering out the QPA files not including our test, we can save all that shell overhead, bringing QPA extract time down to a couple of minutes. Reviewed-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5225>
* ci: Move baremetal DEQP_NO_SAVE_RESULTS setup to the yml.Eric Anholt2020-05-283-1/+3
| | | | | | | I'm going to want it unset (artifacts enabled) for the cheza jobs. Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5225>
* ci: Add DEQP_EXPECTED_RENDERER support for VK tests.Eric Anholt2020-05-281-2/+15
| | | | | | | I used this to debug what was going on with freedreno VK in CI. Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5225>
* ci: Auto-detect the architecture for VK ICD filenames.Eric Anholt2020-05-281-1/+1
| | | | | Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5225>
* ci: Drop old comment about enabling --deqp-watchdog.Eric Anholt2020-05-281-7/+0
| | | | | | | The parallel deqp runner does its own 60s watchdog. Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5225>
* ci: Drop double ".txt" suffix on the unexpected results file.Eric Anholt2020-05-281-5/+5
| | | | | | | Just a cosmetic fix in reviewing logs. Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5225>
* spirv,radv,anv: implement no-op VK_GOOGLE_user_typeSamuel Pitoiset2020-05-285-0/+9
| | | | | | | | | | | | | | This extension only allows HLSL shader compilers to optionally embed unambiguous type information which can be safely ignored by the driver. This fixes a crash with the recent Vulkan backend of Path Of Exile (it uses the extension without checking if it's supported). Cc: <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5237>
* aco: fix 64-bit shared_atomic_exchangeRhys Perry2020-05-281-1/+1
| | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4880>
* aco: don't reorder barriers in the schedulerRhys Perry2020-05-281-1/+4
| | | | | | | | | | Unless we're reordering it around a barrier of the same type No shader-db changes. Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4880>
* aco: preserve more fields when combining additions into SMEMRhys Perry2020-05-281-0/+4
| | | | | | | | | Totals from 11 (0.01% of 127638) affected shaders: Signed-off-by: Rhys Perry <[email protected]> Fixes: 93c8ebfa780 ('aco: Initial commit of independent AMD compiler') Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4880>
* aco: check instruction format before waiting for a previous SMEM storeRhys Perry2020-05-281-1/+1
| | | | | | | | | | | | | Totals from 7 (0.01% of 127638) affected shaders: CodeSize: 40336 -> 40320 (-0.04%) Instrs: 7807 -> 7803 (-0.05%) Cycles: 118588 -> 118344 (-0.21%); split: -0.23%, +0.02% SMEM: 331 -> 339 (+2.42%) Signed-off-by: Rhys Perry <[email protected]> Fixes: 1749953ea3 ('aco/gfx10: Wait for pending SMEM stores before loads') Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4880>
* aco: consider SDWA during value numberingRhys Perry2020-05-281-0/+17
| | | | | | | | Signed-off-by: Rhys Perry <[email protected]> Fixes: 23ac24f5b1fdde73cf8ec1ef6cbe08d73d6776f5 ('aco: add missing conversion operations for small bitsizes') Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5164>
* aco: fix interaction with 3f branch workaround and p_constaddrRhys Perry2020-05-281-4/+2
| | | | | | | | The offset was incorrect if we inserted a nop before the p_constaddr. Signed-off-by: Rhys Perry <[email protected]> Fixes: 93c8ebfa ('aco: Initial commit of independent AMD compiler') Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5164>
* gitlab-ci: Pull in GCC 9 from Debian testing in x86_test-gl/vk imagesMichel Dänzer2020-05-284-14/+10
| | | | | | | | | | | | | The GCC 8 packages from buster are no longer compatible with libc6 from testing. We could use the GCC 8 packages from testing instead, but this is easier. v2: * Update piglit-quick_gl test results, due to the piglit issue fixed by https://gitlab.freedesktop.org/mesa/piglit/-/merge_requests/294 Reviewed-by: Eric Anholt <[email protected]> # v1 Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5186>
* gitlab-ci: x86_test-base image as common base for x86_test-gl/vkMichel Dänzer2020-05-284-147/+124
| | | | | | | | | | | | | | | | | | Making use of the relatively recent FDO_BASE_IMAGE feature of the templates, the x86_test-base image contents are shared as a separate layer by the x86_test-gl/vk images (meaning the former only needs to be downloaded once for either or both of the latter). This should be more efficient in terms of overall network bandwidth and storage, in particular if the base image changes less often than the -gl/vk ones. v2: * List x86_test-base in needs: along with x86_test-gl/vk (see parent commit) * Always put $STABLE/TESTING_EPHEMERAL on separate lines, will make it easier to add any non-ephemeral packages Reviewed-by: Eric Anholt <[email protected]> # v1 Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5186>
* gitlab-ci: Also list arm/x86_build in needs: of test jobsMichel Dänzer2020-05-281-0/+3
| | | | | | | | Without this, the test jobs may spuriously run if the arm/x86_build jobs fail. Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5186>
* intel: Add helper to calculate GPGPU_WALKER::RightExecutionMaskCaio Marcelo de Oliveira Filho2020-05-274-18/+18
| | | | | | | Suggested by Jason. Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
* iris, i965: Update limits for ARB_compute_variable_group_sizeCaio Marcelo de Oliveira Filho2020-05-273-48/+11
| | | | | | | | | The CS compiler now produces multiple SIMD variants, so the previous trade-off between "always using SIMD32" and "having a smaller max invocations" is now gone. Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
* iris, i965: Drop max_variable_local_sizeCaio Marcelo de Oliveira Filho2020-05-273-15/+0
| | | | | | | | | This was used to decide which SIMD width to generate code for ARB_compute_variable_group_size. Now that compiler will generate multiple SIMD widths, this information is unused. Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
* intel/fs: Generate multiple CS SIMD variants for variable group sizeCaio Marcelo de Oliveira Filho2020-05-272-62/+163
| | | | | | | | | | | | | | | | | This will make the GL drivers pick the right SIMD variant for a given group size set during dispatch. The heuristic implemented in brw_cs_simd_size_for_group_size() is the same as in brw_compile_cs(). The cs_prog_data::simd_size field was removed. The generated SIMD sizes are marked in a bitmask, which is already used via brw_cs_simd_size_for_group_size() by the drivers. When in variable group size, it is OK if larger SIMD shader spill, since we'd need it for the cases where the smaller one can't hold all the invocations. Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
* anv: Use new helper functions to pick SIMD variant for CSCaio Marcelo de Oliveira Filho2020-05-275-32/+40
| | | | | | | | Also combine the existing individual anv helpers into a single one for all CS related parameters. Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
* iris: Use new helper functions to pick SIMD variant for CSCaio Marcelo de Oliveira Filho2020-05-271-5/+8
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-11 20:11:44 +0000