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* Merge commit 'origin/master' into texture_swizzleBrian Paul2009-01-287-25/+35
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| * i965: fix bug in pass0_precalc_mov()Brian Paul2009-01-281-3/+11
| | | | | | | | | | | | | | Previously, "in-place" swizzles such as: MOV t, t.xxyx; were handled incorrectly. Fixed by splitting the one loop into two loops so we get all the refs before assigning them (to avoid potential clobbering).
| * i965: minor comment additions/editsBrian Paul2009-01-281-1/+6
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| * i965: remove pad fieldBrian Paul2009-01-281-1/+0
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| * i965: widen per-texture bitfields for 16 texture image unitsBrian Paul2009-01-281-5/+5
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| * i965: minor commentsBrian Paul2009-01-281-2/+2
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| * dri2: add complaints for more initialization failures.Eric Anholt2009-01-271-3/+9
| | | | | | | | | | Somehow we're running into DRI2Authenticate failing, and silent demotion to swrast is bad.
| * intel: clean up more pf mess.Eric Anholt2009-01-273-11/+3
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* | i965: minor improvements in brw_wm_populate_key()Brian Paul2009-01-281-6/+6
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* | mesa: additional GL_INVALID_OPERATION tests for texture swizzleBrian Paul2009-01-281-2/+7
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* | mesa: implement texture swizzling in swrastBrian Paul2009-01-284-8/+73
| | | | | | | | And enable GL_EXT_texture_swizzle for software drivers.
* | mesa: set/get new state for GL_EXT_texture_swizzleBrian Paul2009-01-284-34/+198
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* | mesa: if texObj is NULL in fetch_texel_*(), return black.Brian Paul2009-01-281-20/+32
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* mesa: refactor glTexParameter codeBrian Paul2009-01-271-347/+480
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* mesa: move call to _mesa_update_framebuffer_visual()Brian Paul2009-01-272-1/+3
| | | | | | | Update the visual info in the _mesa_test_framebuffer_completeness() function when we've determined the FBO to be "complete". Fixes regression seen in progs/demos/shadowtex.c
* i915: rename some functionsBrian Paul2009-01-261-4/+4
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* intel: replace i915/intel_state.c and i965/intel_state.c with shared fileBrian Paul2009-01-263-466/+235
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* intel: whitespace changesBrian Paul2009-01-262-118/+118
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* intel: move some driver functions aroundBrian Paul2009-01-264-82/+95
| | | | A step toward consolidating i915/intel_state.c and i965/intel_state.c
* intel: check if stencil test is enabled in intel_stencil_drawpixels()Brian Paul2009-01-261-1/+5
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* intel: save/restore GL matrix mode in ↵Brian Paul2009-01-262-0/+4
| | | | intel_meta_set_passthrough_transform(), intel_meta_restore_transform()
* intel: asst. casts to silence warningsBrian Paul2009-01-263-5/+7
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* intel: #include clean-upsBrian Paul2009-01-261-11/+9
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* intel: remove old #includesBrian Paul2009-01-261-9/+1
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* intel: make intelUpdateScreenFromSAREA() staticBrian Paul2009-01-262-5/+1
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* intel: remove unused varBrian Paul2009-01-261-2/+0
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* intel: move intelInitExtensions() and related code into new intel_extensions.cBrian Paul2009-01-269-147/+231
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* intel: move glClear-related code into new intel_clear.c fileBrian Paul2009-01-268-222/+304
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* intel: Move swap-related functions from intel_buffers.c to new ↵Brian Paul2009-01-2611-222/+301
| | | | intel_swapbuffers.c
* i965: scissor rect was inverted when rendering to textureBrian Paul2009-01-261-4/+14
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* mesa: add missing texture_put_row_rgb() function in texrender.cRobert Ellison2009-01-261-0/+54
| | | | | | The wrap_texture() function doesn't set the renderbuffer PutRowRGB() method, which is used to implement DrawPixels(). This fix adds an implementation of this method.
* docs: added GL_NV_texture_env_combine4Brian Paul2009-01-231-0/+1
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* Merge branch 'tex_combine4'Brian Paul2009-01-238-627/+815
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| * intel: enable GL_NV_texture_env_combine4 extensionBrian Paul2009-01-231-0/+1
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| * mesa: enable GL_NV_texture_env_combine4 for sw driversBrian Paul2009-01-231-0/+1
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| * mesa: updated fragment shader codegen for GL_NV_texture_env_combine4Brian Paul2009-01-231-31/+90
| | | | | | | | | | Expand struct fields, increase loops and handle new 4-term ADD modes. Plus, some new assertions to catch switch/default cases that may be incorrect.
| * swrast: updates for GL_NV_texture_env_combine4Brian Paul2009-01-232-17/+117
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| * mesa: update state setup/validation for GL_NV_texture_env_combine4Brian Paul2009-01-231-7/+18
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| * mesa: update glTexEnv(), glGetTexEnv() for GL_NV_texture_env_combine4Brian Paul2009-01-231-2/+83
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| * mesa: initial changes for GL_NV_texture_env_combine4Brian Paul2009-01-232-10/+9
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| * mesa: consolidate glGetTexEnvi/f() code with new get_texenvi() helperBrian Paul2009-01-231-214/+125
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| * mesa: refactor _mesa_TexEnvfv() code with helper functionsBrian Paul2009-01-231-348/+373
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* | i965: init array->Format fields (see bug 19708)Brian Paul2009-01-231-0/+2
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* | mesa: set the new array->Format field in VBO codeBrian Paul2009-01-234-0/+6
| | | | | | | | Should help to solve failed assertion in i965 driver (see bug 19708)
* | intel: fix the mismerge of the vblank pipe enable sanity checkJesse Barnes2009-01-231-6/+6
| | | | | | | | Fix the last merge fix, had the blocks ordered incorrectly.
* | intel: move pipe enable sanity check to where it belongsJesse Barnes2009-01-231-8/+8
| | | | | | | | Bah, applied the patches in the wrong order, not Owain's fault...
* | intel: fix vblank crtc selection with DRI1 when only one pipe is enabled.Owain Ainsworth2009-01-231-0/+8
| | | | | | | | | | | | | | | | | | | | | | On Mobile chipsets, we often enable PipeB instead of PipeA, but the test in here was insufficient, falling back to pipe A if the area intersection returned zero. Therefore, in the case where a window went off to the top of the left of the screen, it would freeze, waiting on the wrong vblank. Fix this mess by checking the sarea for a crtc being zero sized, and in that case always default to the other one.
* | intel: Prevent an "irq is not working" printf when only pipe B is enabled.Owain G. Ainsworth2009-01-233-8/+34
| | | | | | | | | | | | | | intelMakeCurrent is called before intelWindowMoved (in fact, it calls it), so calculation of the correct vblank crtc has not happened yet. Fix this by making a function that fixes up a set of vblank flags and call if from both functions.
* | docs: document improved stencil support and GL_EXT_vertex_array_bgraBrian Paul2009-01-231-0/+4
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* Merge branch 'vertex_array_bgra'Brian Paul2009-01-237-96/+154
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