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* nir: Add intrinsics for the line widthNeil Roberts2020-07-061-0/+2
| | | | | | | | | | | | | | The first intrinsic is intended to expose the value set by glLineWidth to shaders internally. The second intrinsic exposes the value actually sent to the hardware. This may be wider than the first one in order to implement anti-aliasing. These will be used in later patches to implement a line smoothing lowering pass. v2: Add a second intrinsic for the expanded line width for anti-aliasing. Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5624>
* v3d: Implement the line coord intrinsicNeil Roberts2020-07-061-1/+8
| | | | | | | | The line coord intrinsic is loaded from the implicit varying stored in the same slot as the point coord when drawing lines. Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5624>
* compiler: Add a system value for the line coordNeil Roberts2020-07-066-0/+9
| | | | | | | | | The line coord is a coordinate along the axis perpendicular to the line. It is in the range [0,1] between the two edges of the line. It is available at least on Broadcom hardware. Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5624>
* intel/perf: move query_mask and location out of gen_perf_query_counterMarcin Ślusarz2020-07-064-43/+62
| | | | | | | Signed-off-by: Marcin Ślusarz <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Mark Janes <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5399>
* iris: remove iris_monitor_configMarcin Ślusarz2020-07-065-108/+31
| | | | | | | | | | | | | | | | | | | perf_cfg is enough - it already contains almost all necessary information and is constructed in a more optimal way (O(n) vs O(n^2) - it uses hash table to build the unique counter list). "Almost all", because it doesn't contain OA raw counters, but we should have not exposed them anyway. Quoting Mark Janes: "I see no reason to include the OA raw counters in the list that are provided to the user. They are unusable. The MDAPI library can be used to configure raw counters in a way that provides esoteric metrics, but that library is written against INTEL_performance_query." Signed-off-by: Marcin Ślusarz <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Mark Janes <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5399>
* a4xx: hook up centroid ij coordsIlia Mirkin2020-07-061-2/+5
| | | | | | | | | | This is necessary now that the compiler respects centroid interpolation, even in non-MSAA mode. Otherwise the interpolation doesn't work. Fixes a bunch of dEQP centroid transform feedback tests. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5778>
* nir: Add docs to nir_lower[_explicit]_ioJason Ekstrand2020-07-061-0/+32
| | | | | | | Reviewed-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5418>
* nir: Remove shared support from lower_ioJason Ekstrand2020-07-061-78/+4
| | | | | | | | | | | | No drivers are using this anymore so we can delete it and not keep maintaining this legacy code-path. If any drivers want this in the future, they should use nir_lower_varst_to_explicit_types followed by nir_lower_explicit_io. Reviewed-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5418>
* nir: Assert that nir_lower_io is only called with allowed modesJason Ekstrand2020-07-061-7/+6
| | | | | | | Reviewed-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5418>
* panfrost: Only call nir_lower_io on shader_in/outJason Ekstrand2020-07-062-2/+4
| | | | | | | | | | | Gallium drivers should never see nir_var_uniform because gallium lowers regular uniforms to a UBO. No GL driver should ever see either nir_var_mem_shared because that's lowered in GLSL IR. Reviewed-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5418>
* v3d: Only call nir_lower_io on shader_in/outJason Ekstrand2020-07-061-8/+6
| | | | | | | | | | Gallium drivers should never see nir_var_uniform because gallium lowers regular uniforms to a UBO. No GL driver should ever see either nir_var_mem_shared because that's lowered in GLSL IR. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5418>
* vc4: Only call nir_lower_io on shader_in/outJason Ekstrand2020-07-061-2/+2
| | | | | | | | | | Gallium drivers should never see nir_var_uniform because gallium lowers regular uniforms to a UBO. No GL driver should ever see either nir_var_mem_shared because that's lowered in GLSL IR. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5418>
* nouveau: Only call nir_lower_io on shader_in/outJason Ekstrand2020-07-061-1/+3
| | | | | | | | | | Gallium drivers should never see nir_var_uniform because gallium lowers regular uniforms to a UBO. No GL driver should ever see either nir_var_mem_shared because that's lowered in GLSL IR. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5418>
* lima: Only call nir_lower_io on shader_in/outJason Ekstrand2020-07-061-2/+4
| | | | | | | | | | Gallium drivers should never see nir_var_uniform because gallium lowers regular uniforms to a UBO. No GL driver should ever see either nir_var_mem_shared because that's lowered in GLSL IR. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5418>
* freedreno: Only call nir_lower_io on shader_in/outJason Ekstrand2020-07-063-9/+14
| | | | | | | | | | Gallium drivers should never see nir_var_uniform because gallium lowers regular uniforms to a UBO. No GL driver should ever see either nir_var_mem_shared because that's lowered in GLSL IR. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5418>
* ir3: mark ucp_enables as allowed values on all keysIlia Mirkin2020-07-061-0/+2
| | | | | | | | Both vertex and fragment shaders need to have the lowering. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5751>
* etnaviv: replace prims-emitted queryChristian Gmeiner2020-07-063-6/+6
| | | | | | | | | | As we do not support stream output buffers we only count the primitives processed by the pipeline. Use the correct query type. Cc: <[email protected]> Signed-off-by: Christian Gmeiner <[email protected]> Reviewed-by: Lucas Stach <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5754>
* a4xx: add polygon offset clamp, fix unitsIlia Mirkin2020-07-064-3/+7
| | | | | | | | | | | | For some reason, in order to get all tests to pass, pretty much all hardware (across vendors) has to program in offset_units * 2. This fixes dEQP-GLES3.functional.polygon_offset.float32_displacement_with_units. While we're at it, add polygon offset clamp support. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5763>
* a4xx: add noperspective interpolation supportIlia Mirkin2020-07-063-24/+27
| | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5753>
* nir: add vec2_index_32bit_offset address formatConnor Abbott2020-07-063-36/+70
| | | | | | | | | | | | | | | | | | For turnip, we use the "bindless" model on a6xx. Loads and stores with the bindless model require a bindless base, which is an immediate field in the instruction that selects between 5 different 64-bit "bindless base registers", a 32-bit descriptor index that's added to the base, and the usual 32-bit offset. The bindless base usually, but not always, corresponds to the Vulkan descriptor set. We can handle the case where the base is non-constant by using a bunch of if-statements, to make it a little easier in core NIR, and this seems to be what Qualcomm's driver does too. Therefore, the pointer format we need to use in NIR has a vec2 index, for the bindless base and descriptor index. Plumb this format through core NIR. Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5683>
* nir: Refactor load/store intrinsic helperConnor Abbott2020-07-061-44/+43
| | | | | | | | | | Add the possibility to specify the source components. This is necessary to let the UBO/SSBO index have more than one component, and it also lets us remove a few hand-rolled load intrinsic definitions. Acked-by: Jason Ekstrand <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5683>
* freedreno/regs: document SS6_UBO state srcJonathan Marek2020-07-061-0/+8
| | | | | | | Document this new a6xx_state_src value seen in A640/A650 tess traces. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5760>
* freedreno/fdperf: prefer render nodeRob Clark2020-07-061-1/+1
| | | | | | | | Avoid inadvertantly becoming master if fdperf happens to be the first thing to open the device. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5762>
* freedreno/fdperf: better compatible string matchingRob Clark2020-07-061-4/+32
| | | | | | | | | | | | | | | | Previously we would match the start of the compatible string, in a couple of cases, in order to match compatible strings like "qcom,adreno-630.2". But these cases would always list a more generic compatible (ie. "qcom,adreno") as a later choice. So if we parse all the compatible strings, we can do a more precise exact match. This avoids us accidentially matching on "qcom,adreno-smmu" and the hilarity that ensues. Fixes: 5a13507164a ("freedreno/perfcntrs: add fdperf") Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5762>
* freedreno/fdperf: fix print of base addressRob Clark2020-07-061-1/+1
| | | | | Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5762>
* wsi/x11: Log swapchain status changesJason Ekstrand2020-07-061-1/+15
| | | | | Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5672>
* vulkan/wsi: Don't consider VK_SUBOPTIMAL_KHR to be an error conditionJason Ekstrand2020-07-061-3/+3
| | | | | | | | | | | | | This was causing vkAcquireNextImageKHR to not signal the fences and semaphores. In the case where the semaphore was brand new, this could cause an unsignalled syncobj to be passed into execbuffer2 which it will reject with -EINVAL leading to VK_ERROR_DEVICE_LOST. Thanks to Henrik Rydgård who works on the PPSSPP project for helping me figure this out. Fixes: ca3cfbf6f1e00 "vk: Add an initial implementation of the actual..." Fixes: 778b51f491cfe "vulkan/wsi: Add a hooks for signaling semaphores..." Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5672>
* Revert "radv: add support for MRTs compaction to avoid holes"Bas Nieuwenhuizen2020-07-064-41/+43
| | | | | | | | | | | | | | | This reverts commit 7a5e6fd25f2e132ef4cacc3a5b714c4e153227b0. Since we have two different users bisecting issues to this commit, let's revert. Reviewed-by: Samuel Pitoiset <[email protected]> Fixes: 7a5e6fd25f2 "radv: add support for MRTs compaction to avoid holes" Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3202 Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3228 (Other report in https://gitlab.freedesktop.org/mesa/mesa/-/issues/3151#note_558589) Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5758>
* radv: Always enable PERFECT_ZPASS_COUNTS.Bas Nieuwenhuizen2020-07-061-1/+4
| | | | | | | | | | | | | | | | | We have an issue with early depth testing and discard, where non-perfect counts count the tile if the early depth test succeeds. We could spend a lot of effort to set this conditionally based on the presence of the two conditions, but in the presence of inherited queries let's try this first. Changing PERFECT_ZPASS_COUNTS since I'm pretty sure this has a lower performance impact than always using late depth testing. CC: <[email protected]> Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3218 Reviewed-by: Samuel Pitoiset <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5757>
* radv: Set handle types in Android semaphore/fence import.Bas Nieuwenhuizen2020-07-061-0/+2
| | | | | | | | Seems like we forgot to set it all this time ... Fixes: b1444c9ccb0 "radv: Implement VK_ANDROID_native_buffer." Reviewed-by: Samuel Pitoiset <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5759>
* radv: disable FMASK compression when drawing with GENERAL layoutSamuel Pitoiset2020-07-062-0/+39
| | | | | | | | | Fixes: 96063100 "radv: enable shaderStorageImageMultisample feature on GFX8+" Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3219 Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/855 Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3165>
* Revert "nir: Support sysval tess levels in SPIR-V to NIR"Jonathan Marek2020-07-062-19/+2
| | | | | | | | This reverts commit d2d4677b56efa0003065b61e39c1ef977c83f7da. The option is not used by any driver. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5744>
* Revert "nir: Add an option for lowering TessLevelInner/Outer to vecs"Jonathan Marek2020-07-062-30/+0
| | | | | | | | This reverts commit d2df0761200ba9680f0d22defaa02c33fb051fcf. The option is not used by any driver. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5744>
* freedreno/ir3: fix/rework tess levelsJonathan Marek2020-07-063-153/+87
| | | | | | | | | | | | | | | | | | | | | | | | | The previous version assumes tess level outputs will only be written once in the shader, however its not possible to guarantee that. It also assumes all invocations will write all the levels, which is also not guaranteed. This is required to fix the "tesselation" and "terraintessellation" demos with turnip. The comment about nir_lower_io_to_temporaries in lower_tess_ctrl_block is removed because nir_lower_io_to_temporaries specifically skips TESS_CTRL shaders so the comment doesn't make sense. The split load for tess levels workaround is removed, the new version only has scalar access unless if ever gets vectorized. This sets NIR_COMPACT_ARRAYS cap to avoid the glsl tess vec lowering with gallium. It seems this will also disable "LowerCombinedClipCullDistance", which I'm not sure was needed or not. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5744>
* freedreno/layout: fix explicit layout offset not added to slice offsetJonathan Marek2020-07-061-1/+1
| | | | | | | | | | | | | Accidentally broke this when rebasing the offending commit. My use case with non-zero explicit offset is UV plane of UBWC NV12, and only the UBWC slice offset is used for the UBWC sampler, so I didn't catch it immediately. Fixes: d53dc6c37680eba8e8 ("freedreno/fdl6: rework layout code a bit (reduce linear align to 64 bytes)") Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5761>
* amd/addrlib: fix another C++ one definition rule violationBas Nieuwenhuizen2020-07-062-2/+2
| | | | | | | | Clashes with the SI definition. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3116 Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5673>
* iris: return max counter value for AMD_performance_monitorMarcin Ślusarz2020-07-061-3/+4
| | | | | | | | | | | | glGetPerfMonitorCounterInfoAMD(..., ..., GL_COUNTER_RANGE_AMD, ...) returned NAN (binary representation of uint64_t(-1) as float) as a max value. Fixes: 0fd4359733e6 ("iris/perf: implement routines to return counter info") Signed-off-by: Marcin Ślusarz <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5473>
* st/mesa: fix reporting of float perf counters max valueMarcin Ślusarz2020-07-061-3/+3
| | | | | | | | | | | | | | | | | Some Piglit tests (rightfully) fail because of min >= max when exposed to perf counters that do not explicitly define their max value. Failing tests: spec/amd_performance_monitor/api/test_counter_info spec/amd_performance_monitor/vc4/test_counter_info u32/u64 changes are no-ops. Fixes: 4cd1cfb9831d ("st/mesa: implement GL_AMD_performance_monitor") Signed-off-by: Marcin Ślusarz <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5473>
* llvmpipe: enable GL 4.2Dave Airlie2020-07-067-107/+15
| | | | | | mostly just docs patch, features were all complete already Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5724>
* llvmpipe: bump to GL support to GL 4.1Dave Airlie2020-07-065-413/+35
| | | | | Reviewed-by: Roland Scheidegger <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5724>
* llvmpipe: bump texture/scene limits to enable GL 4.1Dave Airlie2020-07-064-7/+10
| | | | | | | | Do we need to make this more dynamic? or have some options for vmware embedded? Reviewed-by: Roland Scheidegger <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5724>
* mesa/version: only enable GL4.1 with correct limits.Dave Airlie2020-07-061-0/+2
| | | | | | | | | | I haven't tested all the limits, but these two should be enough for driver writers to realise. I've also submitted a minmax test for piglit to test this. Reviewed-by: Marek Olšák <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5727>
* turnip: enable 420_UNORM formatsJonathan Marek2020-07-054-2/+67
| | | | | Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4600>
* turnip: support multi-image layoutsJonathan Marek2020-07-054-115/+200
| | | | | Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4600>
* turnip: clear_blit: pass aspect mask to setup functionJonathan Marek2020-07-051-109/+61
| | | | | | | Avoids having to duplicate logic to figure out the write mask on D24S8 Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4600>
* st/mesa: allow R8 to not be exposed as renderable by driverIlia Mirkin2020-07-051-3/+7
| | | | | | | | | | A3xx GPUs support RG8 and RGBA8, but not R8 for rendering. Add RG8 as fallbacks for integer formats, and require a renderable format to be picked for all R8 variants. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5748>
* mesa/glformats: make _mesa_gles_error_check_format_and_type() more consistentEric Engestrom2020-07-041-25/+25
| | | | | | | | | | | | | Let's consistently use the following code format instead of relying on falling through to `default`: if (!req) return GL_INVALID_OPERATION; break; Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5729>
* drirc: Add picom to adaptive_sync exclusion listBenjamin Cheng2020-07-041-0/+3
| | | | | | | | | The compton compositor is unmaintained, with a new fork named picom taking its place. As with the other compositors (including compton), adaptive sync should not be enabled. Reviewed-by: Eric Engestrom <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5740>
* turnip: fix tess param bo size calculationJonathan Marek2020-07-043-43/+13
| | | | | | | | | | | ir3 already calculates the stride in the tess param bo, so use that instead of a incorrect calculation. The calculation of per_vertex_output_size / per_patch_output_size is wrong because it counts dwords instead of bytes, and what it counts for per_vertex_output_size is a per-patch size because the glsl type is already an array of # vertex/patch elements. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5743>
* nir: Add nir_lower_clip_disable.c to SCons build.Vinson Lee2020-07-041-0/+1
| | | | | | | | Fixes: fb2fe802f638 ("nir: add lowering pass for clip plane enabling") Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3217 Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5741>
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