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* i965/fs: Simplify FS_OPCODE_SET_SAMPLE_ID stride mashing a bit.Kenneth Graunke2014-02-111-2/+1
| | | | | | | | stride(brw_vec1_reg(...) ...) takes some register, changes the strides, then changes the strides again. Let's do it once. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* docs/GL3.txt: denote r600g support for ARB_viewport_arrayDave Airlie2014-02-111-1/+1
| | | | Signed-off-by: Dave Airlie <[email protected]>
* r600g: add support for multiple viewports.Dave Airlie2014-02-119-40/+98
| | | | | | tested on rv635 and barts. Signed-off-by: Dave Airlie <[email protected]>
* st/mesa: add support for GL_ARB_viewport_array (v0.2)Dave Airlie2014-02-115-56/+73
| | | | | | | | | | this just ties the mesa code to the pre-existing gallium interface, I'm not sure what to do with the CSO stuff yet. 0.2: fix min/max bounds Acked-by: Ilia Mirkin <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* st/mesa: add support for viewport index semanticDave Airlie2014-02-111-0/+9
| | | | | | | This adds GS output and FS input support, even though FS input support isn't supported until GLSL 4.30 from what I can see. Signed-off-by: Dave Airlie <[email protected]>
* i965: Program 2x MSAA sample positions.Kenneth Graunke2014-02-103-4/+16
| | | | | | | | | There are only two sensible placements for 2x MSAA samples - and one is the mirror image of the other. I chose (0.25, 0.25) and (0.75, 0.75). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965: Store 4x MSAA sample positions in a scalar value, not an array.Kenneth Graunke2014-02-103-4/+4
| | | | | | | | Storing a single value in an array is rather pointless. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965: Duplicate less code in GetSamplePositions driver hook.Kenneth Graunke2014-02-101-11/+12
| | | | | | | | | | | | The 4x and 8x cases contained identical code for extracting the X and Y sample offset values and converting them from U0.4 back to float. Without this refactoring, we'd have to duplicate it a third time in order to support 2x MSAA. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* nouveau/video: make sure that firmware is present when checking capsIlia Mirkin2014-02-103-4/+147
| | | | | | | | | | | | Apparently some players are ill-prepared for us claiming that a decoder exists only to have creating it fail, and express this poor preparation with crashes (e.g. flash). Check that firmware is there to increase the chances of there being a high correlation between reported capabilities and ability to create a decoder. Signed-off-by: Ilia Mirkin <[email protected]> Cc: 10.0 10.1 <[email protected]> Tested-by: Emil Velikov <[email protected]>
* mesa: Fix MESA_FORMAT_Z24_UNORM_S8_UINT vs. X8_UINT mix-up.Kenneth Graunke2014-02-0933-103/+103
| | | | | | | | | | | | | | | | | | | | In commit eeed49f5f290793870c60b5b635b977a732a1eb4, Mark accidentally renamed MESA_FORMAT_S8_Z24 to MESA_FORMAT_Z24_UNORM_X8_UINT and MESA_FORMAT_X8_Z24 to MESA_FORMAT_Z24_UNORM_S8_UINT, reversing their sense. The commit message was correct, but what sed commands actually got run didn't match that. This patch swaps the two enum names, reversing them. This should undo the damage, but might break things if people have manually fixed a few instances in the meantime... Mark's commit also failed to mention renames: s/MESA_FORMAT_ARGB2101010_UINT\b/MESA_FORMAT_B10G10R10A2_UINT/g s/MESA_FORMAT_ABGR2101010\b/MESA_FORMAT_R10G10B10A2_UNORM/g but those seem okay. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* mesa: remove duplicated init of MaxViewportsMaxence Le Doré2014-02-091-3/+0
| | | | | | | Already declared 5 lines before. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* gallium: add geometry shader output limitsGrigori Goronzy2014-02-0915-1/+54
| | | | | | | | v2: adjust limits for radeonsi and llvmpipe v3: add documentation Cc: "10.1" <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* mesa: Removed unnecessary check for NULL pointer when freeing memorySiavash Eliasi2014-02-091-2/+1
| | | | | | | | | Note that it is OK to pass NULL pointers to this function since this commit: mesa: modified _mesa_align_free() to accept NULL pointer http://cgit.freedesktop.org/mesa/mesa/commit/?id=f0cc59d68a9f5231e8e2111393a1834858820735 Reviewed-by: Marek Olšák <[email protected]>
* nv30: report 8 maximum inputsIlia Mirkin2014-02-081-1/+1
| | | | | | | | | | | | nvfx_fragprog_assign_generic only allows for up to 10/8 texcoords for nv40/nv30. This fixes compilation of the varying-packing tests. Furthermore it appears that the last 2 inputs on nv4x don't seem to work in those tests, so just report 8 everywhere for now. Tested on NV42, NV44. NV4B appears to have additional problems. Signed-off-by: Ilia Mirkin <[email protected]> Cc: 9.1 9.2 10.0 10.1 <[email protected]>
* nv50/ir/ra: some register spilling fixesChristoph Bumiller2014-02-091-5/+34
| | | | Cc: 10.1 <[email protected]>
* mesa: update assertion in detach_shader() for geom shadersBrian Paul2014-02-081-0/+1
| | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74723 Cc: "10.0" "10.1" <[email protected]> Tested-by: Andreas Boll <[email protected]>
* mesa: allocate gl_debug_state on demandBrian Paul2014-02-089-153/+274
| | | | | | | | | | | | We don't need to allocate all the state related to GL_ARB_debug_output until some aspect of that extension is actually needed. The sizeof(gl_debug_state) is huge (~285KB on 64-bit systems), not even counting the 54(!) hash tables and lists that it contains. This change reduces the size of gl_context alone from 431KB bytes to 145KB bytes on 64-bit systems and from 277KB bytes to 78KB bytes on 32-bit systems. Reviewed-by: Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: trivial clean-ups in errors.cBrian Paul2014-02-081-41/+84
| | | | | | | Whitespace changes, 78-column rewrapping, comment clean-ups, add some braces, etc. Reviewed-by: Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: remove _mesa_ prefix from some static functionsBrian Paul2014-02-081-27/+23
| | | | Reviewed-by: Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Label JIP and UIP in Broadwell shader disassembly.Kenneth Graunke2014-02-071-2/+6
| | | | | | | This makes it obvious which number is which. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Don't disassemble UIP field for Broadwell WHILE instructions.Kenneth Graunke2014-02-071-2/+1
| | | | | | | The WHILE instruction doesn't have UIP. It only has JIP. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Don't print source registers for Broadwell flow control.Kenneth Graunke2014-02-071-13/+14
| | | | | | | | | | | The bits which normally contain the source register descriptions actually contain the JIP/UIP jump targets, which we already printed. Interpreting JIP/UIP as source registers results in some really creepy looking output, like IF statements with acc14.4<0,1,0>UD sources. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Fix fast depth clear values on Broadwell.Kenneth Graunke2014-02-071-1/+4
| | | | | | | | | | | | | | Broadwell's 3DSTATE_CLEAR_PARAMS packet expects a floating point value regardless of format. This means we need to stop converting it to UNORM. Storing the value as float would make sense, but since we already have a uint32_t field, this patch continues shoehorning it into that. In a sense, this makes mt->depth_clear_value the DWord you emit in the packet, rather than the clear value itself. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* nvc0: handle TGSI_SEMANTIC_LAYERChristoph Bumiller2014-02-075-5/+4
| | | | Cc: 10.1 <[email protected]>
* nvc0: create the SW objectChristoph Bumiller2014-02-072-0/+10
| | | | It's required for being able to use software methods now.
* nvc0/ir/emit: hardcode vertex output stream to 0 for nowChristoph Bumiller2014-02-071-2/+7
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* i965: Enable ARB_texture_gather for one component on Gen6.Chris Forbes2014-02-082-1/+3
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: Emit shader w/a for Gen6 gatherChris Forbes2014-02-082-0/+32
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Emit shader w/a for Gen6 gatherChris Forbes2014-02-082-0/+35
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add surface format overrides for Gen6 gatherChris Forbes2014-02-081-5/+32
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add Gen6 gather wa to sampler keyChris Forbes2014-02-082-0/+32
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: Optimize triop_csel with all-true or all-false.Eric Anholt2014-02-071-0/+7
| | | | Reviewed-by: Matt Turner <[email protected]>
* glsl: Optimize various cases of fma (aka MAD).Eric Anholt2014-02-071-0/+13
| | | | Reviewed-by: Matt Turner <[email protected]>
* glsl: Optimize lrp(x, x, coefficient) --> x.Eric Anholt2014-02-071-0/+2
| | | | | | | | | | | total instructions in shared programs: 1627754 -> 1624534 (-0.20%) instructions in affected programs: 45748 -> 42528 (-7.04%) GAINED: 3 LOST: 0 (serious sam, humus domino demo) Reviewed-by: Matt Turner <[email protected]>
* glsl: Optimize pow(x, 1) -> x.Eric Anholt2014-02-071-0/+4
| | | | | | | | | | | total instructions in shared programs: 1627826 -> 1627754 (-0.00%) instructions in affected programs: 6640 -> 6568 (-1.08%) GAINED: 0 LOST: 0 (HoN and savage2) Reviewed-by: Matt Turner <[email protected]>
* glsl: Optimize log(exp(x)) and exp(log(x)) into x.Eric Anholt2014-02-071-0/+36
| | | | Reviewed-by: Matt Turner <[email protected]>
* glsl: Optimize ~~x into x.Eric Anholt2014-02-071-0/+5
| | | | | | | v2: Fix pasteo of an extra abs being inserted (caught by many). Rewrite to drop the silly switch statement. Reviewed-by: Matt Turner <[email protected]> (v1)
* i965: Add some informative debug when the X Server botches DRI2 GetBuffers.Eric Anholt2014-02-071-1/+11
| | | | | | | | We've had various bug reports over the years where miptrees are missing, and when I screwed it up while adding DRI2 to the modesetting driver, I figured I should put the info necessary for debug here. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Remove redundant check in blitter-based glBlitFramebuffer().Eric Anholt2014-02-071-10/+0
| | | | | | | The intel_miptree_blit() code checks the format for us now, plus it handles xrgb vs argb for us. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Fix Gen8+ disassembly of half float subregister numbers.Kenneth Graunke2014-02-071-0/+1
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Use the new brw_load_register_mem helper for draw indirect.Kenneth Graunke2014-02-071-31/+22
| | | | | | | | | | | This makes it work on Broadwell, too. v2: Drop bogus double write to 3DPRIM_BASE_VERTEX register (caught by Chris Forbes). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965: Implement a brw_load_register_mem helper function.Kenneth Graunke2014-02-072-0/+32
| | | | | | | | | | | | This saves some boilerplate and hides the OUT_RELOC/OUT_RELOC64 distinction. Placing the function in intel_batchbuffer.c is rather arbitrary; there wasn't really an obvious place for it. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965: Fix INTEL_DEBUG=vs for fixed-function/ARB programs.Kenneth Graunke2014-02-072-4/+4
| | | | | | | | | | | Since commit 9cee3ff562f3e4b51bfd30338fd1ba7716ac5737, INTEL_DEBUG=vs has caused a NULL pointer dereference for fixed-function/ARB programs. In the vec4 generators, "prog" is a gl_program, and "shader_prog" is the gl_shader_program. This is different than the FS visitor. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* glsl: Don't lose precision qualifiers when encountering "centroid".Kenneth Graunke2014-02-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mesa fails to retain the precision qualifier when parsing: #version 300 es centroid in mediump vec2 v; Consider how the parser's type_qualifier production is applied. First, the precision_qualifier rule creates a new ast_type_qualifier: <precision: mediump> Then the storage_qualifier rule creates a second one: <flags: in> and calls merge_qualifier() to fold in any previous qualifications, returning: <flags: in, precision: mediump> Finally, the auxiliary_storage_qualifier creates one for "centroid": <flags: centroid> it then does $$ = $1 and $$.flags |= $2.flags, resulting in: <flags: centroid, in> Since precision isn't stored in the flags bitfield, it is lost. We need to instead call merge_qualifier to combine all the fields. Cc: [email protected] Signed-off-by: Kenneth Graunke <[email protected]> Reported-by: Kevin Rogovin <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* st/mesa: avoid sw fallback for getting/decompressing texturesBrian Paul2014-02-071-1/+3
| | | | | | | | | | | If st_GetTexImage() is to decompress the texture, avoid the fallback path even if prefer_blit_based_texture_transfer = false. For drivers that returned PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER = 0, we were always taking the fallback path for texture decompression rather than rendering a quad. The later is a lot faster. Cc: "10.0" "10.1" <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/tgsi: correct typo propagated from NV_vertex_program1_1Erik Faye-Lund2014-02-072-3/+3
| | | | | | | | | | | | | | | | In the specification text of NV_vertex_program1_1, the upper limit of the RCC instruction is written as 1.884467e+19 in scientific notation, but as 0x5F800000 in binary. But the binary version translates to 1.84467e+19 rather than 1.884467e+19 in scientific notation. Since the lower-limit equals 2^-64 and the binary version equals 2^+64, let's assume the value in scientific notation is a typo and implement this using the value from the binary version instead. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* gallium/tgsi: use CLAMP instead of open-coded clampsErik Faye-Lund2014-02-071-22/+4
| | | | | Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* egl: Unhide functionality in _eglInitSurface()Juha-Pekka Heikkila2014-02-071-1/+3
| | | | | | | | | | _eglInitResource() was used to memset entire _EGLSurface by writing more than size of pointed target. This does work as long as Resource is the first element in _EGLSurface, this patch fixes such dependency. Signed-off-by: Juha-Pekka Heikkila <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* egl: Unhide functionality in _eglInitContext()Juha-Pekka Heikkila2014-02-071-1/+2
| | | | | | | | | | _eglInitResource() was used to memset entire _EGLContext by writing more than size of pointed target. This does work as long as Resource is the first element in _EGLContext, this patch fixes such dependency. Signed-off-by: Juha-Pekka Heikkila <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* glx: Add missing null check in __glX_send_client_info()Juha-Pekka Heikkila2014-02-071-0/+4
| | | | | Signed-off-by: Juha-Pekka Heikkila <[email protected]> Reviewed-by: Brian Paul <[email protected]>
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