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* [g3dvl] also use four elemets on right side multiplikationChristian König2010-11-251-8/+11
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* [g3dvl] use four elements in matrix texture fetchChristian König2010-11-241-19/+31
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* r600g: disable not working formatsChristian König2010-11-241-5/+5
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* r600g: reenable texture uploads, but keep R16_SNORM disabledChristian König2010-11-241-2/+5
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* r600g: disable R32 float also in r600_translate_colorformatChristian König2010-11-241-2/+2
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* [g3dvl] no need for all samplers at all stagesChristian König2010-11-242-17/+16
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* [g3dvl] remove flushing between stagesChristian König2010-11-241-4/+0
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* [g3dvl] spread scaling between idct stagesChristian König2010-11-241-18/+8
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* [g3dvl] remove invalid use of assertChristian König2010-11-232-17/+27
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* [g3dvl] switch to r32 float for idct matrixChristian König2010-11-231-6/+6
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* [g3dvl] add some error handlingChristian König2010-11-232-35/+55
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* Merge remote branch 'origin/master' into pipe-videoChristian König2010-11-21250-23968/+26225
|\ | | | | | | | | | | Conflicts: src/gallium/auxiliary/Makefile src/gallium/auxiliary/SConscript
| * mesa: fix get_texture_dimensions() for texture array targetsBrian Paul2010-11-211-5/+5
| | | | | | | | Fixes http://bugs.freedesktop.org/show_bug.cgi?id=31779
| * docs: update some GL 3.0 statusBrian Paul2010-11-211-5/+6
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| * mesa: hook up GL 3.x entrypointsBrian Paul2010-11-2117-11014/+12566
| | | | | | | | Fix up some details in the xml files and regenerate dispatch files.
| * glapi: rename GL3.xml to GL3x.xml as it covers all GL 3.x versionsBrian Paul2010-11-211-0/+0
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| * mesa: fix error msg typoBrian Paul2010-11-211-1/+1
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| * i915g: kill idws->poolDaniel Vetter2010-11-214-14/+7
| | | | | | | | | | | | | | | | | | The drm winsys only ever handles one gem memory manager. Rip out the unnecessary complication. Reviewed-by: Jakob Bornecrantz <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Signed-off-by: Jakob Bornecrantz <[email protected]>
| * i915g: kill buf->map_gttDaniel Vetter2010-11-212-15/+2
| | | | | | | | | | | | | | | | | | Not using the gtt is considered harmful for performance. And for partial uploads there's always drm_intel_bo_subdata. Reviewed-by: Jakob Bornecrantz <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Signed-off-by: Jakob Bornecrantz <[email protected]>
| * i915g: kill RGBA/X formatsDaniel Vetter2010-11-211-4/+0
| | | | | | | | | | | | | | | | It's intel, so always little endian! Reviewed-by: Jakob Bornecrantz <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Signed-off-by: Jakob Bornecrantz <[email protected]>
| * i915g: add pineview pci idsDaniel Vetter2010-11-212-0/+10
| | | | | | | | | | | | Reviewed-by: Jakob Bornecrantz <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Signed-off-by: Jakob Bornecrantz <[email protected]>
| * i915g: s/hw_tiled/tilingDaniel Vetter2010-11-212-6/+7
| | | | | | | | | | | | | | | | | | | | More in line with other intel drivers. Change to use enum by Jakob Bornecrantz. Reviewed-by: Jakob Bornecrantz <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Signed-off-by: Jakob Bornecrantz <[email protected]>
| * i915g: rip out ->sw_tiledDaniel Vetter2010-11-214-15/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It looks like this was meant to facilitate unfenced access to textures/ color/renderbuffers. It's totally incomplete and fundamentally broken on a few levels: - broken: The kernel needs to about every tiled bo to fix up bit17 swizzling on swap-in. - unflexible: fenced/unfenced relocs from execbuffer2 do the same, much simpler. - unneeded: with relaxed fencing tiled gem bos are as memory-efficient as this trick. Hence kill it. Reviewed-by: Jakob Bornecrantz <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Signed-off-by: Jakob Bornecrantz <[email protected]>
| * r300g: silence guard band cap errorsJoakim Sindholt2010-11-211-0/+7
| | | | | | | | | | | | Somebody should find out what these are. It can be found on Windows getting a D3DCAPS9 from IDirect3D9::GetCaps() and reading the GuardBand* values.
| * st/vega: Fix vgReadPixels with a subrectangle.Chia-I Wu2010-11-211-4/+12
| | | | | | | | | | | | | | Fix a crash when the subrectangle is not inside the fb. Fix wrong pipe transfer when sx > 0 or sy + height != fb->height. This fixes "readpixels" demo.
| * st/vega: Set wrap_r for mask and blend samplers.Chia-I Wu2010-11-211-0/+2
| | | | | | | | | | | | | | | | | | | | | | These two samplers use non-normalized texture coordinates. wrap_r cannot be PIPE_TEX_WRAP_REPEAT (the default). This fixes sp_tex_sample.c:1790:get_linear_unorm_wrap: Assertion `0' failed assertion failure.
| * st/vega: vegaLookupSingle should validate the state.Chia-I Wu2010-11-211-0/+2
| | | | | | | | Fix "lookup" demo crash.
| * tgsi: Add STENCIL to text parser.Chia-I Wu2010-11-211-1/+2
| | | | | | | | | | | | | | | | | | Fix OpenVG "filter" demo Program received signal SIGSEGV, Segmentation fault. 0xb7153dc9 in str_match_no_case (pcur=0xbfffe564, str=0x0) at tgsi/tgsi_text.c:86 86 while (*str != '\0' && *str == uprcase( *cur )) {
| * mesa: Clean up header file inclusion in stencil.h.Vinson Lee2010-11-201-1/+2
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| * mesa: Clean up header file inclusion in shared.h.Vinson Lee2010-11-201-1/+1
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| * mesa: Clean up header file inclusion in shaderapi.h.Vinson Lee2010-11-201-1/+3
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| * mesa: Clean up header file inclusion in scissor.h.Vinson Lee2010-11-201-1/+2
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| * mesa: Clean up header file inclusion in renderbuffer.h.Vinson Lee2010-11-201-1/+1
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| * mesa: Clean up header file inclusion in readpix.h.Vinson Lee2010-11-201-1/+2
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| * mesa: Clean up header file inclusion in rastpos.h.Vinson Lee2010-11-201-1/+4
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| * mesa: Clean up header file inclusion in polygon.h.Vinson Lee2010-11-201-1/+2
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| * intel: Remove unnecessary header.Vinson Lee2010-11-201-1/+0
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| * r600: Remove unnecesary header.Vinson Lee2010-11-201-1/+0
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| * swrast: Remove unnecessary header.Vinson Lee2010-11-201-1/+0
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| * st/mesa: Remove unnecessary headers.Vinson Lee2010-11-202-2/+0
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| * scons: Define IN_DRI_DRIVER.Chia-I Wu2010-11-201-0/+4
| | | | | | | | | | The define is required for DRI drivers. It is not needed for libgl-xlib, but the overhead it introduces should be minor.
| * nvfx: only expose one rt on nv30Xavier Chantry2010-11-201-1/+1
| | | | | | | | We do not know how to use more, GL_ARB_draw_buffers is not exposed on blob.
| * r600g: Fix location for clip plane registersOwen W. Taylor2010-11-202-8/+8
| | | | | | | | | | | | | | | | The stride between the different clip plane registers was incorrect. https://bugs.freedesktop.org/show_bug.cgi?id=31788 agd5f: fix evergreen as well.
| * r300g: fix rendering with no vertex elementsMarek Olšák2010-11-204-5/+40
| | | | | | | | | | Fixes glsl-vs-point-size, although I meant to fix glsl-novertexdata. Since swrast fails glsl-novertexdata too, I guess it's a core issue.
| * i965: Remove duplicate MRF writes in the FS backend.Eric Anholt2010-11-192-0/+152
| | | | | | | | | | | | | | | | | | | | This is quite common for multitexture sampling, and not only cuts down on the second and later set of MOVs, but typically also allows compute-to-MRF on the first set. No statistically siginficant performance difference in nexuiz (n=3), but it reduces instruction count in one of its shaders and seems like a good idea.
| * i965: Improve compute-to-mrf.Eric Anholt2010-11-191-53/+49
| | | | | | | | | | | | | | | | | | | | | | | | We were skipping it if the instruction producing the value we were going to compute-to-mrf used its result reg as a source reg. This meant that the typical "write interpolated color to fragment color" or "texture from interpolated texcoord" shader didn't compute-to-MRF. Just don't check for the interference cases until after we've checked if this is the instruction we wanted to compute-to-MRF. Improves nexuiz high-settings performance on my laptop 0.48% +- 0.08% (n=3).
| * ir_to_mesa: Detect and emit MOV_SATs for saturate constructs.Eric Anholt2010-11-191-0/+32
| | | | | | | | | | The goal here is to avoid regressing performance on ir_to_mesa drivers for fixed function fragment shaders requiring saturates.
| * i965: Recognize saturates and turn them into a saturated mov.Eric Anholt2010-11-192-0/+27
| | | | | | | | | | | | On pre-gen6, this turns 4 instructions into 1. We could still do better by folding the saturate into the instruction generating the value if nobody else uses it, but that should be a separate pass.
| * glsl: Add a helper function for determining if an rvalue could be a saturate.Eric Anholt2010-11-192-0/+58
| | | | | | | | | | | | Hardware pretty commonly has saturate modifiers on instructions, and this can be used in codegen to produce those, without everyone else needing to understand clamping other than min and max.
| * i965: Fold constants into the second arg of BRW_SEL as well.Eric Anholt2010-11-191-0/+1
| | | | | | | | This hits a common case with min/max operations.
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