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* intel: genxml: automake: include gen_bits_header.py in the tarballEmil Velikov2017-04-051-0/+1
| | | | Signed-off-by: Emil Velikov <[email protected]>
* intel: genxml: automake: polish automake rulesEmil Velikov2017-04-051-2/+2
| | | | Signed-off-by: Emil Velikov <[email protected]>
* amd/addrlib: automake: add all headers to the tarballEmil Velikov2017-04-051-0/+2
| | | | | Fixes: 7f160efcde4 ("amd/addrlib: import gfx9 support") Signed-off-by: Emil Velikov <[email protected]>
* radeonsi: enable ARB_sparse_bufferNicolai Hähnle2017-04-053-2/+12
| | | | | | | | v2: - fill in DRM version requirement - disable on SI due to CP DMA faults Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: disable SDMA clears and copies for sparse buffersNicolai Hähnle2017-04-053-4/+11
| | | | | | | | | VM faults cannot be disabled for SDMA on <= VI. We could still use SDMA by asking the winsys about which parts of the buffers are committed. This is left as a potential future improvement. Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: implement pipe->resource_commitNicolai Hähnle2017-04-051-0/+35
| | | | Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: transfers and invalidation for sparse buffersNicolai Hähnle2017-04-051-10/+24
| | | | | | Sparse buffers can never be mapped by the CPU. Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: implement sparse buffer creationNicolai Hähnle2017-04-051-0/+2
| | | | Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: sparse buffer debugging helpersNicolai Hähnle2017-04-051-0/+61
| | | | Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: take fences when freeing a backing bufferNicolai Hähnle2017-04-051-3/+11
| | | | | | | | | | | We never add fences to backing buffers during submit. When we free a backing buffer, it must inherit the sparse buffer's fences, so that it doesn't get re-used prematurely via the cache. v2: - remove pipe_mutex_* Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: add sparse buffers to CSNicolai Hähnle2017-04-052-16/+140
| | | | | | | | | | ... and implement the corresponding fence handling. v2: - add missing bit in amdgpu_bo_is_referenced_by_cs_with_usage - remove pipe_mutex_* Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: sparse buffer creation / destruction / commitmentNicolai Hähnle2017-04-051-1/+400
| | | | | | | | | | | | | | This is the bulk of the buffer allocation logic. It is fairly simple and stupid. We'll probably want to use e.g. interval trees at some point to keep track of commitments, but Mesa doesn't have an implementation of those yet. v2: - remove pipe_mutex_* - fix total_backing_pages accounting - simplify by using the new VA_OP_CLEAR/REPLACE kernel interface Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: add sparse buffer data structuresNicolai Hähnle2017-04-052-1/+46
| | | | | | | | v2: - remove pipe_mutex_* - use a simple page commitment array Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: extend amdgpu_add_fence to allow adding multiple fencesNicolai Hähnle2017-04-052-11/+27
| | | | Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: build handles and flags list late on submit threadNicolai Hähnle2017-04-052-17/+28
| | | | | | | | | | | This probably has only minor performance effects, but it simplifies some subsequent code slightly. Ideally, it could also be used to simplify the handling of slab buffers in the same way, but unfortunately that's not possible as long as we need indices for relocations. Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: share common code in amdgpu_add_fence_dependenciesNicolai Hähnle2017-04-051-21/+17
| | | | Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: extract amdgpu_do_add_real_bufferNicolai Hähnle2017-04-051-8/+18
| | | | | | We will use it for delayed adding of sparse buffers' backing buffers. Reviewed-by: Marek Olšák <[email protected]>
* winsys/radeon: sparse buffers will not be supportedNicolai Hähnle2017-04-051-0/+2
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeon/winsys: add sparse buffer interfaceNicolai Hähnle2017-04-051-0/+17
| | | | Reviewed-by: Marek Olšák <[email protected]>
* st/mesa: plumbing for sparse buffersNicolai Hähnle2017-04-051-0/+20
| | | | Reviewed-by: Marek Olšák <[email protected]>
* st/mesa: enable ARB_sparse_buffer when supportedNicolai Hähnle2017-04-051-0/+4
| | | | Reviewed-by: Marek Olšák <[email protected]>
* trace: add resource_commit pass-throughNicolai Hähnle2017-04-051-0/+20
| | | | | | v2: fix return type to bool (Marek) Reviewed-by: Marek Olšák <[email protected]>
* ddebug: add resource_commit pass-throughNicolai Hähnle2017-04-051-0/+11
| | | | | | v2: fix return type to bool (Marek) Reviewed-by: Marek Olšák <[email protected]>
* gallium: add sparse buffer interface and capabilityNicolai Hähnle2017-04-0519-0/+58
| | | | | | | v2: - explain the resource_commit interface in more detail Reviewed-by: Marek Olšák <[email protected]>
* mesa: implement sparse buffer commitmentNicolai Hähnle2017-04-052-0/+76
| | | | | Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* mesa: implement sparse storage buffer allocationNicolai Hähnle2017-04-051-6/+23
| | | | | | | v2: - spec quote and style (Ian) Reviewed-by: Marek Olšák <[email protected]>
* mesa: implement SPARSE_BUFFER_PAGE_SIZE_ARBNicolai Hähnle2017-04-053-0/+7
| | | | | Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* mesa: Add GL_ARB_sparse_buffer boilerplateNicolai Hähnle2017-04-058-0/+59
| | | | | Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* configure.ac: require libdrm_amdgpu 2.4.77Nicolai Hähnle2017-04-051-1/+1
| | | | | | The sparse buffer implementation requires amdgpu_bo_va_op_raw. Reviewed-by: Marek Olšák <[email protected]>
* mesa: Replace program locks with atomic inc/dec.Matt Turner2017-04-053-15/+3
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* anv: Advertise larger heap sizesJason Ekstrand2017-04-043-14/+75
| | | | | | | | | | | Instead of just advertising the aperture size, we do something more intelligent. On systems with a full 48-bit PPGTT, we can address 100% of the available system RAM from the GPU. In order to keep clients from burning 100% of your available RAM for graphics resources, we have a nice little heuristic (which has received exactly zero tuning) to keep things under a reasonable level of control. Reviewed-by: Kristian H. Kristensen <[email protected]>
* anv: Add support for 48-bit addressesJason Ekstrand2017-04-045-0/+54
| | | | | | | | | | | | | | | | | | This commit adds support for using the full 48-bit address space on Broadwell and newer hardware. Thanks to certain limitations, not all objects can be placed above the 32-bit boundary. In particular, general and state base address need to live within 32 bits. (See also Wa32bitGeneralStateOffset and Wa32bitInstructionBaseOffset.) In order to handle this, we add a supports_48bit_address field to anv_bo and only set EXEC_OBJECT_SUPPORTS_48B_ADDRESS if that bit is set. We set the bit for all client-allocated memory objects but leave it false for driver-allocated objects. While this is more conservative than needed, all driver allocations should easily fit in the first 32 bits of address space and keeps things simple because we don't have to think about whether or not any given one of our allocation data structures will be used in a 48-bit-unsafe way. Reviewed-by: Kristian H. Kristensen <[email protected]>
* anv: Replace anv_bo::is_winsys_bo with a uint32_t flagsJason Ekstrand2017-04-043-9/+11
| | | | Reviewed-by: Kristian H. Kristensen <[email protected]>
* i965/blorp: Align vertex buffers to 64BJason Ekstrand2017-04-041-1/+13
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Cc: "13.0 17.0" <[email protected]>
* anv/blorp: Align vertex buffers to 64BJason Ekstrand2017-04-041-1/+14
| | | | | | | | | | This fixes issues seen when adding support for full 48-bit addresses. The 48-bit addresses themselves have nothing to do with it other than that it caused the kernel to place buffers slightly differently so they interacted differently with the caches. Reviewed-by: Kenneth Graunke <[email protected]> Cc: "13.0 17.0" <[email protected]>
* anv: Query the kernel for reset statusJason Ekstrand2017-04-044-40/+107
| | | | | | | | | | | | When a client causes a GPU hang (or experiences issues due to a hang in another client) we want to let it know as soon as possible. In particular, if it submits work with a fence and calls vkWaitForFences or vkQueueQaitIdle and it returns VK_SUCCESS, then the client should be able to trust the results of that rendering. In order to provide this guarantee, we have to ask the kernel for context status in a few key locations. Reviewed-by: Kenneth Graunke <[email protected]>
* anv: Check for device loss at the end of WaitForFencesJason Ekstrand2017-04-041-5/+14
| | | | | | | It's possible that the device could have been lost while we were waiting. We should let the user know if this has happened. Reviewed-by: Kenneth Graunke <[email protected]>
* anv/pipeline: Properly handle unset gl_Layer and gl_ViewportIndexJason Ekstrand2017-04-041-3/+24
| | | | | | | | | | When the shader does not set one of these values, they are supposed to get a default value of 0. We have hardware bits in 3DSTATE_CLIP for this but haven't been setting them. This fixes the intermittent failure of dEQP-VK.geometry.layered.3d.render_to_default_layer. Reviewed-by: Kenneth Graunke <[email protected]> Cc: "13.0 17.0" <[email protected]>
* i965/fs: Always provide a default LOD of 0 for TXS and TXLJason Ekstrand2017-04-041-9/+9
| | | | | | | | | | | | | We already provide a default LOD for textureQueryLevels and texture() on non-fragment stages. However, there are more cases where one is needed such as textureSize(gsampler2DMS*) in SPIR-V. Instead of trying to list out all of the cases one at a time, just provide the default for all TXS and TXL operations. This fixes a shader validation error in the new Sascha deferredmultisampling demo which uses textureSize(gsampler2DMS). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100391 Reviewed-by: Anuj Phogat <[email protected]> Cc: "13.0 17.0" <[email protected]>
* mesa: Require mipmap completeness for glCopyImageSubData(), sometimes.Kenneth Graunke2017-04-041-2/+23
| | | | | | | | | | This patch makes glCopyImageSubData require mipmap completeness when the texture object's built-in sampler object has a mipmapping MinFilter. Fixes (on i965): dEQP-GLES31.functional.debug.negative_coverage.*.buffer.copy_image_sub_data Reviewed-by: Roland Scheidegger <[email protected]>
* libgl-xlib: Link with libunwind.Vinson Lee2017-04-041-1/+2
| | | | | | | | | | | | | | | | | | Fix linking error. CXXLD libGL.la ../../../../src/gallium/auxiliary/.libs/libgallium.a(u_debug_stack.o): In function `debug_backtrace_capture': src/gallium/auxiliary/util/u_debug_stack.c:59: undefined reference to `_Ux86_64_getcontext' src/gallium/auxiliary/util/u_debug_stack.c:60: undefined reference to `_ULx86_64_init_local' src/gallium/auxiliary/util/u_debug_stack.c:62: undefined reference to `_ULx86_64_step' src/gallium/auxiliary/util/u_debug_stack.c:71: undefined reference to `_ULx86_64_get_proc_info' src/gallium/auxiliary/util/u_debug_stack.c:73: undefined reference to `_ULx86_64_get_proc_name' src/gallium/auxiliary/util/u_debug_stack.c:65: undefined reference to `_ULx86_64_step' Fixes: 70c272004f72 ("gallium/util: libunwind support") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100562 Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Rob Clark <[email protected]>
* intel/isl: Refactor and clerify gen8 alignment calculationsJason Ekstrand2017-04-041-15/+49
| | | | | | | | Adding the actual table from the docs makes it clearer exactly what the restrictions are. In particular, it becomes clear that compressed textures ignore the alignment parameters in RENDER_SURFACE_STATE. Reviewed-by: Chad Versace <[email protected]>
* drirc: Set glsl_zero_init for Kerbal Space Program.Francisco Jerez2017-04-041-0/+8
| | | | | | | | | | | This fixes the stripes of garbage rendered on the floor of the vehicle assembly building among other rendering issues. The reason for the misrendering seems to be that some of the GLSL shaders used by the application use variables before initializing them, incorrectly assuming that they will be implicitly set to zero by the implementation. Acked-by: Matt Turner <[email protected]>
* intel: tools: add aubinator_error_decode toolLionel Landwerlin2017-04-045-1/+766
| | | | | | | | | | | | | | | | This is pretty much the same tool as what i-g-t has, only with a more fancy decoding of the instructions/registers. It also doesn't support anything before gen4. v2 (from Matt): Drop authors Remove undefined automake variable v3: Fix incorrect offsets for dword > 1 (Jordan) v4: Fix decompression error with large blobs (Jordan) Signed-off-by: Lionel Landwerlin <[email protected]> Acked-by: Matt Turner <[email protected]>
* intel: genxml: add RING_BUFFER_CTL registersLionel Landwerlin2017-04-045-0/+272
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* intel: genxml: add FAULT_REG registerLionel Landwerlin2017-04-045-0/+206
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* intel: genxml: add gen7 ERR_INT registerLionel Landwerlin2017-04-042-0/+22
| | | | | | | v2: add register to gen7.5 (Matt) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* intel: genxml: add ACTHD registersLionel Landwerlin2017-04-042-0/+32
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* intel: genxml: add GFX_ARB_ERROR_RPT registerLionel Landwerlin2017-04-045-0/+73
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* intel: genxml: add INSTDONE registersLionel Landwerlin2017-04-045-0/+387
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Matt Turner <[email protected]>
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