summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* anv: Sanitize Image extents and offsetsNanley Chery2016-03-244-45/+106
| | | | | | | | | | | | | | | Prepare Image extents and offsets for internal consumption by assigning the default values implicitly defned by the spec. Fixes textures on several Vulkan demos in which the VkImageCopy depth is set to zero when copying a 2D image. v2 (Jason Ekstrand): Replace "prep" with "sanitize" Make function static inline Pass structs instead of pointers Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Nanley Chery <[email protected]>
* anv/device: Advertise version 1.0.5Jason Ekstrand2016-03-221-1/+1
| | | | Nothing substantial has changed since 1.0.2
* anv/device: Ignore the patch portion of the requested API versionJason Ekstrand2016-03-221-1/+1
| | | | | | Fixes dEQP-VK.api.device_init.create_instance_name_version Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94661
* anv: Don't assert-fail if someone asks for a non-existent entrypointJason Ekstrand2016-03-221-1/+0
|
* Update to the latest Vulkan header from KhronosJason Ekstrand2016-03-222-15/+141
|
* anv/batch_chain: Fall back to growing batches when chaining isn't availableJason Ekstrand2016-03-213-2/+70
|
* anv/allocator: Make the bo_pool dynamically sizedJason Ekstrand2016-03-183-28/+32
|
* anv/allocator: Add a size field to bo_pool_allocJason Ekstrand2016-03-184-6/+11
|
* Merge remote-tracking branch 'origin/master' into vulkanJordan Justen2016-03-1726-285/+266
|\
| * i965/nir: Lower nir compute shader shared variablesJordan Justen2016-03-173-0/+11
| | | | | | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
| * nir: Lower shared var atomics during nir_lower_ioJordan Justen2016-03-171-2/+85
| | | | | | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
| * nir: Add support for lowering load/stores of shared variablesJordan Justen2016-03-175-8/+32
| | | | | | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
| * nir: Add atomic operations on variablesJordan Justen2016-03-171-0/+27
| | | | | | | | | | | | | | | | | | This allows us to first generate atomic operations for shared variables using these opcodes, and then later we can lower those to the shared atomics intrinsics with nir_lower_io. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
| * nir: Add compute shader shared variable storage classJordan Justen2016-03-177-3/+26
| | | | | | | | | | | | | | | | | | Previously we were receiving shared variable accesses via a lowered intrinsic function from glsl. This change allows us to send in variables instead. For example, when converting from SPIR-V. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
| * nir/print: Add space after shader_storage var modeJordan Justen2016-03-171-1/+1
| | | | | | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
| * i965: Skip execution size adjustment for instructions of width 4Iago Toral Quiroga2016-03-171-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This code in brw_set_dest adjusts the execution size of any instruction with a dst.width < 8. However, we don't want to do this with instructions operating on doubles, since these will have a width of 4, but still need an execution size of 8 (for SIMD8). Unfortunately, we can't just check the size of the operands involved to detect if we are doing an operation on doubles, because we can have instructions that do operations on double operands interpreted as UD, operating on any of its 2 32-bit components. Previous commits have made it so we never emit instructions with a horizontal width of 4 that don't have the correct execution size set for gen6+, so we can skip it in this case, avoiding the conflicts with fp64 requirements. Expanding the same fix to other hardware generations requires many more changes but since we are not targetting fp64 support on them wer don't really care for now. Reviewed-by: Topi Pohjolainen <[email protected]>
| * i965/vec4/gen6: fix exec_size for MOV with a width of 4 in generate_gs_ff_sync()Samuel Iglesias Gonsalvez2016-03-171-1/+3
| | | | | | | | | | Signed-off-by: Samuel Iglesias Gonsalvez <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
| * i965/vec4/gen6: fix exec_size for instructions with destination width of 4Samuel Iglesias Gonsalvez2016-03-171-0/+6
| | | | | | | | | | Signed-off-by: Samuel Iglesias Gonsalvez <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
| * i965/vec4/gen6: fix exec_size for instructions with width of 4 in ↵Samuel Iglesias Gonsalvez2016-03-171-0/+3
| | | | | | | | | | | | | | generate_gs_svb_write() Signed-off-by: Samuel Iglesias Gonsalvez <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
| * i965/gs/gen6: fix execsize for instructions with width of 4 in ↵Samuel Iglesias Gonsalvez2016-03-171-1/+10
| | | | | | | | | | | | | | | | | | | | gen6_sol_program() v2: - Add assert (Topi). Signed-off-by: Samuel Iglesias Gonsalvez <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
| * i965: set correct execsize for MOVS with a width of 4 in brw_find_live_channelIago Toral Quiroga2016-03-171-0/+3
| | | | | | | | Reviewed-by: Topi Pohjolainen <[email protected]>
| * i965/eu: set execution size for SEND message in brw_send_indirect_messageIago Toral Quiroga2016-03-171-0/+3
| | | | | | | | Reviewed-by: Topi Pohjolainen <[email protected]>
| * i965/fs: Set exec size for gen7 pull const loadsIago Toral Quiroga2016-03-171-0/+1
| | | | | | | | | | | | | | | | | | | | v2 (Topi): - No need to set the execsize for the indirect send message, the next patch will handle that. - Set the execution size explicitly instead of taking it from the width of the dst that we set before. Reviewed-by: Topi Pohjolainen <[email protected]>
| * i965/eu: set correct execution size in brw_NOPIago Toral Quiroga2016-03-171-2/+3
| | | | | | | | | | | | | | v2: NOP should have an execsize of 1 (Matt) Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
| * meta: Don't use integer handles for shaders or programs.Kenneth Graunke2016-03-167-147/+130
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously, we gave our internal clear/blit shaders actual GL handles and stored them in the shader/program hash table. We used ordinary GL API entrypoints to work with them. We thought this shouldn't be a problem because GL doesn't allow applications to invent their own names for shaders or programs. GL allocates all names via glCreateShader and glCreateProgram. However, having them in the hash table is a bit risky: if a broken application guesses the name of our shaders or programs, it could alter them, potentially screwing up future meta operations. Also, test cases can observe the programs in the hash table. Running a single dEQP process that executes the following test list: dEQP-GLES3.functional.negative_api.buffer.clear dEQP-GLES3.functional.negative_api.shader.compile_shader dEQP-GLES3.functional.negative_api.shader.delete_shader would result in the last two tests breaking. The compile_shader test calls glCompileShader(9) straight away, and since it hasn't even created any shaders or programs, it expects to get a GL_INVALID_VALUE error because there's no such name. However, because the clear test ran first, it created Meta programs, so an object named "9" did exist. This patch reworks Meta to work with gl_shader and gl_shader_program pointers directly. These internal programs have bogus names, and are never stored in the hash tables, so they're invisible to applications. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94485 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
| * mesa: Expose compile_shader() and link_program() beyond the file.Kenneth Graunke2016-03-162-10/+16
| | | | | | | | | | | | | | | | This will allow me to use them directly from Meta, bypassing the versions that work with GL integer handles. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
| * mesa: Make link_program() take a gl_shader_program, not a GLuint.Kenneth Graunke2016-03-161-6/+4
| | | | | | | | | | | | | | | | In half the callers, we already have a pointer, and don't need to look it up again. This will also help with upcoming meta work. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
| * mesa: Make compile_shader() take a gl_shader, not a GLuint.Kenneth Graunke2016-03-161-9/+6
| | | | | | | | | | | | | | | | In half the callers, we already have a pointer, and don't need to look it up again. This will also help with upcoming meta work. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
| * meta: Use the _mesa_meta_compile_and_link_program helper more places.Kenneth Graunke2016-03-162-40/+8
| | | | | | | | | | | | | | Less boilerplate. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
| * vc4: Move discard handling to the condition flag.Eric Anholt2016-03-165-34/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the field exists in the instruction, we can make discards less special. As a bonus, that means that we should be able to merge some more .sf instructions together when we get around to that. This causes some scheduling changes, as it allows tlb_color_reads to be delayed past the discard condition setup. Since the tlb_color_read ends up later, this may mean performance improvements, but I haven't tested. total instructions in shared programs: 78114 -> 78035 (-0.10%) instructions in affected programs: 1922 -> 1843 (-4.11%) total estimated cycles in shared programs: 234318 -> 234329 (0.00%) estimated cycles in affected programs: 8200 -> 8211 (0.13%)
| * vc4: Don't make a temporary for setting flags.Eric Anholt2016-03-161-1/+2
| | | | | | | | | | | | | | | | | | The register allocator doesn't really do anything about the temp, so it doesn't seem like it should matter. However, the scheduler would think that a new def is being created. This doesn't change anything yet, but it avoids a bunch of regressions in the next commit.
| * vc4: Add a safety check for setting flags.Eric Anholt2016-03-161-0/+3
| | | | | | | | | | If a pack was on the src reg, should it be a float, int, or mul unpack? Just complain, instead.
| * vc4: Reuse list_for_each_entry_safe_rev().Eric Anholt2016-03-161-6/+2
| | | | | | | | This didn't exist when I wrote the code.
| * meta: Use ARB_explicit_attrib_location in the rest of the meta shaders.Kenneth Graunke2016-03-163-19/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is cleaner than using glBindAttribLocation(). Not all drivers support the extension, but I don't think those drivers use GLSL in the first place. Apparently some Meta shaders already use GL_ARB_explicit_attrib_location, so I think it should be okay. Honestly, I'm not sure how the old code worked anyway - we bound the attribute location for "texcoords", while all the shaders capitalized or spelled it differently. v2: Convert another instance in brw_meta_fast_clear.c. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
| * mesa: Ignore glPointSize when GL_POINT_SIZE_ARRAY_OES is enabledPlamena Manolova2016-03-151-0/+2
| | | | | | | | | | | | | | | | | | | | When a user defines a point size array and enables it, the point size value set via glPointSize should be ignored. To achieve this, we can simply toggle ctx->VertexProgram.PointSizeEnabled. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42187 Signed-off-by: Plamena Manolova <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* | anv/blit: Reduce number of VUE headers being readNanley Chery2016-03-162-2/+2
| | | | | | | | | | Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* | anv/blit: Remove completed finishme for VkFilterNanley Chery2016-03-161-2/+0
| | | | | | | | | | | | | | | | This task was finished as of: d9079648d0f1c380929dea0f3a447ddfdf5dcd27. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* | anv/blit2d: Only use one extent in meta_emit_blit2dNanley Chery2016-03-161-10/+8
| | | | | | | | | | | | | | Since scaling isn't involved, we don't need multiple extents. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* | anv/blit2d: Remove sampler from pipelineNanley Chery2016-03-161-14/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | Since we're using texelFetch with a sampled image, a sampler is no longer needed. This agrees with the Vulkan Spec section 13.2.4 Descriptor Set Updates: sampler is a sampler handle, and is used in descriptor updates for types VK_DESCRIPTOR_TYPE_SAMPLER and VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER if the binding being updated does not use immutable samplers. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* | anv/blit2d: Use texel fetch in frag shaderNanley Chery2016-03-161-25/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The texelFetch operation requires that the sampled texture coordinates be unnormalized integers. This will simplify the copy shader for w-tiled images (stencil buffers). v2 (Jason): Use f2i for texel coords Fix num_components indirectly Use float inputs for interpolation Nest tex_pos functions Suggested-by: Jason Ekstrand <[email protected]> Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* | Revert "anv/meta: Make meta_emit_blit() public"Nanley Chery2016-03-162-12/+1
| | | | | | | | | | | | | | | | | | | | This reverts commit f39168392243d6dacefbc8708b764c5978ff24df. Some conflicts had to be resolved in order for this revert to be successful. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* | Revert "anv/meta: Prefix anv_ to meta_emit_blit()"Nanley Chery2016-03-162-3/+3
| | | | | | | | | | | | | | This reverts commit 514c0557178b0325c59a28d68b0f250f0eeaddf5. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* | anv/blit2d: Customize meta blit structs and functions for blit2d APINanley Chery2016-03-163-90/+41
| | | | | | | | | | | | | | | | | | * Add fields in meta struct * Add support in meta init/teardown * Switch to custom meta_emit_blit2d() Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* | anv/blit2d: Copy anv_meta_blit.c functionsNanley Chery2016-03-162-0/+600
| | | | | | | | | | | | | | These will be customized for blit2d operations. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* | anv/device: Flush the fence batch rather than the start of the BOJason Ekstrand2016-03-151-1/+1
| |
* | Merge remote-tracking branch 'public/master' into vulkanJason Ekstrand2016-03-15457-2759/+62759
|\|
| * vc4: Coalesce instructions using VPM reads into the VPM read.Varad Gautam2016-03-153-7/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is done instead of copy propagating the VPM reads into the instructions using them, because VPM reads have to stay in order. shader-db results: total instructions in shared programs: 78509 -> 78114 (-0.50%) instructions in affected programs: 5203 -> 4808 (-7.59%) total estimated cycles in shared programs: 234670 -> 234318 (-0.15%) estimated cycles in affected programs: 5345 -> 4993 (-6.59%) Signed-off-by: Varad Gautam <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Tested-by: Rhys Kidd <[email protected]>
| * vc4: rename file to group vpm optimizations togetherVarad Gautam2016-03-152-2/+2
| | | | | | | | | | | | | | | | This file will contain optimization passes for both vpm reads and writes. Signed-off-by: Varad Gautam <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
| * vc4: Fix failures with nir_extract_* since the addition of the opcodes.Eric Anholt2016-03-151-0/+2
| |
| * llvmpipe: fix lp_rast_plane alignment on 32bitRoland Scheidegger2016-03-152-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | Some rasterization code relies (for sse) on the first and third planes (but not the second for now) being 128bit aligned, and we didn't get that on 32bit - I mistakenly thought the 64bit number in the struct would get the thing aligned to 64bit even on 32bit archs. Stephane Marchesin really figured this out. Reviewed-by: Jose Fonseca <[email protected]> CC: <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-18 15:23:27 +0000