mesa.git - Unnamed repository; edit this file 'description' to name the repository.

	Commit message (Expand)	Author	Age	Files	Lines
*	ac/nir: Only clamp shadow reference on radeonsi.	Bas Nieuwenhuizen	2017-10-23	4	-2/+9
*	radv: Disallow indirect outputs for GS on GFX9 as well.	Bas Nieuwenhuizen	2017-10-23	1	-3/+1
*	ac/nir: Fix nir_texop_lod on GFX for 1D arrays.	Bas Nieuwenhuizen	2017-10-23	1	-1/+3
*	radv/ac/nir: only emit tess factors to storage if tes reads them	Dave Airlie	2017-10-23	3	-2/+4
*	radv: Don't use vgpr indexing for outputs on GFX9.	Bas Nieuwenhuizen	2017-10-22	1	-0/+5
*	ac/nir: Account for compact array index in GS input load from LDS.	Bas Nieuwenhuizen	2017-10-21	1	-1/+1
*	radv: Don't compile shaders when they are cached already.	Bas Nieuwenhuizen	2017-10-21	1	-19/+23
*	radv: Don't check for max GL GS invocations.	Bas Nieuwenhuizen	2017-10-21	1	-2/+0
*	radv: Don't explicitly reference vertex shader for draw_id.	Bas Nieuwenhuizen	2017-10-21	1	-1/+1
*	radv: Don't reset cmd_buffer->state.dirty.	Bas Nieuwenhuizen	2017-10-21	1	-2/+0
*	radv: Correctly detect changed shaders for vertex descriptors.	Bas Nieuwenhuizen	2017-10-21	1	-6/+6
*	ac/nir: Set larged wrokgroup size for GS on GFX9.	Bas Nieuwenhuizen	2017-10-21	1	-1/+1
*	ac/nir: Take the max workgroup size of all provided shaders.	Bas Nieuwenhuizen	2017-10-21	1	-1/+6
*	radv: Fix pipeline cache locking issues	Alex Smith	2017-10-21	1	-7/+23
*	anv: don't assert on device init on Cannonlake	Lionel Landwerlin	2017-10-21	1	-2/+4
*	anv: disable stencil pma fix on Gen > 9	Lionel Landwerlin	2017-10-21	1	-0/+2
*	blorp: enable R32G32B32X32 blorp ccs copies	Lionel Landwerlin	2017-10-21	1	-0/+1
*	meson: Fix vc5 deps on the XML-generated headers.	Eric Anholt	2017-10-20	2	-2/+2
*	broadcom/vc5: Propagate vc4 aliasing fix to vc5.	Eric Anholt	2017-10-20	1	-1/+1
*	broadcom/vc4: Fix aliasing issue	Stefan Schake	2017-10-20	1	-1/+1
*	meson: Add support for EGL glvnd	Dylan Baker	2017-10-20	1	-2/+44
*	meson: build libEGL	Dylan Baker	2017-10-20	9	-35/+304
*	meson: move wayland_drm_protocol generation to wayland-drm	Dylan Baker	2017-10-20	2	-15/+13
*	meson: Don't allow glx to be built without platform_x11	Dylan Baker	2017-10-20	1	-2/+6
*	meson: bump libdrm_amdgpu requirement to 2.4.85	Dylan Baker	2017-10-20	1	-1/+1
*	nir: Print the components referenced for split or packed shader in/outs.	Eric Anholt	2017-10-20	1	-1/+25
*	nir: Add a safety check that we don't remove dead I/O vars after lowering.	Eric Anholt	2017-10-20	1	-4/+14
*	radv: disable implicit sync for radv allocated bos v3	Andres Rodriguez	2017-10-21	4	-1/+8
*	radv: factor out radv_alloc_memory	Andres Rodriguez	2017-10-21	2	-5/+25
*	radv: Expose VK_EXT_global_priority	Andres Rodriguez	2017-10-21	4	-0/+5
*	radv: don't skip PS/VS partial flush	Andres Rodriguez	2017-10-21	1	-8/+6
*	radv: Implement VK_EXT_global_priority	Andres Rodriguez	2017-10-21	4	-8/+62
*	radeonsi: hardcode shader WAVE_LIMIT to the maximum value	Andres Rodriguez	2017-10-21	1	-7/+14
*	radv: hardcode shader WAVE_LIMIT to the maximum value	Andres Rodriguez	2017-10-21	1	-9/+18
*	vulkan: update headers & registry to VK 1.0.63	Andres Rodriguez	2017-10-21	2	-86/+213
*	configure.ac: Bump libdrm_amdgpu version to 2.4.85.	Bas Nieuwenhuizen	2017-10-21	1	-1/+1
*	broadcom/vc5: Use SETMSF to handle discards.	Eric Anholt	2017-10-20	2	-25/+12
*	broadcom/vc5: Set the snorm/unorm packing functions to be lowered.	Eric Anholt	2017-10-20	1	-0/+4
*	broadcom/vc5: Fix pasteo that broke vertex texturing.	Eric Anholt	2017-10-20	1	-1/+1
*	broadcom/vc5: Move default attribute value setup to the CSO and fix them.	Eric Anholt	2017-10-20	3	-29/+23
*	broadcom/vc5: Move most of the shader state attribute record to the CSO.	Eric Anholt	2017-10-20	4	-65/+90
*	broadcom/vc5: Fix build failure frm nir_shader::stage removal.	Eric Anholt	2017-10-20	1	-4/+4
*	i965/fs: Use align1 mode on ternary instructions on Gen10+	Matt Turner	2017-10-20	1	-4/+8
*	i965: Add align1 ternary instruction emission support	Matt Turner	2017-10-20	1	-55/+160
*	i965: Add align1 ternary instruction disassembler support	Matt Turner	2017-10-20	2	-75/+288
*	i965: Add align1 ternary instruction-word support	Matt Turner	2017-10-20	1	-0/+108
*	i965: Add align1 ternary instruction support to conversion functions	Matt Turner	2017-10-20	4	-34/+101
*	i965: Add align1 ternary instruction field encodings	Matt Turner	2017-10-20	1	-0/+35
*	i965: Add functions to abstract access to 3src register types	Matt Turner	2017-10-20	2	-20/+23
*	i965: Rename brw_inst's functions that access the 3src register type	Matt Turner	2017-10-20	3	-18/+18