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* glsl: Pass ctx->Const.NativeIntegers to do_algebraic.Kenneth Graunke2014-04-084-6/+8
| | | | | | | | | The next patch will introduce an optimization that only works when integers are not represented as floating point values. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* glsl: Pass ctx->Const.NativeIntegers to do_common_optimization().Kenneth Graunke2014-04-088-9/+18
| | | | | | | | | | | The next few patches will introduce an optimization that only works when integers are not represented as floating point values. v2: Re-word-wrap a line, as requested by Ian Romanick. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* glsl: Validate that base types match for a number of binops.Kenneth Graunke2014-04-081-0/+3
| | | | | | | | | The IR is not supposed to support implicit type conversions; we just failed to validate it. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* glsl: Fix lack of i2u in lower_ubo_reference.Kenneth Graunke2014-04-081-3/+7
| | | | | | | | | | | | | | | | | ir_binop_ubo_load takes unsigned integer operands. However, the array index used to compute these offsets may be a signed integer. (For example, see Piglit's spec/glsl-1.40/uniform_buffer/fs-bvec-array). For some reason, we were missing an ir_binop_i2u cast, and ir_validator was failing to catch that. Without this change, ir_builder's type inference code broke for me when writing a new optimization pass. Cc: [email protected] Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/fs: Skip emitting MACH/MOV for small integers.Kenneth Graunke2014-04-081-12/+21
| | | | | | | | | | | | | | | | | The vector backend already implemented this optimization, but surprisingly, we never bothered to implement it in the scalar backend. In addition to saving two instructions, this eliminates a use of the accumulator as an explicit source, which is unsupported in SIMD16 mode on Gen7+, which could help us gain SIMD16 programs. Cuts 19.23% of the instructions in dolphin/efb2ram.shader_test. v2: Rebase on is_16bit_integer_constant -> is_uint16_constant rename. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* glsl: Make is_16bit_constant from i965 an ir_constant method.Kenneth Graunke2014-04-083-16/+26
| | | | | | | | | | | | | | | | | | | | | | The i965 MUL instruction doesn't natively support 32-bit by 32-bit integer multiplication; additional instructions (MACH/MOV) are required. However, we can avoid those if we know one of the operands can be represented in 16 bits or less. The vector backend's is_16bit_constant static helper function checks for this. We want to be able to use it in the scalar backend as well, which means moving the function to a more generally-usable location. Since it isn't i965 specific, I decided to make it an ir_constant method, in case it ends up being useful to other people as well. v2: Rename from is_16bit_integer_constant to is_uint16_constant, as suggested by Ilia Mirkin. Update comments to clarify that it does apply to both int and uint types, as long as the value is non-negative and fits in 16-bits. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* mesa: Move is_power_of_two() function from brw_context.h to macros.h.Kenneth Graunke2014-04-082-6/+11
| | | | | | | | | This makes the function available from core Mesa code, including the GLSL compiler. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Fix "SIMD16 unsupported" messages via KHR_debug.Kenneth Graunke2014-04-081-1/+1
| | | | | | | | | | Performance warnings are logged via KHR_debug in addition to when the INTEL_DEBUG=perf environment variable is set. Without this, messages in debug contexts would have "(null)" for the reason. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Fix missing dirty bits in the gen8_sbe_state atom.Kenneth Graunke2014-04-071-2/+2
| | | | | | | | | | These are clearly needed---the comments in the function are even present for each one of them. I originally had two separate state atoms for 3DSTATE_SBE and 3DSTATE_SBE_SWIZ. When I combined the functions, I must have forgotten to add the atoms for 3DSTATE_SBE_SWIZ. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Drop BRW_NEW_RASTERIZER_DISCARD flag from Broadwell SOL atom.Kenneth Graunke2014-04-071-1/+0
| | | | | | | | Nothing actually uses this---we handle rasterizer discard in the clipper in order for statistics counters to work. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Use the correct program when uploading Broadwell SOL state.Kenneth Graunke2014-04-071-6/+2
| | | | | | | This is the equivalent of commit 43e77215b13b2f86e461cd8a62b542f. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* st/xa: Make sure unused samplers are set to NULLThomas Hellstrom2014-04-071-2/+3
| | | | | | | | | renderer_copy_prepare was setting the first sampler but never telling the cso code how many samplers were actually used. Fix this. Cc: "10.1" <[email protected]> Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* st/xa: Bind destination before setting new stateThomas Hellstrom2014-04-071-3/+3
| | | | | | | | | | | | | | | | | | Binding a new destination may cause the svga driver to emit draw calls while propagating the surface. Make sure this doesn't happen in the middle of sampler state setup where state may be incosistent. In practice, surface propagation should never happen here and even if it did, it wouldn't be a valid reason for the svga driver to emit partially set up state, but to avoid future uncertainties, make sure this doesn't happen anyway. Found while auditing the state tracker for inconsistent sampler state / sampler view setup. Cc: "10.1" <[email protected]> Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Jakob Bornecrantz <[email protected]>
* glapi: Fix libglapi build.Eric Anholt2014-04-071-0/+1
| | | | | This line appears to have been accidentally dropped from the last commit, and the resulting libglapi was missing symbols.
* glapi/build: Add headers to distribution.Matt Turner2014-04-072-6/+22
| | | | Acked-by: Emil Velikov <[email protected]>
* glapi/gen: Ship more Python filesMatt Turner2014-04-071-0/+17
| | | | Acked-by: Emil Velikov <[email protected]>
* glapi/gen: Ship XML and Python filesMatt Turner2014-04-071-1/+3
| | | | Acked-by: Emil Velikov <[email protected]>
* glapi/gen: Add missing XML files to API_XMLMatt Turner2014-04-071-11/+10
| | | | | | Also (re)move XML files from COMMON to API_XML. Acked-by: Emil Velikov <[email protected]>
* src/build: Add getopt to distribution.Matt Turner2014-04-071-0/+2
| | | | Acked-by: Emil Velikov <[email protected]>
* gbm/build: Add headers to distribution.Matt Turner2014-04-071-2/+8
| | | | Acked-by: Emil Velikov <[email protected]>
* egl/build: Sort egl sources alphabetically.Matt Turner2014-04-071-15/+15
| | | | Acked-by: Emil Velikov <[email protected]>
* egl/build: Remove unused -DXF86VIDMODE.Matt Turner2014-04-071-4/+0
| | | | Acked-by: Emil Velikov <[email protected]>
* egl/build: Include headers and XML in distribution.Matt Turner2014-04-073-2/+11
| | | | Acked-by: Emil Velikov <[email protected]>
* egl/build: Drop two unnecessary Makefiles.Matt Turner2014-04-074-53/+5
| | | | Acked-by: Emil Velikov <[email protected]>
* i965/fs: Remove left-over 'removed' variable.Matt Turner2014-04-071-13/+8
| | | | | | | | I think this was used for coalescing out partly dead large virtual registers, but the patch that enabled that caused regressions and didn't make it upstream. Reviewed-by: Eric Anholt <[email protected]>
* i965/fs: Check for interference after finding all channels.Matt Turner2014-04-071-11/+26
| | | | | | | | | | | | It's more likely that we won't find writes to all channels than one will interfere, and calculating interference is more expensive. This change will also help prepare for coalescing load_payload instructions' operands. Also update the live intervals for all channels, and not just the last that we saw. Reviewed-by: Eric Anholt <[email protected]>
* i965: initialize more device info fields for CherryviewJordan Justen2014-04-071-0/+2
| | | | | | | | | The intent in 9b6b084eb7b10d006b44e3cd22585fc3e39e0c00 was for urb .size and .min_vs_entries fields to use the values from the GEN8_FEATURES macro. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* swrast: reindent s_texfetch_temp.h, remove trailing whitespaceBrian Paul2014-04-071-182/+261
| | | | Reviewed-by: Ian Romanick <[email protected]>
* swrast: remove out of date comments in s_texfetch_tmp.hBrian Paul2014-04-071-457/+10
| | | | | | | The comments were out of date and redundant (the functions are pretty much self-explanatory). Reviewed-by: Ian Romanick <[email protected]>
* swrast: rename texture fetch functions (pt. 7)Brian Paul2014-04-072-38/+38
| | | | | | | | | | | | | | sed commands: s/f_z24_s8/S8_UINT_Z24_UNORM/g s/f_s8_z24/Z24_UNORM_S8_UINT/g s/f_z16/Z_UNORM16/g s/f_z32/Z_UNORM32/g s/z32f_x24s8/Z32_FLOAT_S8X24_UINT/g s/f_ycbcr_rev/YCBCR_REV/g s/f_ycbcr/YCBCR/g s/dudv8/DUDV8/g Reviewed-by: Ian Romanick <[email protected]>
* swrast: rename texture fetch functions (pt. 6)Brian Paul2014-04-072-83/+83
| | | | | | | | | | | | | | | | | | | | | | | | | | sed commands: s/rgb9_e5/R9G9B9E5_FLOAT/g s/r11_g11_b10f/R11G11B10_FLOAT/g s/f_alpha_f16/A_FLOAT16/g s/f_alpha_f32/A_FLOAT32/g s/f_luminance_f16/L_FLOAT16/g s/f_luminance_f32/L_FLOAT32/g s/f_luminance_alpha_f16/LA_FLOAT16/g s/f_luminance_alpha_f32/LA_FLOAT32/g s/f_intensity_f16/I_FLOAT16/g s/f_intensity_f32/I_FLOAT32/g s/f_r_f16/R_FLOAT16/g s/f_r_f32/R_FLOAT32/g s/f_rg_f16/RG_FLOAT16/g s/f_rg_f32/RG_FLOAT32/g s/f_rgb_f16/RGB_FLOAT16/g s/f_rgb_f32/RGB_FLOAT32/g s/f_rgba_f16/RGBA_FLOAT16/g s/f_rgba_f32/RGBA_FLOAT32/g s/xbgr16161616_float/RGBX_FLOAT16/g s/xbgr32323232_float/RGBX_FLOAT32/g Reviewed-by: Ian Romanick <[email protected]>
* swrast: rename texture fetch functions (pt. 5)Brian Paul2014-04-072-35/+35
| | | | | | | | | | | | | sed commands: s/srgba8/A8B8G8R8_SRGB/g s/sargb8/B8G8R8A8_SRGB/g s/sabgr8/R8G8B8A8_SRGB/g s/sxbgr8/R8G8B8X8_SRGB/g s/sla8/L8A8_SRGB/g s/sl8/L_SRGB8/g s/srgb8/BGR_SRGB8/g Reviewed-by: Ian Romanick <[email protected]>
* swrast: rename texture fetch functions (pt. 4)Brian Paul2014-04-072-56/+56
| | | | | | | | | | | | | | | | | | | | sed commands: s/signed_rg1616/R16G16_SNORM/g s/signed_rg88_rev/R8G8_SNORM/g s/signed_al88/L8A8_SNORM/g s/signed_a8/A_SNORM8/g s/signed_a16/A_SNORM16/g s/signed_l8/L_SNORM8/g s/signed_l16/L_SNORM16/g s/signed_i8/I_SNORM8/g s/signed_i16/I_SNORM16/g s/signed_r8/R_SNORM8/g s/signed_r16/R_SNORM16/g s/signed_al1616/LA_SNORM16/g s/signed_rgb_16/RGB_SNORM16/g s/signed_rgba_16/RGBA_SNORM16/g Reviewed-by: Ian Romanick <[email protected]>
* swrast: rename texture fetch functions (pt. 3)Brian Paul2014-04-072-56/+56
| | | | | | | | | | | | | | | | | | | | | | Rename functions to match format names. sed commands: s/f_rg1616_rev/G16R16_UNORM/g s/f_rg1616/R16G16_UNORM/g s/f_argb2101010/B10G10R10A2_UNORM/g s/f_a8/A_UNORM8/g s/f_a16/A_UNORM16/g s/f_i8/I_UNORM8/g s/f_i16/I_UNORM16/g s/f_r8/R_UNORM8/g s/f_r16/R_UNORM16/g s/f_rgb888/BGR_UNORM8/g s/f_bgr888/RGB_UNORM8/g s/f_l8/L_UNORM8/g s/f_l16/L_UNORM16/g s/xbgr16161616_unorm/RGBX_UNORM16/g Reviewed-by: Ian Romanick <[email protected]>
* swrast: rename texture fetch functions (pt. 2)Brian Paul2014-04-072-60/+60
| | | | | | | | | | | | | | | | | | | | | | Rename functions to match format names. sed commands: s/f_al1616_rev/A16L16_UNORM/g s/f_al1616/L16A16_UNORM/g s/f_rgb565_rev/R5G6B5_UNORM/g s/f_rgb565/B5G6R5_UNORM/g s/f_argb4444_rev/A4R4G4B4_UNORM/g s/f_argb4444/B4G4R4A4_UNORM/g s/f_rgba5551/A1B5G5R5_UNORM/g s/f_argb1555_rev/A1R5G5B5_UNORM/g s/f_al88_rev/A8L8_UNORM/g s/f_al88/L8A8_UNORM/g s/f_gr88/R8G8_UNORM/g s/f_rg88/G8R8_UNORM/g s/f_al44/L4A4_UNORM/g s/f_rgb332/B2G3R3_UNORM/g Reviewed-by: Ian Romanick <[email protected]>
* swrast: rename texture fetch functions (pt. 1)Brian Paul2014-04-072-44/+44
| | | | | | | | | | | | | | | | | | | Rename functions to match format names. sed commands: s/signed_rgba8888_rev/R8G8B8A8_SNORM/g s/signed_rgba8888/A8B8G8R8_SNORM/g s/f_rgba8888_rev/R8G8B8A_UNORM/g s/f_rgba8888/A8B8G8R8_UNORM/g s/f_rgbx8888_rev/R8G8B8X8_UNORM/g s/f_rgbx8888/X8B8G8R8_UNORM/g s/f_argb8888_rev/A8R8G8B8_UNORM/g s/f_argb8888/B8G8R8A8_UNORM/g s/f_xrgb8888_rev/X8R8G8B8_UNORM/g s/f_xrgb8888/B8G8R8X8_UNORM/g s/signed_rgbx8888/X8B8G8R8_SNORM/g Reviewed-by: Ian Romanick <[email protected]>
* mesa: rename stencil/Z functions in format_unpack.cBrian Paul2014-04-071-40/+40
| | | | | | So the function names match the format names. Reviewed-by: Ian Romanick <[email protected]>
* nouveau: fix firmware check on nvd7/nvd9Ilia Mirkin2014-04-071-3/+3
| | | | | | | | | | | | The kernel driver expects the class to be based on chipset generation rather than VP generation. Make sure to pass 90b1 for NVDX chipsets instead of 95b1. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77102 Fixes: 40dd777b33073 Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.1 10.0" <[email protected]> Reviewed-by: Maarten Lankhorst <[email protected]>
* winsys/svga: Fix prime surface references also for guest-backed surfacesThomas Hellstrom2014-04-073-6/+81
| | | | | | | | | Implement guest-backed surface sharing using prime fds. Previously only legacy surfaces could use this functionality. Also use the vmwgfx 2.6 single-ioctl prime fd reference if available. Cc: "10.1" <[email protected]> Signed-off-by: Thomas Hellstrom <[email protected]>
* winsys/svga: Update the vmwgfx_drm.h header to latest version from kernelThomas Hellstrom2014-04-071-1/+12
| | | | | Cc: "10.1" <[email protected]> Signed-off-by: Thomas Hellstrom <[email protected]>
* docs: mark ARB_texture_gather as done on nvc0Ilia Mirkin2014-04-071-1/+1
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: add support for texture gatherIlia Mirkin2014-04-074-5/+22
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* docs: mark ARB_texture_query_lod as done for nv50, nvc0Ilia Mirkin2014-04-071-1/+1
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: enable texture query lodIlia Mirkin2014-04-074-1/+55
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nv50: enable texture query lodIlia Mirkin2014-04-076-1/+34
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* st/mesa: add support for ARB_texture_query_lodDave Airlie2014-04-072-2/+4
| | | | | | | Add support for the LODQ texture instruction. Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium: add support for LODQ opcodes.Dave Airlie2014-04-0717-2/+32
| | | | | | | | | This opcode provide support for GL_ARB_texture_query_lod, Signed-off-by: Dave Airlie <[email protected]> [imirkin: rebase, docs update] Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* i965/vec4: Allow constant propagation into dot product.Matt Turner2014-04-051-0/+4
| | | | | | | total instructions in shared programs: 1667088 -> 1667055 (-0.00%) instructions in affected programs: 3362 -> 3329 (-0.98%) Reviewed-by: Eric Anholt <[email protected]>
* glsl: Optimize (x + y cmp 0) into (x cmp -y).Matt Turner2014-04-051-0/+22
| | | | | | | | Cuts a small handful of instructions in Serious Sam 3: instructions in affected programs: 4692 -> 4666 (-0.55%) Reviewed-by: Ian Romanick <[email protected]>
* i965/fs: Split out can_coalesce_vars() function.Matt Turner2014-04-051-44/+47
| | | | Reviewed-by: Anuj Phogat <[email protected]>
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