summaryrefslogtreecommitdiffstats
Commit message (Expand)AuthorAgeFilesLines
* isl: Rework the way we handle surface paddingJason Ekstrand2016-07-131-27/+25
* isl: Use ARRAY_PITCH_SPAN_FULL for depth/stencil surfaces on gen7Jason Ekstrand2016-07-131-1/+1
* isl: Stop multiplying height by block sizeJason Ekstrand2016-07-131-2/+2
* isl: Get rid of tiling_get_extentJason Ekstrand2016-07-132-17/+0
* nir/spirv: Don't multiply the push constant block size by 4Jason Ekstrand2016-07-131-1/+1
* anv/pipeline: Assert that the number of uniforms from NIR fitsJason Ekstrand2016-07-131-0/+1
* radeonsi: report accurate SGPR and VGPR spillsMarek Olšák2016-07-132-5/+15
* radeonsi: add a workaround for a compute VGPR-usage LLVM bugMarek Olšák2016-07-131-0/+35
* radeonsi: use LLVMGetTypeKind to tell if an input is an array of descriptorsMarek Olšák2016-07-131-19/+11
* radeonsi: replace !tbaa with !invariant.loadMarek Olšák2016-07-131-12/+5
* radeonsi: set dereferenceable attribute on descriptor arraysMarek Olšák2016-07-131-4/+11
* gallivm: add helper lp_add_attr_dereferenceableMarek Olšák2016-07-132-0/+14
* radeonsi: clean up shader value metadata codeMarek Olšák2016-07-131-15/+19
* radeonsi: remove LLVMNoUnwindAttribute usesMarek Olšák2016-07-131-36/+31
* radeonsi: fix a typo in SI_PARAM_LINEAR_* handlingMarek Olšák2016-07-131-1/+1
* gallium/radeon: normalize the code styleMarek Olšák2016-07-132-338/+286
* radeonsi: just save buffer sizes instead of buffers while recording IBsMarek Olšák2016-07-135-10/+5
* Add c99_alloca.h include to fix compilation on CygwinJon Turney2016-07-131-0/+1
* i965/blorp: Cleanup leftovers from push constant disablingTopi Pohjolainen2016-07-132-65/+12
* i965/blorp/gen7+: Bring back push constant setupTopi Pohjolainen2016-07-132-0/+52
* radeonsi: silence Coverity warningNicolai Hähnle2016-07-132-0/+4
* i965/fs: do d2x lowering before simd splittingSamuel Iglesias Gonsálvez2016-07-131-5/+5
* i965/fs: do pack lowering before simd splittingIago Toral Quiroga2016-07-131-5/+5
* i965/fs: do not require force_writemask_all with exec_size 4Samuel Iglesias Gonsálvez2016-07-131-1/+1
* i965/fs/gen7: split instructions that run into exec masking bugsIago Toral Quiroga2016-07-131-0/+29
* i965/fs: use the new helper function to create double immediatesIago Toral Quiroga2016-07-131-3/+4
* i965/fs: add a helper function to create double immediatesIago Toral Quiroga2016-07-132-0/+40
* vc4: Validate QPU uniform pointer updates.Eric Anholt2016-07-121-0/+22
* vc4: Add support for NIR loops and break/continue.Eric Anholt2016-07-122-3/+79
* vc4: Add support for emitting NIR IF nodes.Eric Anholt2016-07-121-1/+91
* vc4: Add support for storing to NIR registers in a non-SSA fashion.Eric Anholt2016-07-122-85/+144
* vc4: Add a flag in the screen to track control flow support.Eric Anholt2016-07-123-1/+14
* vc4: Define a QIR branch instructionEric Anholt2016-07-124-9/+61
* vc4: Add kernel support for branching in shader validation.Eric Anholt2016-07-123-17/+280
* vc4: Add a bitmap of branch targets in kernel validation.Eric Anholt2016-07-123-2/+133
* vc4: Track the current instruction into the validation_state.Eric Anholt2016-07-121-24/+30
* vc4: Add QPU support for generating BRANCH instructions.Eric Anholt2016-07-125-1/+85
* vc4: Print live variable start/ends during QIR dumping.Eric Anholt2016-07-121-0/+45
* vc4: Implement live intervals using a CFG.Eric Anholt2016-07-126-39/+393
* vc4: Make vc4_qir_schedule handle each block in the program.Eric Anholt2016-07-121-14/+23
* vc4: Convert uniforms lowering to work with multiple blocks.Eric Anholt2016-07-121-29/+44
* vc4: Convert vc4_opt_peephole_sf to work with control flow.Eric Anholt2016-07-121-4/+18
* vc4: Create a basic block structure and move the instructions into it.Eric Anholt2016-07-126-20/+122
* vc4: Add a "qir_for_each_inst_inorder" macro and use it in many places.Eric Anholt2016-07-1212-14/+17
* vc4: Also enable phi elimination.Eric Anholt2016-07-121-0/+1
* vc4: fix memory leakEric Engestrom2016-07-121-1/+1
* vc4: Close our screen's fd on screen close.Eric Anholt2016-07-121-0/+3
* nir: Add optimization for (a || True == True)Eric Anholt2016-07-121-0/+1
* swr: [rasterizer core] correct MSAA behavior for conservative rasterizationTim Rowley2016-07-123-11/+31
* swr: [rasterizer core] conservative rast backend changesTim Rowley2016-07-128-221/+538