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* mesa/glthread: don't set a dispatch table if we aren't the ownerGregory Hainaut2017-03-161-3/+10
* mesa: Track the current vertex/element array buffers for glthread.Eric Anholt2017-03-1610-34/+231
* mesa: Disable glthread when glBegin() is called.Eric Anholt2017-03-161-1/+1
* mesa: Add an attribute for conditions to turn off threading.Eric Anholt2017-03-163-1/+15
* mesa: Add support for asynchronous glDraw* on GL core.Eric Anholt2017-03-162-7/+6
* mesa: Add support for NULL arguments like in glBufferData() in marshalling.Eric Anholt2017-03-162-9/+34
* mesa: Statically allocate glthread command buffer in the batch struct.Eric Anholt2017-03-162-7/+6
* glapi: Mark vertex attrib pointer functions as async.Eric Anholt2017-03-162-17/+17
* mesa: Custom thread marshalling for Flush.Paul Berry2017-03-163-2/+42
* mesa: Custom thread marshalling for ShaderSource.Paul Berry2017-03-164-1/+135
* mesa: Connect the generated GL command marshalling code to the build.Eric Anholt2017-03-162-0/+17
* Revert "mesa: make _mesa_alloc_dispatch_table() static"Marek Olšák2017-03-162-5/+9
* mesa: Create pointers for multithread marshalling dispatch table.Paul Berry2017-03-168-34/+69
* mesa: Add infrastructure for a worker thread to process GL commands.Eric Anholt2017-03-166-0/+476
* mesa: Validate count parameters when marshalling.Eric Anholt2017-03-161-0/+15
* glapi: Generate GL API marshalling code from the XML.Paul Berry2017-03-167-0/+518
* glapi: Mark compressed teximage functions as sync.Eric Anholt2017-03-161-5/+5
* glapi: Annotate functions with "marshal" attribute.Paul Berry2017-03-166-27/+44
* egl: Implement __DRI_BACKGROUND_CALLABLEEric Anholt2017-03-165-1/+22
* glx: Implement __DRI_BACKGROUND_CALLABLEPaul Berry2017-03-162-1/+30
* mesa: Add SetBackgroundContext to dd_function_tablePaul Berry2017-03-162-0/+21
* dri: Update dri_util to keep track of __DRI_BACKGROUND_CALLABLEPaul Berry2017-03-162-0/+3
* dri_interface: Add new marshalling interfaces to dri_interface.hPaul Berry2017-03-161-0/+39
* gallivm: (trivial) remove duplicated lineRoland Scheidegger2017-03-161-1/+0
* draw: (trivial) remove a unnecessary lp_build_alloca()Roland Scheidegger2017-03-161-2/+0
* swr: support layer output in geometry shadersIlia Mirkin2017-03-151-0/+2
* Revert "radv: Emit cache flushes before CP DMA."Bas Nieuwenhuizen2017-03-161-3/+0
* gallium/tgsi: Treat UCMP sources as floats to match the GLSL-to-TGSI pass exp...Francisco Jerez2017-03-152-16/+46
* util/disk_cache: do eviction before creating .tmpGrazvydas Ignotas2017-03-161-10/+8
* swr: validate backend state numAttributesTim Rowley2017-03-151-0/+2
* gbm: Export a get modifiersBen Widawsky2017-03-155-0/+66
* i965: introduce modifier selection.Ben Widawsky2017-03-151-0/+19
* egl/drm: Use modifiers for backbuffer creationBen Widawsky2017-03-151-4/+15
* gbm: Introduce modifiers into surface/bo creationBen Widawsky2017-03-155-12/+116
* i965: Implement basic modifier image creationBen Widawsky2017-03-151-4/+34
* dri: Add an image creation with modifiersBen Widawsky2017-03-151-1/+26
* radeonsi: implement TGSI opcodes TEX_LZ and TXF_LZMarek Olšák2017-03-152-6/+16
* glsl_to_tgsi: use TEX_LZ and TXF_LZ when availableMarek Olšák2017-03-151-6/+20
* glsl_to_tgsi: remove a redundant statementMarek Olšák2017-03-151-2/+0
* gallium: add TGSI opcodes TEX_LZ and TXF_LZMarek Olšák2017-03-154-5/+39
* gallium: add PIPE_CAP_TGSI_TEX_TXF_LZMarek Olšák2017-03-1517-0/+18
* radeonsi: disable sinking common instructions down to the end blockSamuel Pitoiset2017-03-151-0/+11
* tgsi: add missing compute shader entry in tgsi_get_processor_name()Samuel Pitoiset2017-03-151-0/+2
* radeonsi: clean up tex_fetch_ptrs()Samuel Pitoiset2017-03-151-6/+4
* configure.ac: bump pthread-stubs requirementEmil Velikov2017-03-151-1/+1
* glx: don't expose systemTimeExtension for DRI2/DRI3/DRISWEmil Velikov2017-03-153-4/+0
* anv: do not open random render node(s)Emil Velikov2017-03-152-17/+39
* radv: do not open random render node(s)Emil Velikov2017-03-151-12/+36
* radv/winsys: use drmGetDevice2 APIEmil Velikov2017-03-152-2/+3
* winsys/amdgpu: use drmGetDevice2 APIEmil Velikov2017-03-151-2/+2