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* gallium/hud: don't enable blending for all objectsMarek Olšák2016-08-221-2/+7
| | | | Reviewed-by: Brian Paul <[email protected]>
* util: add assert that key cannot be NULL on insertionTapani Pälli2016-08-221-0/+2
| | | | | | Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* glsl: fix key used for hashing switch statement casesTapani Pälli2016-08-221-4/+24
| | | | | | | | | | | | Implementation previously used value itself as the key, however after hash implementation change by ee02a5e we cannot use 0 as key. v2: use constant pointer as the key and implement comparison for contents (Eric Anholt) Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97309
* android: i965: add per-gen libmesa_i965_gen{8,9} staticMauro Rossi2016-08-201-1/+45
| | | | | | | Needed to fix android build after commit 16a9fcb which enabled genxml for gen{8,9} state setup This is the last patch needed, android build tested successfully.
* android: i965: add per-gen libmesa_i965_gen{7,75} static librariesMauro Rossi2016-08-201-1/+45
| | | | | | | | Needed to fix android build after commit e198983 which enabled genxml for gen{7,75} state setup Android build fix for gen{8,9} will follow as incremental patch, build tested successfully with all per-gen patches applied.
* android: i965: add per-gen libmesa_i965_gen6 static libraryMauro Rossi2016-08-201-3/+45
| | | | | | | | Needed to fix android build after commit c8bc1ae where new per-gen genX_blorp.c source replaced gen6_blorp.c for gen6 Android build fixes for gen{7,75} and gen{8,9} will follow as incremental patches, build tested successfully with all per-gen patches applied.
* glsl: Rename link_fs_input_layout_qualifiers to "inout".Kenneth Graunke2016-08-201-2/+2
| | | | | | | | We're going to handle output qualifiers here too, and calling it "inout" seems to be the going convention. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* i965/cfg: Factor common code out of switch statement.Matt Turner2016-08-201-8/+2
| | | | Reviewed-by: Iago Toral Quiroga <[email protected]>
* anv: Give the installed intel_icd.json file an absolute pathJason Ekstrand2016-08-203-2/+8
| | | | | | | | | | | | Not providing a path allows the ICD to work on multi-arch systems but breaks it if you install anywhere other than /usr/lib. Given that users may be installing locally in .local or similar, we probably do want to provide a filename. Distros can carry a revert of this commit if they want an intel_icd.json file without the path. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* mesa: Fix fixed function spot lighting on newer hardware (again)Daniel Scharrer2016-08-191-14/+3
| | | | | | | | | | | | This was first fixed in commit b3f9c5c and then broken again in commit fe2d2c7, which removed the abs modifier from input registers. v2: Don't change the size of struct ureg. Cc: "12.0" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91342 Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Daniel Scharrer <[email protected]>
* i965: Remove comment within a comment.Matt Turner2016-08-191-1/+1
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* llvmpipe: fix issues with depth clampRoland Scheidegger2016-08-203-49/+94
| | | | | | | | | | | | | | | | We only did depth clamp when the value was written from the fs. This is very wrong both for d3d10 and GL, and only passed the corresponding piglit test due to pure luck (it no longer does with the enhanced test). Also, interpolation clamped values to 1.0 always, which can legitimately happen if depth clip is disabled, so fix that as well (untested). There is one unresolved issue left, d3d10 always does depth clamping, whereas GL does not (but does [0,1] clamp instead for fs depth outputs) - this information isn't in any gallium state object, leave it as-is for now (though it looks like llvmpipe misses the [0,1] clamp as well). This (with the previous patch) fixes piglit depth-clamp-range test. Reviewed-by: Jose Fonseca <[email protected]>
* llvmpipe: fix depth clamping wrt reversed near/far valuesRoland Scheidegger2016-08-201-9/+3
| | | | | | | | | | | This wasn't handled before (the result was that no matter what value got clamped, it always ended up as the near value in this case) (if clamping actually happened). Fix this by using the util helper for that (the math is otherwise "mostly" the same, mostly because there could actually be differences due to float rounding, but I don't even know which one would be more correct). Reviewed-by: Jose Fonseca <[email protected]>
* i965/sched: Simplify work done by add_barrier_deps().Matt Turner2016-08-191-0/+9
| | | | | | | | | | | | | Scheduling barriers are implemented by placing a dependence on every node before and after the barrier. This is unnecessary as we can limit the number of nodes we place dependencies on to those between us and the next barrier in each direction. Runtime of dEQP-GLES31.functional.ssbo.layout.random.all_shared_buffer.23 is reduced from ~25 minutes to a little more than three. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94681 Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: Ignore swizzle of VGRF for use by var_range_end().Matt Turner2016-08-192-2/+2
| | | | | | | | | | | | | | | | | | | | | var_range_end(v, n) loops over the n components of variable number v and finds the maximum value, giving the last use of any component of v. Therefore it expects v to correspond to the variable associated with the .x channel of the VGRF. var_from_reg() however returns the variable for the first channel of the VGRF, post-swizzle. So, if the last register had a swizzle with y, z, or w in the swizzle component, we would read out of bounds. For any other register, we would read liveness information from the next register. The fix is to convert the src_reg to a dst_reg in order to call the dst_reg version of var_from_reg() that doesn't consider the swizzle. Cc: [email protected] Reviewed-by: Francisco Jerez <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: Print spills:fills.Matt Turner2016-08-191-7/+11
| | | | | | | Allows shader-db to work on vec4 programs (has been broken since shader-db commit 646df5ca98b2 from April!) Reviewed-by: Kenneth Graunke <[email protected]>
* a4xx: make sure to actually clamp depth as requestedIlia Mirkin2016-08-192-2/+29
| | | | | | | | | | | We were previously ... not clamping. I guess this meant that everything got clamped to 1/0, which was enough to pass the existing tests. Or perhaps the clamping would only happen to the rasterized depth value and not the frag shader's output depth value. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97231 Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* a4xx: only disable depth clipping, not all clipping, when requestedIlia Mirkin2016-08-192-1/+4
| | | | | | | | | | The previous bit disables the whole clipper, including the regular viewport-related clipping that would go on. The two new bits disable near and far clipping (separately, as verified with the depth-clamp-range piglit). Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* vc4: Switch store_output to using nir_lower_io_to_scalar / component.Eric Anholt2016-08-192-44/+16
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* vc4: Use the intrinsic's first_component for vattr VPM index.Eric Anholt2016-08-192-7/+3
| | | | Avoids another multiplication by 4 of the base in the NIR.
* vc4: Convert to using nir_lower_io_scalar for FS inputs.Eric Anholt2016-08-192-44/+62
| | | | | The scalarizing of FS inputs can be done in a non-driver-dependent manner, so extract it out of the driver.
* vc4: Switch to using the intrinsic accessors.Eric Anholt2016-08-193-23/+29
| | | | | The const_index[] values have always felt magic, and this documents them a bit better.
* nir: Add an IO scalarizing pass using the intrinsic's first_component.Eric Anholt2016-08-193-0/+131
| | | | | | | | | | vc4 wants to have per-scalar IO load/stores so that dead code elimination can happen on a more granular basis, which it has been doing in the backend using a multiplication by 4 of the intrinsic's driver_location. We can represent it properly in the NIR using the first_component field, though. Reviewed-by: Kenneth Graunke <[email protected]>
* nir: Add nir_builder support for individual system value loads.Eric Anholt2016-08-196-20/+34
| | | | | | | | | | The previous nir_load_system_value(b, nir_intrinsic_load_whatever), 0) was rather verbose, when system values should be easy to generate. The index is left out because only one system value had an index included in it. Reviewed-by: Kenneth Graunke <[email protected]>
* nir: Move the undef of nir_intrinsics.h macros to the .h.Eric Anholt2016-08-192-3/+3
| | | | | | | I wanted to include this from nir_builder as well, so it also needed the undefs. Reviewed-by: Kenneth Graunke <[email protected]>
* ttn: Use nir_load_front_face instead of the TGSI-style input.Eric Anholt2016-08-193-63/+28
| | | | | | | This reduces the diff between GLSL-to-NIR and TGSI-to-NIR, and gives NIR more optimization to work on. Reviewed-by: Kenneth Graunke <[email protected]>
* nir: Use the system-value front face for twoside lowering.Eric Anholt2016-08-191-16/+7
| | | | | | | | GLSL-to-NIR generates system value usage, and vc4/freedreno would both like the system value instead of the varying, so switch this pass over to it. Reviewed-by: Kenneth Graunke <[email protected]>
* ttn: Make FRAG_RESULT_DEPTH be a float variable to match gtn and ptn.Eric Anholt2016-08-194-11/+17
| | | | | | | This lets TTN-using drivers handle FRAG_RESULT_DEPTH the same between all their source paths. Reviewed-by: Rob Clark <[email protected]>
* vc4: Dump the TGSI before trying to convert it to NIR.Eric Anholt2016-08-191-4/+3
| | | | In the case of debugging a crash in TTN, this is nice to have.
* radeon/vce: set flag based on dual instance enablementBoyuan Zhang2016-08-191-2/+4
| | | | | | | Set the flag on when dual instance encoding is supported, otherwise set it to off. Signed-off-by: Boyuan Zhang <[email protected]>
* st/va: enable dual instances encode by sync surfaceBoyuan Zhang2016-08-193-3/+46
| | | | | | | | | | | This patch improves the performance of Vaapi Encode by enabling dual instances encoding. flush function is not called after each end_frame call. radeon/vce will do flush whenever 2 frames are submitted for encoding. Implement sync surface function to flush only if the frame hasn't been flushed yet. Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Christian König <[email protected]>
* i965/blorp: Remove no longer used state setup helpersJason Ekstrand2016-08-193-657/+0
| | | | | | | | Now that we're using genxml for everything, we no longer need the hand-rolled state emit helpers. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Use genxml for gen8-9 state setupJason Ekstrand2016-08-196-587/+172
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Use genxml for gen7 state setupJason Ekstrand2016-08-196-565/+299
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Add genxml-based vertex setup helpersJason Ekstrand2016-08-191-1/+212
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Add a helper for emitting surface statesJason Ekstrand2016-08-191-24/+28
| | | | | | | | The new helper emits surface states and the binding table in one go. It's nice to have it pulled out of the main blorp_exec function. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Add genxml-based sampler state emit functionJason Ekstrand2016-08-191-11/+38
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Add genxml-based dynamic state emit functionsJason Ekstrand2016-08-191-9/+73
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Move gen6_blorp.c to a file that gets recompiled per-genJason Ekstrand2016-08-193-5/+18
| | | | | | | | | At the moment, it's only used for gen6 but that will change soon. We use the genX prefix for recompiled things in the Vulkan driver. It isn't great, but it seems to have worked ok. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp/gen6: Use genxml packing structs for state setupJason Ekstrand2016-08-192-420/+311
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Stop setting point and line rasterization rulesJason Ekstrand2016-08-193-7/+1
| | | | | | | | Blorp never uses points or lines and the default values of 0 are perfectly fine. Explicitly setting them is just noise. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp/gen8: Move viewport setup to after wm stateJason Ekstrand2016-08-191-1/+2
| | | | | | | This matches gen6 and gen7. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp/gen6-7: Move multisample setup to right after samplersJason Ekstrand2016-08-192-9/+10
| | | | | | | This mimics gen8 blorp Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp/gen6-7: Move surfaces and samplers closer togetherJason Ekstrand2016-08-192-11/+10
| | | | | | | This mimics what we do on gen8. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp/gen7-8: Emit depth stencil state with CC and BLENDJason Ekstrand2016-08-192-3/+4
| | | | | | | All three go together on SNB so let's keep them together for gen7+ as well. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp/gen6: Move constant disables higher upJason Ekstrand2016-08-191-22/+7
| | | | | | | This is what gen7-8 do and it's a bit cleaner. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Don't clear an empty regionJason Ekstrand2016-08-191-0/+4
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Move the non-static blorp state setup helpers to another fileJason Ekstrand2016-08-194-541/+578
| | | | | | | | We're about to start replacing blorp state setup code with packing structs and we want to feel free to delete files as we go. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Make gen6 VS and GS disable helpers staticJason Ekstrand2016-08-192-10/+2
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Roll intel_reg.h into brw_defines.hJason Ekstrand2016-08-1915-308/+277
| | | | | | | | More than half of the stuff in intel_reg.h had nothing whatsoever to do with registers and really belongs in brw_defines.h anyway. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
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