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* ilo: fix scratch space setup in coreChia-I Wu2015-10-2311-133/+327
* glsl: remove excess location qualifier validationTimothy Arceri2015-10-231-48/+22
* docs: update relnotes to mention virgl driver.Dave Airlie2015-10-231-0/+1
* virgl/vtest: add vtest driverDave Airlie2015-10-2311-2/+1243
* virgl: add driver for virtio-gpu 3D (v2)Dave Airlie2015-10-2329-1/+5928
* tgsi: try and handle overflowing shaders. (v2)Dave Airlie2015-10-232-3/+9
* tgsi: add option to dump floats as hex valuesDave Airlie2015-10-233-2/+30
* svga: Condition preemptive flush on draw emissionSinclair Yeh2015-10-224-5/+25
* svga: try to avoid index generation for some primitive typesBrian Paul2015-10-221-0/+14
* svga: avoid provoking vertex conversion when possibleBrian Paul2015-10-221-1/+14
* svga: detect constant color writes in fragment shadersBrian Paul2015-10-225-2/+77
* mesa: check for unchanged line width before error checkingBrian Paul2015-10-221-3/+4
* st/mesa: use _mesa_RasterPos() when possibleBrian Paul2015-10-221-0/+10
* tnl: remove t_rasterpos.cBrian Paul2015-10-222-479/+0
* drivers/common: use _mesa_RasterPos instead of _tnl_RasterPosBrian Paul2015-10-221-1/+2
* mesa: copy rasterpos evaluation code into core MesaBrian Paul2015-10-222-0/+444
* vbo: optimize vertex copying when 'wrapping'Brian Paul2015-10-222-17/+14
* radeon/uvd: don't expose HEVC on old UVD hw (v3)Alex Deucher2015-10-221-32/+18
* i965/vec4: print predicate control at brw_vec4 dump_instructionAlejandro Piñeiro2015-10-223-3/+5
* i965/vec4: use an envvar to decide to print the assembly on cmod_propagation ...Alejandro Piñeiro2015-10-222-2/+2
* i965/vec4: Add unit tests for cmod propagation passAlejandro Piñeiro2015-10-222-0/+829
* i965/vec4: adding vec4_cmod_propagation optimizationAlejandro Piñeiro2015-10-224-0/+160
* i965/vec4: track and use independently each flag channelAlejandro Piñeiro2015-10-223-14/+52
* i965/vec4: nir_emit_if doesn't need to predicate based on all the channelsAlejandro Piñeiro2015-10-221-1/+3
* i965/vec4/gs: Fix signed/unsigned comparison warning.Matt Turner2015-10-221-1/+1
* i965/fs: Emit a single ADD instruction for SET_SAMPLE_ID on Gen8+.Matt Turner2015-10-221-1/+1
* i965/fs: Drop unnecessary write-enable-all from SET_SAMPLE_ID.Matt Turner2015-10-221-5/+5
* i965/fs: Trim unneeded channels in SampleID setup.Matt Turner2015-10-221-6/+6
* i965/fs: Use type-W for immediate in SampleID setup.Matt Turner2015-10-222-3/+3
* i965/vec4: Initialize LOD to 0.0f for textureQueryLevels() and texture().Matt Turner2015-10-221-0/+12
* i965: Note that the UV immediate type is Gen6+.Matt Turner2015-10-221-1/+1
* gallivm: Translate all util_cpu_caps bits to LLVM attributes.Jose Fonseca2015-10-221-2/+34
* i965/fs: Disable CSE optimization for untyped & typed surface readsJordan Justen2015-10-223-1/+22
* ilo: make sure there is HiZ before resolvingChia-I Wu2015-10-221-2/+4
* ilo: fix max thread count for HS on Gen8Chia-I Wu2015-10-221-3/+5
* i965: Advertise ARB_shader_stencil_export (gen9+)Ben Widawsky2015-10-212-0/+2
* i965: Implement ARB_shader_stencil_export (gen9+)Ben Widawsky2015-10-219-3/+98
* i965/fs: Enumerate logical fb writes argumentsBen Widawsky2015-10-213-21/+29
* svga: fix clip plane regression after recent tgsi_scan changeBrian Paul2015-10-211-2/+2
* i965: Implement gl_InvocationID.Kenneth Graunke2015-10-211-0/+13
* i965: Implement nir_intrinsic_load_primitive.Kenneth Graunke2015-10-211-0/+8
* i965: Add a fs_visitor constructor that takes a brw_gs_compile.Kenneth Graunke2015-10-212-3/+39
* i965: Add a brw->scalar_gs flag controlled by INTEL_SCALAR_GS=1.Kenneth Graunke2015-10-213-1/+8
* i965: Make emit_urb_writes() reserve space for GS header information.Kenneth Graunke2015-10-211-2/+16
* i965: Make emit_urb_writes() only set EOT for the VS.Kenneth Graunke2015-10-211-1/+1
* i965: Make fs_visitor::emit_urb_writes reusable for scalar GS.Kenneth Graunke2015-10-211-7/+7
* i965: Introduce a brw_vue_prog_data::include_vue_handles flag.Kenneth Graunke2015-10-212-0/+5
* i965: Introduce a new SHADER_OPCODE_URB_READ_SIMD8 opcode.Kenneth Graunke2015-10-215-0/+40
* i965: Introduce new SHADER_OPCODE_URB_WRITE_SIMD8_MASKED/PER_SLOT opcodes.Kenneth Graunke2015-10-215-0/+33
* i965/gs: Do prog_data setup and other calculations in brw_compile_gsJason Ekstrand2015-10-214-220/+222
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