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* i965/eu: Explicitly disable instruction compaction on Broadwell for now.Kenneth Graunke2014-08-101-1/+1
* i965/eu: Use Haswell atomic messages on Broadwell.Kenneth Graunke2014-08-101-2/+2
* i965/eu: Change gen == 7 to gen >= 7 in a couple brw_eu_emit.c cases.Kenneth Graunke2014-08-101-2/+2
* i965/clip: Removing scissor atomBen Widawsky2014-08-101-2/+2
* i965/guardband: Enable for all viewport dimensions (GEN8+)Ben Widawsky2014-08-101-10/+20
* i965: Simplify viewport extents programming on GEN8Ben Widawsky2014-08-101-9/+15
* i965/guardband: Improve comments for guardband clippingBen Widawsky2014-08-101-4/+18
* i965: Support the allow_glsl_extension_directive_midshader option.Kenneth Graunke2014-08-102-0/+4
* i965/fs: set virtual_grf_count in assign_regs()Connor Abbott2014-08-101-0/+4
* i965/fs: don't read from uninitialized memory while assigning registersConnor Abbott2014-08-101-6/+6
* i965/fs: Fix bad whitespace.Matt Turner2014-08-101-2/+2
* gallium/radeon: Set gpu_address to 0 if r600_virtual_address is falseNiels Ole Salscheider2014-08-101-0/+2
* radeonsi: simplify constant buffer upload for big endianMarek Olšák2014-08-101-18/+4
* winsys/radeon: fix compile warningsMarek Olšák2014-08-091-3/+4
* r600g/compute: fix compile warningsMarek Olšák2014-08-092-10/+11
* r300g: handle new shader capsMarek Olšák2014-08-091-0/+2
* radeonsi: fix CMASK and HTILE allocation on TahitiMarek Olšák2014-08-092-3/+56
* gallium/radeon: remove r600_resource_vaMarek Olšák2014-08-091-9/+0
* gallium/radeon: use gpu_address from r600_resourceMarek Olšák2014-08-093-21/+14
* r600g: use gpu_address from r600_resourceMarek Olšák2014-08-095-39/+29
* radeonsi: use gpu_address from r600_resourceMarek Olšák2014-08-096-56/+41
* gallium/radeon: store VM address in r600_resourceMarek Olšák2014-08-093-2/+7
* r600g: remove useless r600_resource_va callsMarek Olšák2014-08-091-18/+9
* radeonsi: always prefer SWITCH_ON_EOP(0) on CIKMarek Olšák2014-08-094-10/+46
* radeonsi: fix a hang with instancing in Unigine Heaven/Valley on HawaiiMarek Olšák2014-08-091-5/+2
* radeon,r200: fix buffer validation after CS flushMarek Olšák2014-08-098-15/+8
* st/mesa: fix blit-based partial TexSubImage for 1D arraysMarek Olšák2014-08-091-0/+2
* st/mesa: fix DrawPixels(GL_STENCIL_INDEX)Marek Olšák2014-08-091-7/+4
* st/mesa: dump TGSI before calling into the driverMarek Olšák2014-08-091-12/+10
* configure.ac: Use LIBS rather than LDFLAGS to add -ldl to dladdr checkJon TURNEY2014-08-091-3/+4
* vc4: Add support for the COS instruction.Eric Anholt2014-08-081-0/+38
* vc4: Add support for the SIN instruction.Eric Anholt2014-08-081-0/+35
* vc4: Fix register aliasing for packing of scaled coordinates.Eric Anholt2014-08-081-11/+18
* vc4: Add some debug code for forcing fragment shader output color.Eric Anholt2014-08-081-0/+15
* u_primconvert: Copy min/max_index from the original primitive.Eric Anholt2014-08-081-4/+2
* vc4: Fix using and emitting the 1/W from the vertex/coord shaders.Eric Anholt2014-08-081-14/+20
* vc4: Add support for swizzles of 32 bit float vertex attributes.Eric Anholt2014-08-082-20/+73
* vc4: Add support for the TGSI FRC opcode.Eric Anholt2014-08-081-0/+18
* vc4: Add support for the TGSI TRUNC opcode.Eric Anholt2014-08-084-0/+15
* vc4: Crank up the tile allocation BO sizeEric Anholt2014-08-081-2/+2
* vc4: Add support for multiple attributesEric Anholt2014-08-084-69/+46
* vc4: Add more useful debug for the undefined-source caseEric Anholt2014-08-081-5/+12
* vc4: Add support for the lit opcode.Eric Anholt2014-08-082-1/+45
* vc4: Add support for the POW opcodeEric Anholt2014-08-081-0/+15
* vc4: Refactor uniform handling.Eric Anholt2014-08-081-27/+27
* vc4: Add support for the LRP opcode.Eric Anholt2014-08-081-0/+20
* vc4: Add copy propagation between temps.Eric Anholt2014-08-084-0/+81
* vc4: Add dead code elimination.Eric Anholt2014-08-084-3/+94
* vc4: Add an initial pass of algebraic optimization.Eric Anholt2014-08-085-4/+125
* vc4: Add support for CMP.Eric Anholt2014-08-084-1/+48
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