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* i965/gen9: Configure rbc buffers as plain for non-rbc tex viewsTopi Pohjolainen2016-06-012-3/+48
| | | | | | | | | | | | | | | | | | | | | | Fixes rendering in Shadow of Mordor with rbc. Application writes RGBA_UNORM texture filling it with values the application wants to later on treat as SRGB_ALPHA. Intel driver enables lossless compression for the buffer by the time of writing. However, the driver fails to make sure the buffer can be sampled as something else later on and unfortunately there is restriction in the hardware for using lossless compression for srgb formats which looks to extend itself to the sampling engine also. Requesting srgb to linear conversion on top of compressed buffer results the color values to be pretty much garbage. Fortunately none of tracked benchmarks showed a regression with this. v2 (Matt): Add missing space Cc: "12.0" <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Fix the passthrough TCS for isolines.Kenneth Graunke2016-05-311-7/+12
| | | | | | | | | | | | | | | | We weren't setting up several of the uniform values for the patch header, so we'd crash when uploading push constants. We at least need to initialize them to zero. We also had the isoline parameters reversed, so it would also render incorrectly (if it didn't crash). Fixes a new Piglit test(*) (isoline-no-tcs), as well as crashes in GL44-CTS.tessellation_shader.single.max_patch_vertices. (*) https://lists.freedesktop.org/archives/piglit/2016-May/019866.html Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Cc: [email protected]
* i965/xfb: skip components in correct buffer.Dave Airlie2016-06-011-4/+6
| | | | | | | | | | | The driver was adding the skip components but always for buffer 0. This fixes: GL45-CTS.gtf40.GL3Tests.transform_feedback3.transform_feedback3_skip_multiple_buffers Reviewed-by: Kenneth Graunke <[email protected]> Cc: "12.0 11.2" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* glsl/linker: fix multiple streams transform feedback.Dave Airlie2016-06-011-15/+17
| | | | | | | | | | | | | | | | | e2791b38b42f83add5b07298c39741bf0a6d7d4b mesa/program_interface_query: fix transform feedback varyings. caused a regression in GL45-CTS.gtf40.GL3Tests.transform_feedback3.transform_feedback3_multiple_streams on radeonsi. The problem was it was using the skip components varying to set the stream id, when it should wait until a varying was written, this just adds the varying checks in the right place. Cc: "12.0" <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* mesa/bufferobj: use mapping range in BufferSubData.Dave Airlie2016-06-011-1/+1
| | | | | | | | | | | | | | | | | According to GL4.5 spec: An INVALID_OPERATION error is generated if any part of the speci- fied buffer range is mapped with MapBufferRange or MapBuffer (see sec- tion 6.3), unless it was mapped with MAP_PERSISTENT_BIT set in the Map- BufferRange access flags. So we should use the if range is mapped path. This fixes: GL45-CTS.buffer_storage.map_persistent_buffer_sub_data Reviewed-by: Nicolai Hähnle <[email protected]> Cc: "12.0, 11.2" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* nv50/ir: fix error finding free element in bitset in some situationsIlia Mirkin2016-05-311-0/+6
| | | | | | | | | | | | | | This really only hits for bitsets with a size of a multiple of 32. We can end up with pos = -1 as a result of the ffs, which we in turn decide is a valid position (since we fall through the loop and i == 1, we end up adding 32 to it, so end up returning 31 again). Up until recently this was largely unreachable, as the register file sizes were all 63 or 255. However with the advent of compute shaders which can restrict the number of registers, this can now happen. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "12.0" <[email protected]>
* nv50/ir: print relevant file's bitset when showing RA infoIlia Mirkin2016-05-311-4/+4
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* Revert "glsl: fix xfb_offset unsized array validation"Timothy Arceri2016-06-014-41/+31
| | | | | | | | | | | This reverts commit aac90ba2920cf5ceb4df6dba776dd3952780e456. The commit caused a regression in: piglit.spec.glsl-1_50.compiler.gs-input-nonarray-named-block.geom Also the CTS test it was meant to fix seems like it may be bogus. Cc: "12.0" <[email protected]>
* i965/fs: Allow scalar source regions on SNB math instructions.Francisco Jerez2016-05-313-17/+8
| | | | | | | | | | | | | | | | I haven't found any evidence that this isn't supported by the hardware, in fact according to the SNB hardware spec: "The supported regioning modes for math instructions are align16, align1 with the following restrictions: - Scalar source is supported. [...] - Source and destination offset must be the same, except the case of scalar source." Cc: "12.0" <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/fs: Fix constant combining for instructions that cannot accept source mods.Francisco Jerez2016-05-311-4/+3
| | | | | | | | | | This is the case for SNB math instructions so we need to be careful and insert the literal value of the immediate into the table (rather than its absolute value) if the instruction is unable to invert the sign of the constant on the fly. Cc: "12.0" <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Extend remove_duplicate_mrf_writes() to handle non-VGRF to MRF copies.Francisco Jerez2016-05-311-8/+8
| | | | | Cc: "12.0" <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Fix compute_to_mrf() to coalesce VGRFs initialized by multiple ↵Francisco Jerez2016-05-311-10/+36
| | | | | | | | | | | | | | | | | | | | | | single-GRF writes. Which requires using a bitset instead of a boolean flag to keep track of the GRFs we've seen a generating instruction for already. The search loop continues until all instructions initializing the value of the source VGRF have been found, or it is determined that coalescing is not possible. Fixes a few piglit test cases on Gen4-6 which were regressed by 6956015aa514f2d06d0e4b33bfe6bca83142fbf0 due to the different (yet perfectly valid) ordering in which copy instructions are emitted now by the simd lowering pass, which had the side effect of causing this optimization pass to start corrupting the program in cases where a VGRF-to-MRF copy instruction would be eliminated but only the last instruction writing to the source VGRF region would be rewritten to point to the target MRF. Cc: "12.0" <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Teach compute_to_mrf() about the COMPR4 address transformation.Francisco Jerez2016-05-311-1/+23
| | | | | | | | | This will be required to correctly transform the destination of 8-wide instructions that write a single GRF of a VGRF to MRF copy marked COMPR4. Cc: "12.0" <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Refactor compute_to_mrf() to split search and rewrite into separate ↵Francisco Jerez2016-05-311-10/+25
| | | | | | | | | | | | | | | loops. This will allow compute_to_mrf to handle cases where the source of the VGRF-to-MRF copy is initialized by more than one instruction. In such cases we cannot rewrite the destination of any of the generating instructions until it's known whether the whole VGRF source region can be coalesced into the destination MRF, which will imply continuing the search until all generating instructions have been found or it has been determined that the VGRF and MRF registers cannot be coalesced. Cc: "12.0" <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Fix compute-to-mrf VGRF region coverage condition.Francisco Jerez2016-05-311-3/+6
| | | | | | | | | | | | | | | Compute-to-mrf was checking whether the destination of scan_inst is more than one component (making assumptions about the instruction data type) in order to find out whether the result is being fully copied into the MRF destination, which is rather inaccurate in cases where a single-component instruction is only partially contained in the source region, or when the execution size of the copy and scan_inst instructions differ. Instead check whether the destination region of the instruction is really contained within the bounds of the source region of the copy. Cc: "12.0" <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Simplify and improve accuracy of compute_to_mrf() by using ↵Francisco Jerez2016-05-311-47/+13
| | | | | | | | | | | | | regions_overlap(). Compute-to-mrf was being rather heavy-handed about checking whether instruction source or destination regions interfere with the copy instruction, which could conceivably lead to program miscompilation. Fix it by using regions_overlap() instead of the open-coded and dubiously correct overlap checks. Cc: "12.0" <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Teach regions_overlap() about COMPR4 MRF regions.Francisco Jerez2016-05-311-3/+17
| | | | | Cc: "12.0" <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* Don't use python 3Dylan Baker2016-05-312-10/+2
| | | | | | | | | | | Now there are not files that require python 3, so for now just remove the python 3 dependency and use python 2. I think the right plan is to just get all of the python ready for python 3, and then use whatever python is available. Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> cc: 12.0 <[email protected]>
* genxml: change chbang to python 2Dylan Baker2016-05-311-1/+1
| | | | | | Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> cc: 12.0 <[email protected]>
* genxml: use the isalpha method rather than str.isalpha.Dylan Baker2016-05-311-1/+1
| | | | | | | | | This fixes gen_pack_header to work on python 2, where name[0] is unicode not str. Signed-off-by: Dylan Bake <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> cc: 12.0 <[email protected]>
* genxml: require future imports for python2 compatibility.Dylan Baker2016-05-311-0/+3
| | | | | | Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> cc: 12.0 <[email protected]>
* genxml: mark re strings as rawDylan Baker2016-05-311-2/+2
| | | | | | | | This is a correctness issue. Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> cc: 12.0 <[email protected]>
* genxml: Make classes descendants of objectDylan Baker2016-05-311-4/+4
| | | | | | | | | This is the default in python3, but in python2 you get old style classes. No one likes old-style classes. Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> cc: 12.0 <[email protected]>
* genxml: mark gen_pack_header.py as encoded in utf-8Dylan Baker2016-05-311-0/+1
| | | | | | | | | There is unicode in this file, and I'm actually surprised that the python interpreter hasn't gotten grumpy. Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> cc: 12.0 <[email protected]>
* radeonsi: Decompress DCC textures in a render feedback loop.Bas Nieuwenhuizen2016-05-314-0/+113
| | | | | | | | | By using a counter to quickly reject textures that are not bound to a framebuffer, the performance impact when binding sampler_views/images is not too large. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Add counter to check if a texture is bound to a framebuffer.Bas Nieuwenhuizen2016-05-314-0/+26
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* vc4: Fix compiler warnings in fail_instr path of QIR validate passRhys Kidd2016-05-311-10/+10
| | | | | | | Introduced in 8e2d0843c02daf5280184f179ae8ed440ac90d7f. Signed-off-by: Rhys Kidd <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* anv: let anv_entrypoints_gen.py generate proper Wayland/Xcb guardsEmil Velikov2016-05-311-0/+28
| | | | | | | | | | | | | | The generated sources should follow the example set by the vulkan headers and our non-generated code. Namely: the code for all supported platforms should be available, each one guarded by its respective VK_USE_PLATFORM_*_KHR macro. v2: Reword commit message. Cc: Mark Janes <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96285 Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> (v1 over IRC)
* svga: change enum pipe_resource_usage back to unsignedBrian Paul2016-05-311-1/+1
| | | | | | | | | This parameter is actually a bitmask of PIPE_TRANSFER_x flags. Change it back to a simple unsigned type. IIRC, some compilers complain about masks of enum values. Also, this make the function signature match u_resource_vtbl::transfer_map() again. Reviewed-by: Roland Scheidegger <[email protected]>
* radeonsi: fix CP DMA hazard with index buffer fetchesMarek Olšák2016-05-311-2/+20
| | | | Reviewed-by: Alex Deucher <[email protected]>
* r600g: do GL-compliant integer resolvesMarek Olšák2016-05-311-37/+1
| | | | | | | The GL spec has been clarified and the new rule says we should just copy 1 sample. u_blitter does the right thing. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: do GL-compliant integer resolvesMarek Olšák2016-05-311-37/+1
| | | | | | | The GL spec has been clarified and the new rule says we should just copy 1 sample. u_blitter does the right thing. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/u_blitter: do GL-compliant integer resolvesMarek Olšák2016-05-311-19/+7
| | | | | | | The GL spec has been clarified and the new rule says we should just copy 1 sample. Reviewed-by: Nicolai Hähnle <[email protected]>
* mesa: fix crash in driver_RenderTexture_is_safeMarek Olšák2016-05-311-1/+2
| | | | | | | | | This just fixed the crash with the apitrace in bug report. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95246 Cc: 11.1 11.2 12.0 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't flush TC at the end of IBs on DRM >= 3.2.0Marek Olšák2016-05-311-2/+3
| | | | | | It's not needed since it was fixed in the kernel. Reviewed-by: Alex Deucher <[email protected]>
* gallium/radeon: fixed division by zeroJakob Sinclair2016-05-311-0/+3
| | | | | | | | | | Coverity is getting a false positive that a division by zero can occur here. This change will silence the Coverity warnings as a division by zero cannot occur in this case. Signed-off-by: Jakob Sinclair <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* st/glsl_to_tgsi: prevent infinite loopEric Engestrom2016-05-311-2/+3
| | | | | | | | `unsigned j` would never fail `j >= 0`, leading to an infinite loop as `j--` wraps around. Signed-off-by: Eric Engestrom <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* glsl/images: bounds check image unit assignmentDave Airlie2016-05-311-0/+2
| | | | | | | | | | | | | | | | | The CTS test: GL45-CTS.multi_bind.dispatch_bind_image_textures binds 192 image uniforms, we reject this later, but not until after we trash the contents of the struct gl_shader. Error now reads: Too many compute shader image uniforms (192 > 16) instead of Too many compute shader image uniforms (2745344416 > 16) Reviewed-by: Ilia Mirkin <[email protected]> Cc: "12.0" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* nvc0/ir: fix spilling predicates to registersIlia Mirkin2016-05-301-0/+4
| | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Cc: "11.1 11.2 12.0" <[email protected]>
* nvc0/ir: limit max number of regs based on availability in SMIlia Mirkin2016-05-302-2/+4
| | | | | | | | | This effectively limits registers to 32 and 64 for fermi and kepler when 1024 threads are used, but allows the full amount to be used with smaller thread sizes. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* nv50/ir: record number of threads in a compute shaderIlia Mirkin2016-05-305-2/+10
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* nv50/ir: Add missing handling of U64/S64 in inlinesPierre Moreau2016-05-301-1/+3
| | | | | Signed-off-by: Pierre Moreau <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* docs: rename release notes to 12.0.0Emil Velikov2016-05-301-4/+4
| | | | | Signed-off-by: Emil Velikov <[email protected]> (cherry picked from commit 7ad2cb6f08bf318219ceb02d297f794db9221efa)
* docs: move nvc0 out of individual lines of GL 4.2, 4.3, ES 3.1Ilia Mirkin2016-05-301-32/+32
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* docs: add 12.1.0-devel release notes template, bump versionEmil Velikov2016-05-302-1/+61
| | | | Signed-off-by: Emil Velikov <[email protected]>
* docs/GL3: mark radeonsi as all done up to GL 4.3 and GLES 3.1Marek Olšák2016-05-301-31/+31
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* nir: add the SConscript.nir to the tarballEmil Velikov2016-05-301-1/+2
| | | | Signed-off-by: Emil Velikov <[email protected]>
* vc4: Fix doxygen warnings12.0-branchpointRhys Kidd2016-05-302-6/+6
| | | | | | | | Now that vc4 automated code documentation can be generated with doxygen, fix the warnings issued by Doxygen 1.8.11. Signed-off-by: Rhys Kidd <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* doxygen: Plumb through gallium/ to automated documentationRhys Kidd2016-05-301-1/+2
| | | | | | | | | | | | | | | | Add Gallium and the Gallium-based drivers to doxygen's automated code documentation infrastructure. Can be individually created with: cd $MESA_TOP_LEVEL/ make -C doxygen/ gallium.tag Benefits from the existing doxygen Makefile runners to clean up afterwards with 'make clean'. Signed-off-by: Rhys Kidd <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* Revert "osmesa: don't try to bundle osmesa.def SConscript"Emil Velikov2016-05-301-0/+2
| | | | | | | This reverts commit c07df0f2014636b601cdbaff63214296599b1ad5. Now that the SCons build is back we need to include the files in the tarball.
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