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* freedreno/a3xx: missing u_upload_destroyRob Clark2014-11-141-0/+2
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix borked check for a320.0Rob Clark2014-11-141-1/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: half vs full reg in standalone compiler outputRob Clark2014-11-141-6/+10
| | | | | | Handle hrN.c in printing outputs/inputs. Signed-off-by: Rob Clark <[email protected]>
* st/dri: Support EGL_CONTEXT_OPENGL_DEBUG_BIT_KHR/GLX_CONTEXT_DEBUG_BIT_ARB ↵José Fonseca2014-11-142-11/+9
| | | | | | | | | | | | | on ES contexts. The latest version of the specs explicitly allow it, and given that Mesa universally supports KHR_debug we should definitely support it. Totally untested. (Just happened to noticed this while implementing GLX_EXT_create_context_es2_profile for st/xlib.) Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* egl: remove egl_gallium from the loaderMarek Olšák2014-11-141-14/+0
| | | | | | Acked-by: Kristian Høgsberg <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Informally acked-by: Jose Fonseca
* configure.ac: remove enable flags for EGL and GBM Gallium state trackersMarek Olšák2014-11-143-85/+4
| | | | | | Acked-by: Kristian Høgsberg <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Informally acked-by: Jose Fonseca
* i965/vec4: Combine all the math emitters.Kenneth Graunke2014-11-132-104/+17
| | | | | | | | | | | 17 insertions(+), 102 deletions(-). Works just as well. v2: Make emit_math take const references (suggested by Matt), drop redundant WRITEMASK_XYZW setting (Matt and Curro). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* i965/vec4: Use const references in emit() functions.Kenneth Graunke2014-11-132-15/+14
| | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* i965: Use macros to create prototypes for emitter helpers.Kenneth Graunke2014-11-131-57/+41
| | | | | | | | We do this almost everywhere else; this should make it easier to modify. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* i965: Always enable VF statisticsBen Widawsky2014-11-131-2/+1
| | | | | | | | | | | | | | | Every other unit in the geometry pipeline automatically enables statistics gathering. This part of the pipe has been controlled by the DEBUG_STATS variable, but this is asymmetric. This dates back to the original implementation, and I am not sure if there is a reason for it. I need access to these stats to implement ARB_pipeline_statistics_query. Eric wrote it, and Ken touched it last. Do you have any opposition? Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86145 Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Ben Widawsky <[email protected]>
* i915: Emit 3DSTATE_SCISSOR_RECTANGLE_0 before 3DSTATE_SCISSOR_ENABLEVille Syrjälä2014-11-136-17/+17
| | | | | | | | | | | | | | | According to gen2 BSpec the pipeline must be flushed at least up to the windower before changing the scissor rect enable field. Emitting the 3DSTATE_SCISSOR_RECTANGLE_0 before 3DSTATE_SCISSOR_ENABLE is sufficient to do that. gen3 BSpec no longer has that piece of text, but let's make the same change there too for symmetry. The spec does still say that the scissor rectangle must be defined before enabling it, so the new order does seem more in line with the spec. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]>
* i915: Don't call _mesa_meta_glsl_Clear() on gen2Ville Syrjälä2014-11-131-1/+1
| | | | | | | | | | | | | | | | | Gen2 doesn't have fragment shaders so we shouldn't be calling _mesa_meta_glsl_Clear() on gen2. Restore the appropriate ARB_fragment_shader check to the clear path which was lost in: commit 94f22fbe787214580a1a13a774114d2650c166cb Author: Tapani Pälli <[email protected]> Date: Wed Aug 8 20:46:45 2012 +0300 intel: use _mesa_meta_Clear with OpenGL ES 1.1 v2 v2: Fix spelling in commit message Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]>
* i915: Protect macro argument for TEXTURE_SET()Ville Syrjälä2014-11-131-1/+1
| | | | | | | | | | TEXTURE_SET() is the only register macro that forgets to wrap the argument evaluation in parens. Only simple integers are passed to this macro so there's no bug but sitll it seems prudent to add the parens. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]>
* i915: Kill intel_context::hw_stencilVille Syrjälä2014-11-132-2/+0
| | | | | | | ctx.hw_stencil is not used anywhere so kill it. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]>
* i915: Accept GL_DEPTH_STENCIL GL_DEPTH_COMPONENT formats for renderbuffersVille Syrjälä2014-11-131-0/+9
| | | | | | | | | | | | | | | | | | Gen2 doesn't support depth/stencil textures, and since commit c1d4d4999303f9167b20f4e0674b9436e6295cf7 Author: Ville Syrjälä <[email protected]> Date: Thu Apr 24 14:11:43 2014 +0300 i915: Don't advertise Z formats in TextureFormatSupported on gen2 depth/stencil formats are no longer accepted as texture formats. However we still want depth/stencil renderbuffers, so add explicit format checks to intel_alloc_renderbuffer_storage() to allow such things. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]>
* i915: Override mip filter to nearest with anisoVille Syrjälä2014-11-131-0/+2
| | | | | | | | | | gen2 doesn't supporte linear mip filter with anisotropic min/mag filtering. The hardware would automagically downgrade the min/mag filters to linear in such cases, which IMO looks worse than forcing the mip filter to nearest. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]>
* i915: Use L8A8 instead of I8 to simulate A8 on gen2Ville Syrjälä2014-11-133-3/+5
| | | | | | | | | | | | | | | | Gen2 doesn't support the A8 texture format. Currently the driver substitutes it with I8, but that results in incorrect RGB values. Use A8L8 instead. We end up wasting a bit of memory, but at least we should get the correct results. v2: Handle the fallback in _mesa_choose_tex_format() and also do it for all alpha formats that currently accept A8 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72819 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80050 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=38873 Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]>
* i915: Fix GL_DOT3_RGBA a bitVille Syrjälä2014-11-131-2/+3
| | | | | | | | | | | | | The spec says using DOT4 for alpha is undefined unless DOT4 is also used for color. It seems to do the right thing anyway, but better safe than sorry. Also override numAlphaArgs to 2 for DOT4 since that's what it wants. This migth fix something in case the specified alpha mode has only one argument. Also avoids emitting a needless 3DSTATE_MAP_BLEND_ARG if the specified alpha mode has three arguments. Reviewed-by: Ian Romanick <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]>
* linker: Add a missing space in an error messageNeil Roberts2014-11-131-1/+1
| | | | Reviewed-by: Brian Paul <[email protected]>
* llvmpipe: Call pipe_thread_wait() on Linux.José Fonseca2014-11-131-0/+6
| | | | | | | To address http://lists.freedesktop.org/archives/mesa-dev/2014-November/070569.html In short, revert 706ad3b649e6a75fdac9dc9acc3caa9e6067b853 for non-Windows OSes.
* i915g: we also have more than 0 viewports!Kenneth Graunke2014-11-121-0/+3
| | | | | | | | | See 546d6c8d for the corresponding fix in freedreno. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Stephane Marchesin <[email protected]> Cc: "10.3" <[email protected]>
* vc4: Avoid reusing a pointer from c->outputs[] after add_output().Eric Anholt2014-11-121-5/+6
| | | | add_output() can resize the qreg array, so we might use a stale pointer.
* vc4: Fix assumption of TGSI OUT[0] being POSITION in the VS.Eric Anholt2014-11-121-5/+5
| | | | | | | | All the shaders we've received so far had this be the case, but with nir-to-tgsi that changed. I might decide to make nir-to-tgsi keep the outputs in the same order, for debugging sanity, but I'm not sure.
* nvc0: remove unused mm_VRAM_fe0Ilia Mirkin2014-11-122-9/+0
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* st/glx: Implement GLX_EXT_create_context_es2_profile.José Fonseca2014-11-122-37/+54
| | | | | | | | apitrace now supports it, and it makes it much easier to test tracing/replaying on OpenGL ES contexts since GLX_EXT_create_context_{es2,es}_profile are widely available. Reviewed-by: Brian Paul <[email protected]>
* Revert "clover: Fix build after llvm r221375"Tom Stellard2014-11-121-4/+0
| | | | | | This reverts commit cd93d82ba9ec8cd8e4f54bbee16d7b47c542de71. llvm r221375 was reverted, so this commit needs to be too.
* gallivm: Fix build with LLVM 3.6 (r221751).José Fonseca2014-11-121-1/+10
| | | | | | Tested with LLVM 3.3, 3.4, 3.5, and 3.6. Trivial.
* i965/cfg: Remove if_block/else_block.Matt Turner2014-11-113-30/+1
| | | | | | | | I used these in the SEL peephole, but they require extra tracking and fix ups. The SEL peephole can pretty easily find the blocks it needs without these. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Don't use if_block/else_block in SEL peephole.Matt Turner2014-11-111-6/+11
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* ilo: clean up gen6_3DSTATE_SF()Chia-I Wu2014-11-113-90/+105
| | | | | | | | | | | Make the helpers fill out valid Gen7 3DSTATE_SF and 3STATE_SBE. This prevents the helpers from having to do dw[0] = GEN7_SBE_DW1_x; // setting DW1 value to dw[0]!? and simplifies gen7_3DSTATE_{SF,SBE}(). Signed-off-by: Chia-I Wu <[email protected]>
* ilo: clean up gen7_3DSTATE_STREAMOUT()Chia-I Wu2014-11-112-45/+35
| | | | | | | Render stream and render enable are independent from so enable. Having a single return point makes it easier to see that. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: rework gen7_3DSTATE_SO_DECL_LIST()Chia-I Wu2014-11-111-60/+66
| | | | | | | Started to make pipe_stream_output_info mandatory, but ended up adding support for stream id and making a workaround Gen7-specific. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: add 3DSTATE_SO_BUFFER variantsChia-I Wu2014-11-112-24/+25
| | | | | | Add gen7_disable_3DSTATE_SO_BUFFER() to disable SO buffers. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: add gen6_3dstate_constant()Chia-I Wu2014-11-112-84/+67
| | | | | | | It replaces gen6_fill_3dstate_constant(). gen6_3DSTATE_CONSTANT_{VS,GS,PS} are made wrappers of the new function. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: add variants of 3DSTATE_{HS,DS}Chia-I Wu2014-11-112-12/+6
| | | | | | Rename them to gen7_disable_3DSTATE_{HS,DS}() to reflect the fact. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: add variants of 3DSTATE_GSChia-I Wu2014-11-113-63/+100
| | | | | | | Add gen6_so_3DSTATE_GS(), gen6_disable_3DSTATE_GS(), and gen7_disable_3DSTATE_GS() to do SO on GEN6 or to disable GS. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: add variants of 3DSTATE_VSChia-I Wu2014-11-113-16/+22
| | | | | | Add gen6_disable_3DSTATE_VS() to disable VS. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: add variants of 3DSTATE_PSChia-I Wu2014-11-112-36/+41
| | | | | | Add gen7_disable_3DSTATE_PS() to disable PS. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: add variants of 3DSTATE_WMChia-I Wu2014-11-113-54/+61
| | | | | | | Add gen6_hiz_3DSTATE_WM() and gen7_hiz_3DSTATE_WM() for HiZ ops without dispatching. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: add variants of 3DSTATE_CLIPChia-I Wu2014-11-113-24/+32
| | | | | | Add gen6_disable_3DSTATE_CLIP to disable clipping. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: prefix 3DSTATE_VF with gen75Chia-I Wu2014-11-112-4/+4
| | | | | | 3DSTATE_VF is Gen7.5+ only. Signed-off-by: Chia-I Wu <[email protected]>
* st/va: MPEG4 call vlVaDecoderFixMPEG4Startcode()Michael Varga2014-11-101-0/+7
| | | | | | If the VOP and GOV headers were truncated they will be regenerated. Signed-off-by: Michael Varga <[email protected]>
* st/va: MPEG4 generate GOV and VOP headerMichael Varga2014-11-101-0/+92
| | | | | | Also, Implemented a small locally used interface for writing bits to a buffer. Signed-off-by: Michael Varga <[email protected]>
* st/va: MPEG4 populate the SPS structureMichael Varga2014-11-101-0/+6
| | | | Signed-off-by: Michael Varga <[email protected]>
* st/va: MPEG4 populate the iq matrix buffersMichael Varga2014-11-101-0/+16
| | | | Signed-off-by: Michael Varga <[email protected]>
* st/va: MPEG4 populate the PPS structureMichael Varga2014-11-102-0/+81
| | | | Signed-off-by: Michael Varga <[email protected]>
* st/va: refactored handleVASliceDataBufferTypeMichael Varga2014-11-101-35/+40
| | | | | | | This patch cleans the function handleVASliceDataBufferType() for better readability. Signed-off-by: Michael Varga <[email protected]>
* mesa: Remove _mesa_max_buffer_indexIan Romanick2014-11-102-52/+0
| | | | | | | It appears to be completely unused since f9be8543 (February 2012). Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Uniform logging is very, very unlikelyIan Romanick2014-11-101-2/+2
| | | | | | Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* glsl: Swap the order of glsl_type::name and ::lengthIan Romanick2014-11-102-8/+8
| | | | | | | | | | | | On x86-64 this saves 8 bytes of padding in the structure, and this reduces the size of the structure to 32 bytes. v2: Fix constructor so that GCC won't warn about the order of initialization. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
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