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* mesa: log shaders, GLSL info log with _mesa_log()Brian Paul2015-04-151-14/+11
| | | | | | | Now, if we set MESA_LOG_FILE and MESA_GLSL=dump, all the shader info will get logged to the named file instead of stderr. Reviewed-by: José Fonseca <[email protected]>
* mesa: add _mesa_log(), _mesa_get_log_file() functionsBrian Paul2015-04-152-7/+43
| | | | | | | | | | _mesa_log() simply writes log information to stderr or MESA_LOG_FILE. _mesa_get_log_file() returns the file handle to use for logging. This will be used for shader dumping/logging instead of always printing to stderr. Reviewed-by: José Fonseca <[email protected]>
* tgsi: also dump label for TGSI_OPCODE_BGNSUB opcodeBrian Paul2015-04-151-0/+1
| | | | | | So we can see the label associated with subroutines. Reviewed-by: José Fonseca <[email protected]>
* st/wgl: Couple of fixes to opengl32.dll's wglCreateContext/wglDeleteContext ↵Jose Fonseca2015-04-153-9/+66
| | | | | | | | | | | | | | | dispatch. - Use GetModuleHandle instead of LoadLibrary to avoid incrementing the opengl32.dll reference count (otherwise the opengl32.dll will linger in memory forever.) - Ensure we use our fake wglCreateContext/wglDeleteContext when using Mesa as a drop-in replacement for opengl32.dll Untested. Just noticed by accident. Reviewed-by: Brian Paul <[email protected]>
* mesa: Enable _mesa_dlopen on MSVC too.Jose Fonseca2015-04-151-3/+3
| | | | | | As pointed out by Shervin Sharifi. Reviewed-by: Brian Paul <[email protected]>
* glsl: fix assignment of multiple scalar and vecs to matrices.Samuel Iglesias Gonsalvez2015-04-151-61/+49
| | | | | | | | | | | | | | | | | When a vec has more elements than row components in a matrix, the code could end up failing an assert inside assign_to_matrix_column(). This patch makes sure that when there is still room in the matrix for more elements (but in other columns of the matrix), the data is actually assigned. This patch fixes the following dEQP test: dEQP-GLES3.functional.shaders.conversions.matrix_combine.float_bvec4_ivec2_bool_to_mat4x2_vertex dEQP-GLES3.functional.shaders.conversions.matrix_combine.float_bvec4_ivec2_bool_to_mat4x2_fragment Signed-off-by: Samuel Iglesias Gonsalvez <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* nir: Fix typo in "ushr by 0" algebraic replacementIan Romanick2015-04-141-1/+1
| | | | | | | | Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Cc: "10.5" <[email protected]>
* nir: Silence unused parameter warningsIan Romanick2015-04-142-1/+3
| | | | | | | | | | | | | | | | | | | nir/nir.h: In function 'nir_validate_shader': nir/nir.h:1567:56: warning: unused parameter 'shader' [-Wunused-parameter] static inline void nir_validate_shader(nir_shader *shader) { } ^ nir/nir_opt_cse.c: In function 'src_is_ssa': nir/nir_opt_cse.c:165:32: warning: unused parameter 'data' [-Wunused-parameter] src_is_ssa(nir_src *src, void *data) ^ nir/nir_opt_cse.c: In function 'dest_is_ssa': nir/nir_opt_cse.c:171:35: warning: unused parameter 'data' [-Wunused-parameter] dest_is_ssa(nir_dest *dest, void *data) ^ Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* nir/cse: fix bug with comparing non-per-component sourcesConnor Abbott2015-04-141-10/+7
| | | | | | | | | | | | We weren't comparing the right number of components when checking swizzles. Use nir_ssa_alu_instr_num_src_components() to do the right thing. No piglit regressions, and no fixes either. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Connor Abbott <[email protected]>
* i965/fs: Combine tex/fb_write operations (opt)Ben Widawsky2015-04-143-0/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Certain platforms support the ability to sample from a texture, and write it out to the file RT - thus saving a costly send instructions (note that this is a potnential win if one wanted to backport to a tag that didn't have the patch from Topi which removed excess MOVs from LOAD_PAYLOAD - 97caf5fa04dbd2), v2: Modify the algorithm. Instead of iterating in reverse through blocks and insts, since the last block/inst is the only thing which can benefit. Rebased on top of Ken's patching modifying is_last_send v3: Rebased over almost 2 months, and Incorporated feedback from Matt: Some comment typo fixes and rewordings. Whitespace Move the optimization pass outside of the optimize loop v4: Some cosmetic changes requested from Ken. These changes ensured that the optimization function always returned true when an optimization occurred, and false when one did not. This behavior did not exist with the original patch. As a result, having the separate helper function which Matt did not like no longer made sense, and so now I believe everyone should be happy. Benchmark (n=20) %diff *OglBatch5 -1.4 *OglBatch7 -1.79 OglFillTexMulti 5.57 OglFillTexSingle 1.16 OglShMapPcf 0.05 OglTexFilterAniso 3.01 OglTexFilterTri 1.94 No piglit regressions: (http://otc-gfxtest-01.jf.intel.com:8080/view/dev/job/bwidawsk/112/) [*] I believe my measurements are incorrect for Batch5-7. If I add this new optimization, but never emit the new instruction I see similar results. v5: Remove declaration of combine_tex_header since v4 dropped that function (Ben) Remove check for impossible case of an empty block (Matt) Set dest earlier to avoid extra special-casing in generate_tex (Matt) Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Only emit FS_OPCODE_PLACEHOLDER_HALT if there are discardsBen Widawsky2015-04-141-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based originally on a patch from Ken in May 2014 of the same title. Things changed enough that I didn't feel comfortable leaving his authorship. v2: Replace fp->UsesKill with wm_prog_data->uses_kill. Since Ken took the time to also explain the difference to me, here is his explanation for posterity: "fp->UsesKill indicates that a ARB_fragment_program shader uses the KIL instruction, or that a GLSL shader uses the "discard" insntruction (which are analogous). On Gen4-5, we sometimes have to simulate OpenGL's "Alpha Test" feature by emitting shader code that implicitly does a "discard" instruction. In the key setup, we do: /* key->alpha_test_func means simulating alpha testing via discards, * so the shader definitely kills pixels. */ prog_data.uses_kill = fp->program.UsesKill || key->alpha_test_func; Even though the shader may not technically contain a "discard", we need to act as if it does. I've also been trying to move the i965 state setup code to use brw_wm_prog_key for everything, rather than poking at core Mesa's gl_program/gl_fragment_program/gl_shader/gl_shader_program structures. --Ken" Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Create a has_side_effects for fs_instBen Widawsky2015-04-142-0/+7
| | | | | | | | | | | | | | | | | | | When an instruction has a side effect, it impacts the available options when reordering an instruction. As the EOT flag is an implied write to the render target in the FS, it can be considered a side effect. This patch shouldn't actually have any impact on the current code since the EOT flag implies that the opcode is already one with side effects, FS_OPCODE_FB_WRITE. The next patch however will introduce an optimization whereby the EOT flag can occur with an opcode SHADER_OPCODE_TEX, and as that instruction will perform the same implied write to the render target, it cannot be reordered. v2: Remove extra whitespace (Matt) Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: replace __FUNCTION__ with __func__Marius Predut2015-04-1424-72/+72
| | | | | | | | Consistently just use C99's __func__ everywhere. No functional changes. Acked-by: Matt Turner <[email protected]> Signed-off-by: Marius Predut <[email protected]>
* i915: replace __FUNCTION__ with __func__Marius Predut2015-04-1424-107/+107
| | | | | | | | Consistently just use C99's __func__ everywhere. No functional changes. Acked-by: Matt Turner <[email protected]> Signed-off-by: Marius Predut <[email protected]>
* glx: replace __FUNCTION__ with __func__Marius Predut2015-04-141-2/+2
| | | | | | | | Consistently just use C99's __func__ everywhere. No functional changes. Acked-by: Matt Turner <[email protected]> Signed-off-by: Marius Predut <[email protected]>
* main: replace __FUNCTION__ with __func__Marius Predut2015-04-146-10/+10
| | | | | | | | | | | Consistently just use C99's __func__ everywhere. The patch was verified with Microsoft Visual studio 2013 redistributable package(RTM version number: 18.0.21005.1) Next MSVC versions intends to support __func__. No functional changes. Acked-by: Matt Turner <[email protected]> Signed-off-by: Marius Predut <[email protected]>
* state_tracker: replace __FUNCTION__ with __func__Marius Predut2015-04-148-18/+18
| | | | | | | | | | | Consistently just use C99's __func__ everywhere. The patch was verified with Microsoft Visual studio 2013 redistributable package(RTM version number: 18.0.21005.1) Next MSVC versions intends to support __func__. No functional changes. Acked-by: Matt Turner <[email protected]> Signed-off-by: Marius Predut <[email protected]>
* swrast: replace __FUNCTION__ with __func__Marius Predut2015-04-145-7/+7
| | | | | | | | | | | Consistently just use C99's __func__ everywhere. The patch was verified with Microsoft Visual studio 2013 redistributable package(RTM version number: 18.0.21005.1) Next MSVC versions intends to support __func__. No functional changes. Acked-by: Matt Turner <[email protected]> Signed-off-by: Marius Predut <[email protected]>
* vbo: replace __FUNCTION__ with __func__Marius Predut2015-04-144-5/+5
| | | | | | | | | | | | Consistently just use C99's __func__ everywhere. The patch was verified with Microsoft Visual studio 2013 redistributable package(RTM version number: 18.0.21005.1) Next MSVC versions intends to support __func__. No functional changes. Acked-by: Matt Turner <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Signed-off-by: Marius Predut <[email protected]>
* tnl: replace __FUNCTION__ with __func__Marius Predut2015-04-148-40/+40
| | | | | | | | | | | | Consistently just use C99's __func__ everywhere. The patch was verified with Microsoft Visual studio 2013 redistributable package(RTM version number: 18.0.21005.1) Next MSVC versions intends to support __func__. No functional changes. Acked-by: Matt Turner <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Signed-off-by: Marius Predut <[email protected]>
* i965/fs: Correct mistake in determining whether a MUL is negated.Matt Turner2015-04-141-1/+1
| | | | | | | | | a * b is equivalent to -a * -b, and the previous code was failing at that. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89961 Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/skl: Use an exec size of 8 to initialise the message headerNeil Roberts2015-04-142-2/+2
| | | | | | | | | | | | | | | | | | Commit e93566a15c61c33faa changed the message header code needed to make Skylake use SIMD4x2 so that it uses a register with width 4 instead of 8 as the source register in the send message. However it also changed the width for the dest in the MOV instruction which is used to initialise the header register with the values from g0. The width of the destination is used to determine the exec size in brw_set_dest so this would end up making the MOV have an exec size of 4. I think this would end up leaving the top half of the register uninitialised. The top half of the header has meaningful values so this probably isn't a good idea. This patch just casts the dest register for the MOV instruction back to a vec8 to fix it. It doesn't cause any changes to a Piglit run. Reviewed-by: Ben Widawsky <[email protected]>
* i965/fs: Always invert predicate of SEL with swapped argumentsIan Romanick2015-04-141-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | Commit b616164 added an optimization of b2f generation of a comparison. It also included an extra optimization of one of the comparison values is a constant of zero. The trick was that some value was known to be zero, so that value could be used in the SEL instruction instead of potentially loading 0.0 into a register. This change switched the order of the arguments to the SEL, and, for some unknown reason, I thought that the predicate should therefore only be inverted for the == case. Clearly, it should always be inverted. Fixes piglit fs-notEqual-of-expression.shader_test and fs-equal-of-expression.shader_test. v2: Don't do the "register already has zero" optimization for the '== 0' case. In that case, the register does not have zero when we want to produce a zero result. Signed-off-by: Ian Romanick <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89722 Reviewed-by: Kenneth Graunke <[email protected]> [v1] Tested-by: Lu Hua <[email protected]>
* radeon/llvm: Improve codegen for KILL_IFTom Stellard2015-04-141-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than emitting one kill instruction per component of KILL_IF's src reg, we now or the components of the src register together and use the result as a condition for just one kill instruction. shader-db stats (bonaire): 979 shaders Totals: SGPRS: 34872 -> 34848 (-0.07 %) VGPRS: 20696 -> 20676 (-0.10 %) Code Size: 749032 -> 748452 (-0.08 %) bytes LDS: 11 -> 11 (0.00 %) blocks Scratch: 12288 -> 12288 (0.00 %) bytes per wave Totals from affected shaders: SGPRS: 1184 -> 1160 (-2.03 %) VGPRS: 600 -> 580 (-3.33 %) Code Size: 13200 -> 12620 (-4.39 %) bytes LDS: 0 -> 0 (0.00 %) blocks Scratch: 0 -> 0 (0.00 %) bytes per wave Increases: SGPRS: 2 (0.00 %) VGPRS: 0 (0.00 %) Code Size: 0 (0.00 %) LDS: 0 (0.00 %) Scratch: 0 (0.00 %) Decreases: SGPRS: 5 (0.01 %) VGPRS: 5 (0.01 %) Code Size: 25 (0.03 %) LDS: 0 (0.00 %) Scratch: 0 (0.00 %) *** BY PERCENTAGE *** Max Increase: SGPRS: 32 -> 40 (25.00 %) VGPRS: 0 -> 0 (0.00 %) Code Size: 0 -> 0 (0.00 %) bytes LDS: 0 -> 0 (0.00 %) blocks Scratch: 0 -> 0 (0.00 %) bytes per wave Max Decrease: SGPRS: 32 -> 24 (-25.00 %) VGPRS: 16 -> 12 (-25.00 %) Code Size: 116 -> 96 (-17.24 %) bytes LDS: 0 -> 0 (0.00 %) blocks Scratch: 0 -> 0 (0.00 %) bytes per wave *** BY UNIT *** Max Increase: SGPRS: 64 -> 72 (12.50 %) VGPRS: 0 -> 0 (0.00 %) Code Size: 0 -> 0 (0.00 %) bytes LDS: 0 -> 0 (0.00 %) blocks Scratch: 0 -> 0 (0.00 %) bytes per wave Max Decrease: SGPRS: 32 -> 24 (-25.00 %) VGPRS: 16 -> 12 (-25.00 %) Code Size: 424 -> 356 (-16.04 %) bytes LDS: 0 -> 0 (0.00 %) blocks Scratch: 0 -> 0 (0.00 %) bytes per wave Reviewed-by: Marek Olšák <[email protected]>
* radeon/llvm: Run LLVM's instruction combining passTom Stellard2015-04-141-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This should improve code quality in general and will help with some future changes to how we emit kill instructions. shader-db shows a few regressions, but these don't seem to be the result of deficiencies in instcombine. They're mostly caused by the scheduler making different decisions than before. shader-db stats (bonaire): 979 shaders Totals: SGPRS: 35056 -> 34872 (-0.52 %) VGPRS: 20624 -> 20696 (0.35 %) Code Size: 764372 -> 749032 (-2.01 %) bytes LDS: 11 -> 11 (0.00 %) blocks Scratch: 12288 -> 12288 (0.00 %) bytes per wave Totals from affected shaders: SGPRS: 13264 -> 13072 (-1.45 %) VGPRS: 8248 -> 8316 (0.82 %) Code Size: 486320 -> 470992 (-3.15 %) bytes LDS: 11 -> 11 (0.00 %) blocks Scratch: 11264 -> 11264 (0.00 %) bytes per wave Increases: SGPRS: 6 (0.01 %) VGPRS: 20 (0.02 %) Code Size: 14 (0.01 %) LDS: 0 (0.00 %) Scratch: 0 (0.00 %) Decreases: SGPRS: 32 (0.03 %) VGPRS: 8 (0.01 %) Code Size: 244 (0.25 %) LDS: 0 (0.00 %) Scratch: 0 (0.00 %) *** BY PERCENTAGE *** Max Increase: SGPRS: 32 -> 48 (50.00 %) VGPRS: 12 -> 20 (66.67 %) Code Size: 216 -> 224 (3.70 %) bytes LDS: 0 -> 0 (0.00 %) blocks Scratch: 0 -> 0 (0.00 %) bytes per wave Max Decrease: SGPRS: 40 -> 32 (-20.00 %) VGPRS: 16 -> 12 (-25.00 %) Code Size: 368 -> 280 (-23.91 %) bytes LDS: 0 -> 0 (0.00 %) blocks Scratch: 0 -> 0 (0.00 %) bytes per wave *** BY UNIT *** Max Increase: SGPRS: 32 -> 48 (50.00 %) VGPRS: 28 -> 36 (28.57 %) Code Size: 39320 -> 40132 (2.07 %) bytes LDS: 0 -> 0 (0.00 %) blocks Scratch: 0 -> 0 (0.00 %) bytes per wave Max Decrease: SGPRS: 72 -> 64 (-11.11 %) VGPRS: 48 -> 40 (-16.67 %) Code Size: 6272 -> 5852 (-6.70 %) bytes LDS: 0 -> 0 (0.00 %) blocks Scratch: 0 -> 0 (0.00 %) bytes per wave Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Add header and footer to shader stat dumpTom Stellard2015-04-141-2/+4
| | | | | | This makes it easier to parse. Reviewed-by: Marek Olšák <[email protected]>
* i965: Fix software primitive restart with indirect draws.Kenneth Graunke2015-04-141-2/+4
| | | | | | | | | | | | | | | | | new_prim was declared as a stack variable within a nested scope; we tried to retain a pointer to that data beyond the scope, which is bogus. GCC with -O1 eliminated most of the code that set new_prim's fields. Move the declaration to fix the bug. v2: Also fix new_ib (thanks to Matt Turner and Ben Widawsky). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81025 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Ben Widawsky <[email protected]> Cc: [email protected]
* i965: Implement proper workaround for Gen4 GPU CONSTANT_BUFFER hangs.Kenneth Graunke2015-04-141-13/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | I finally managed to dig up some information on our mysterious GPU hangs. A wiki page from the Crestline validation team mentions that they found a GPU hang in "Serious Sam 2" (on Windows) with remarkably similar conditions to the ones we've seen in Google Chrome and glmark2. Apparently, if WM_STATE has "PS Use Source Depth" enabled, CC_STATE has most depth state disabled, and you issue a CONSTANT_BUFFER command and immediately draw, the depth interpolator makes a small mistake that leads to hangs. Most of the traces I looked at contained a CONSTANT_BUFFER packet immediately followed by 3DPRIMITIVE, or at least very few packets. It appears they also have "PS Use Source Depth" enabled - either at the hang, or a little before it. So I think this is our bug. The workaround is to emit a non-pipelined state packet after issuing a CONSTANT_BUFFER packet. This is really similar to the workaround I developed in commit c4fd0c9052dd391d6f2e9bb8e6da209dfc7ef35b. v2: Fix word-wrapping issues. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Fix INTEL_DEBUG=shader_time for SIMD8 VS.Kenneth Graunke2015-04-141-0/+3
| | | | | | | | | In commit 4ebeb71573ad44f7657810dc5dd2c9030e3e63db, I deleted the emit_shader_time_end() call in emit_urb_writes(). But I failed to add it to run_vs(), as I intended. So no data was recorded at all. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* vc4: Add a blitter path using just the render thread.Eric Anholt2015-04-131-0/+127
| | | | | This accelerates the path for generating the shadow tiled texture when asked to sample from a raster texture (typical in glamor).
* vc4: Allow submitting jobs with no bin CL in validation.Eric Anholt2015-04-134-11/+19
| | | | | | For blitting, we want to fire off an RCL-only job. This takes a bit of tweaking in our validation and the simulator support (and corresponding new code in the kernel).
* vc4: Move the blit code to a separate file.Eric Anholt2015-04-134-64/+92
| | | | | There will be other blit code showing up, and it seems like the place you'd look.
* vc4: Separate out a bit of code for submitting jobs to the kernel.Eric Anholt2015-04-134-90/+139
| | | | | | I want to be able to have multiple jobs being set up at the same time (for example, a render job to do a little fixup blit in the course of doing a render to the main FBO).
* vc4: When asked to sample from a raster texture, make a shadow tiled copy.Eric Anholt2015-04-131-2/+9
| | | | | | | | | | | So, it turns out my simulator doesn't *quite* match the hardware. And the errata about raster textures tells you most of what's wrong, but there's still stuff wrong after that. Instead, if we're asked to sample from raster, we'll just blit it to a tiled temporary. Raster textures should only be screen scanout, and word is that it's faster to copy to tiled using the tiling engine first than to texture from an entire raster texture, anyway.
* vc4: Fix off-by-one in branch target validation.Eric Anholt2015-04-131-1/+1
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* vc4: Use NIR-level lowering for idiv.Eric Anholt2015-04-131-11/+1
| | | | This fixes the idiv tests in piglit.
* vc4: Add a bunch of type conversions.Eric Anholt2015-04-131-0/+12
| | | | | | These are required to get piglit's idiv tests working. The unsigned<->float conversions are wrong, but are good enough to get piglit's small ranges of values working.
* st/mesa: align cube map arrays layersDave Airlie2015-04-141-1/+1
| | | | | | | | | | | | | | | | | We create textures internally for texsubimage, and we use the values from sub image to create a new texture, however we don't align these to valid sizes, and cube map arrays must have an array size aligned to 6. This fixes texsubimage cube_map_array on CAYMAN at least, (it was causing GPU hang and bad values), it probably also fixes it on radeonsi and evergreen. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89957 Tested-by: Tom Stellard <[email protected]> Cc: [email protected] Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* st/mesa: convert sub image for cube map arrays to 2d arrays for uploadDave Airlie2015-04-141-0/+5
| | | | | | | | | | | | | | | Since we can subimage upload a number of cube map array layers, that aren't a complete cube map array, we should specify things as a 2D array and blit from that. Suggested by Ilia Mirkin as an alternate fix for texsubimage cube map array issues. seems to work just as well. Cc: [email protected] Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* i965: Flush batchbuffer containing the query on glQueryCounter.Mathias Froehlich2015-04-131-0/+2
| | | | | | | | | | | | | This change fixes a regression with timer queries introduced with commit 3eb6258. There the pending batchbuffer is flushed only if glEndQuery is executed. This present change adds such a flush to glQueryCounter which also schedules a value query just like glEndQuery does. The patch fixes GPU timer queries going mad from within osgviewer. Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Mathias Froehlich <[email protected]> Cc: [email protected]
* vc4: Use the blit interface for updating shadow textures.Eric Anholt2015-04-131-13/+31
| | | | | This lets us plug in a better blit implementation and have it impact the shadow update, too.
* vc4: Remove dead fields from vc4_surface.Eric Anholt2015-04-131-3/+0
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* vc4: Skip sending down the clear colors if not clearing.Eric Anholt2015-04-131-5/+7
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* vc4: Sync with kernel changes to relax BCL versus RCL validation.Eric Anholt2015-04-131-22/+3
| | | | There was no reason to tie the two packets' values together.
* vc4: Fix another space allocation mistake.Eric Anholt2015-04-131-0/+1
| | | | | | We're over-allocating our BCL in vc4_draw.c, so this never mattered. However, new RCL-only blit support might end up here without having set up any BCL contents.
* vc4: Add missed accounting for the size of the semaphore.Eric Anholt2015-04-131-0/+2
| | | | This wouldn't have mattered except in the worst case scenario RCL setup.
* swrast: Mark MAX_GLUINT literal with u suffix.Matt Turner2015-04-131-1/+1
| | | | | | | | Coverity is confused by the "float < int / 2" expression and suggests casting MAX_GLUINT to unsigned, which I believe it was supposed to have been already. Reviewed-by: Brian Paul <[email protected]>
* i965: Don't bother freeing NULL.Matt Turner2015-04-131-4/+2
| | | | | | | Commit e16c5c90 was replacing 'region' with 'mt', leaving this nonsensical code. Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Lift some restrictions on dma_buf EGLImagesChad Versace2015-04-133-22/+7
| | | | | | | | | | | | | | | | | | | | | Allow glEGLImageTargetRenderbufferStorageOES and glEGLImageTargetTexture2DOES for dma_buf EGLImages if the image is a single RGBA8 unorm plane. This is safe, despite fast color clears, because i965 disables allocation of auxiliary buffers for EGLImages. Chrome OS needs this, because its compositor uses dma_buf EGLImages for its scanout buffers. Testing: - Tested on Ivybridge Chromebook Pixel with WebGL Aquarium and YouTube. - No Piglit regressions on Broadwell with `piglit run -p gbm tests/quick.py`, with my Piglit patches that update the EGL_EXT_image_dma_buf_import tests. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Disable aux buffers for EGLImage-backed miptreesChad Versace2015-04-132-5/+19
| | | | | | | | | | | | | | | | | | | | EGL does not yet have extensions to manage the flushing and invalidating of driver-internal aux buffers. So we must disable aux buffers of dma_buf-backed EGLImages in order to safely render into them. This patch is obviously needed for renderbufers. It's also needed for textures because the user can attach the texture to a framebuffer and because the driver sometimes renders to textures for internal reasons. Testing: - Tested on Ivybridge Chromebook Pixel with WebGL Aquarium and YouTube. - No Piglit regressions on Broadwell with `piglit run -p gbm tests/quick.py`. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
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