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* i965/blorp: Prepare stencil sampling for gen8Topi Pohjolainen2016-04-212-3/+4
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/blorp: Add check for supported sample numbersTopi Pohjolainen2016-04-212-2/+17
| | | | | | | | v2 (Ken): Fix the condition on using meta for stencil blits: use_blorp -> !use_blorp Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/blorp: Add support for sampling 3D texturesTopi Pohjolainen2016-04-213-6/+23
| | | | | | | | | | | This patch adds additional MOV instruction for all blorp programs that use SHADER_OPCODE_TXF. Alternative is to augment blorp program key to tell if z-coordinate is needed, add condition to the blorp blit compiler and to produce a variant with and without the MOV. This seems a little overkill. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/blorp: Add support for source swizzleTopi Pohjolainen2016-04-215-9/+29
| | | | | | | | | | | | | In order to support cases where gen9 uses RGBA format to back client requested RGB, one needs to have means to force alpha channel to one when user requested RGB surface is used as blit source. v2 (Ken): Use helper for constructing the swizzle (this should be changed to use brw_get_texture_swizzle() as a follow-up). Also calculate the swizzle for CopyTexSubImage. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/blorp: Pipeline upload support for gen8Topi Pohjolainen2016-04-213-0/+699
| | | | | | | | v2 (Ken): Drop GEN8_RASTER_FRONT_WINDING_CCW in raster state Add emission of pma stall. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/gen8: Expose pma stall emissionTopi Pohjolainen2016-04-212-4/+8
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Allow texture surface state setup to be used by blorpTopi Pohjolainen2016-04-214-6/+12
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/blorp: Prepare sampling for gen9Topi Pohjolainen2016-04-211-2/+14
| | | | | | | | v2 (Ken): Added switch cases for gen8/9 in texel_fetch(). These were wrongly introduced in blit-enabling patch. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/blorp: Prepare render target write for gen8Topi Pohjolainen2016-04-215-8/+10
| | | | | | | | v2 (Ken): Use payload directly instead of retyping it into vec8. Drop the implied header, it isn't used for gen6+ anyway. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/blorp/gen6: Prepare vertex buffer setup logic for gen8Topi Pohjolainen2016-04-211-8/+22
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/blorp/gen7: Expose state setup applicable to gen8Topi Pohjolainen2016-04-212-11/+50
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/blorp: Use 8k chunk size for urb allocationTopi Pohjolainen2016-04-211-5/+14
| | | | | | | | | | | | | | | | Previously, we hardcoded "VS URB Starting Address" to 2 (in 8kB chunks), which meant VS URB data would start at an offset of 16kB. However, on Haswell GT3 and Gen8+, we allocate the first 32kB for the push constant region. This means that the PS push constant and VS URB data regions overlap, which can lead to corruption. v2 (Ken): Better description of the change, and do not change vs_size from 2 to 1. Cc: [email protected] Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/blorp/gen7: Prepare re-using for gen8Topi Pohjolainen2016-04-211-2/+4
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/blorp: Let compiler calculate the vertex buffer sizeTopi Pohjolainen2016-04-211-21/+10
| | | | | | | | | Currently the size is sizeof(float) times too large. One reserves GEN6_BLORP_VBO_SIZE many floats whereas GEN6_BLORP_VBO_SIZE stands for the size of vertex buffer in bytes. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/gen8: Expose state base address setupTopi Pohjolainen2016-04-212-2/+4
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/gen8: Expose surface state helpersTopi Pohjolainen2016-04-212-25/+41
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/gen9: Use correct size for DS_STATETopi Pohjolainen2016-04-211-4/+18
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: add forgotten textureOffset function for sampler2DArrayShadowRoland Scheidegger2016-04-211-0/+7
| | | | | | | | | | | | | | | | | | This was part of EXT_gpu_shader4 - as such it should have been supported by glsl 130. It was however forgotten, and not added until glsl 430 - with the wrong syntax no less (glsl 430 mentions it was overlooked). glsl 440 (but revision 8 only) fixed this finally for good. At least nvidia supports this with just version glsl version 1.30 as well (the spec doesn't explicitly say it should be supported retroactively), so just add this to the other glsl 130 textureOffset functions. Passes a (hacked) piglit tex-miplevel-selection test (2DArrayShadow textureOffset -auto) with llvmpipe. v2: fix up comment (by Ian), add testing to commit message. Reviewed-by: Dave Airlie <[email protected]>
* i965: Fix interpolateAtSample() on single sampled buffers.Kenneth Graunke2016-04-201-0/+15
| | | | | | | | | | Fixes dEQP-GLES31.functional.shaders.multisample_interpolation tests: - interpolate_at_sample.non_multisample_buffer.sample_n_default_framebuffer - interpolate_at_sample.non_multisample_buffer.sample_n_singlesample_rbo - interpolate_at_sample.non_multisample_buffer.sample_n_singlesample_texture Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Fix gl_SampleMaskIn[] in per-sample shading mode.Kenneth Graunke2016-04-203-2/+42
| | | | | | | | | | | | | | | | The coverage mask is not sufficient - in per-sample mode, we also need to AND with a mask representing the samples being processed by the current fragment shader invocation. Fixes 18 dEQP-GLES31.functional.shaders.sample_variables tests: sample_mask_in.bit_count_per_sample.multisample_{rbo,texture}_{1,2,4,8} sample_mask_in.bit_count_per_two_samples.multisample_{rbo,texture}_{4,8} sample_mask_in.bits_unique_per_sample.multisample_{rbo,texture}_{1,2,4,8} sample_mask_in.bits_unique_per_two_samples.multisample_{rbo,texture}_{4,8} Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Only enable oMask output when there's a multisample FBO.Kenneth Graunke2016-04-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARB_sample_shading specification says that setting gl_SampleMask bits to 0 means that the corresponding sample "should be considered uncovered for the purposes of multisample fragment operations (Section 4.1.3)." The OpenGL 4.4 specification, section 17.3.3 ("Multisample Fragment Operations") specifies: "No changes to the fragment alpha or coverage values are made at this step if MULTISAMPLE is disabled, or if the value of SAMPLE_BUFFERS is not one." oMask output alters coverage masks and can kill pixels. We need to disable it in the above case, which conveniently corresponds to key->multisample_fbo being false. Khronos bug #12188 also spells this out clearly: https://cvs.khronos.org/bugzilla/show_bug.cgi?id=12188 Fixes two Piglit tests: tests/spec/arb_sample_shading/builtin-gl-sample-mask-simple 0 tests/spec/arb_sample_shading/builtin-gl-sample-mask 0 Fixes 21 ES3 conformance tests: ES31-CTS.sample_variables.mask.rgba8.samples_0.mask_zero ES31-CTS.sample_variables.mask.rgba8.samples_0.mask_0 ES31-CTS.sample_variables.mask.rgba8.samples_0.mask_1 ES31-CTS.sample_variables.mask.rgba8.samples_0.mask_2 ES31-CTS.sample_variables.mask.rgba8.samples_0.mask_3 ES31-CTS.sample_variables.mask.rgba8.samples_0.mask_7 ES31-CTS.sample_variables.mask.rgba8i.samples_0.mask_zero ES31-CTS.sample_variables.mask.rgba8i.samples_0.mask_3 ES31-CTS.sample_variables.mask.rgba8i.samples_0.mask_4 ES31-CTS.sample_variables.mask.rgba8i.samples_0.mask_5 ES31-CTS.sample_variables.mask.rgba8i.samples_0.mask_7 ES31-CTS.sample_variables.mask.rgba8ui.samples_0.mask_zero ES31-CTS.sample_variables.mask.rgba8ui.samples_0.mask_2 ES31-CTS.sample_variables.mask.rgba8ui.samples_0.mask_3 ES31-CTS.sample_variables.mask.rgba8ui.samples_0.mask_4 ES31-CTS.sample_variables.mask.rgba8ui.samples_0.mask_6 ES31-CTS.sample_variables.mask.rgba32f.samples_0.mask_zero ES31-CTS.sample_variables.mask.rgba32f.samples_0.mask_0 ES31-CTS.sample_variables.mask.rgba32f.samples_0.mask_2 ES31-CTS.sample_variables.mask.rgba32f.samples_0.mask_5 ES31-CTS.sample_variables.mask.rgba32f.samples_0.mask_7 Fixes 9 dEQP-GLES31.functional.shaders.sample_variables tests: sample_mask.discard_half_per_pixel.default_framebuffer sample_mask.discard_half_per_pixel.singlesample_rbo sample_mask.discard_half_per_pixel.singlesample_texture sample_mask.discard_half_per_sample.default_framebuffer sample_mask.discard_half_per_sample.singlesample_rbo sample_mask.discard_half_per_sample.singlesample_texture sample_mask.discard_half_per_two_samples.default_framebuffer sample_mask.discard_half_per_two_samples.singlesample_rbo sample_mask.discard_half_per_two_samples.singlesample_texture Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Generalize wm_key->compute_sample_id to wm_key->multisample_fbo.Kenneth Graunke2016-04-204-8/+7
| | | | | | | | | | | | | | | | I'm going to need a key entry meaning "we have a multisample FBO, and multisampling is enabled" in an upcoming patch. This is basically wm_key->compute_sample_id, except that it also checks that the SAMPLE_ID system value is read. The only use of wm_key->compute_sample_id is in emit_sampleid_setup(), which is only called when handling the SAMPLE_ID system value. So we can just eliminate the check and generalize the field. v2: Also update the Vulkan driver. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Delete now dead persample_2x FS program key flag.Kenneth Graunke2016-04-203-8/+0
| | | | | | | | | | This was only used by the old gl_SampleID calculations. The new code doesn't need to handle 2x specially. v2: Delete it from the Vulkan driver, too. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Simplify gl_SampleID setup on Gen8+.Kenneth Graunke2016-04-201-5/+37
| | | | | | | | | | | | | | | | | | On Gen7+, the thread payload provides the sample ID - we can read it in two instructions, without any elaborate calculations. We don't even need a state dependency - this will properly produce zero in the non-MSAA case. Unfortunately, we need the state flag anyway, so we may as well continue to use it to produce a single MOV 0 instead of SHR/AND. For some reason, the sample ID field is always zero on Gen7/7.5, so we can't use this yet. However, it works fine on Gen8+. So, land the code and use it where it's working, and leave a TODO for later. v2: Fix register types in the comment (caught by Matt Turner!). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Flip key->compute_sample_id check.Kenneth Graunke2016-04-201-7/+7
| | | | | | | This just moves the simple case first. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* st/mesa: Use correct size for compute CAPs.Bas Nieuwenhuizen2016-04-211-2/+6
| | | | | | | | | | Some CAPs are stored as 64-bit value while Mesa stores the related constant as 32-bit value. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* i965: Properly handle integer types in opt_vector_float().Kenneth Graunke2016-04-201-4/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously, opt_vector_float() always interpreted MOV sources as floating point, and always created a MOV with a F-type destination. This meant that we could mess up sequences of integer loads, such as: mov vgrf6.0.x:D, 0D mov vgrf6.0.y:D, 1D mov vgrf6.0.z:D, 2D mov vgrf6.0.w:D, 3D Here, integer 0/1/2/3 become approximately 0.0f, so we generated: mov vgrf6.0:F, [0F, 0F, 0F, 0F] which is clearly wrong. We can properly handle this by converting integer values to float (rather than bitcasting), and emitting a type converting MOV: mov vgrf6.0:D, [0F, 1F, 2F, 3F] To do this, see first see if the integer values (converted to float) are representable. If so, we use a D-type MOV. If not, we then try the floating point values and an F-type MOV. We make zero not impose type restrictions. This is important because 0D would imply a D-type MOV, but is often used in sequences such as MOV 0D, MOV 0x3f800000D, where we want to use an F-type MOV. Fixes about 54 dEQP-GLES2 failures with the vec4 VS backend. This recently became visible due to changes in opt_vector_float() which made it optimize more cases, but it was a pre-existing bug. Apparently it also manages to turn more integer loads into VFs, producing the following shader-db statistics on Haswell: total instructions in shared programs: 7084195 -> 7082191 (-0.03%) instructions in affected programs: 246027 -> 244023 (-0.81%) helped: 1937 total cycles in shared programs: 65669642 -> 65651968 (-0.03%) cycles in affected programs: 531064 -> 513390 (-3.33%) helped: 1177 v2: Handle the type of zero better. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Make opt_vector_float() only handle non-type-conversion MOVs.Kenneth Graunke2016-04-201-2/+5
| | | | | | | | | | | | | | | | We don't handle this properly - we'd have to perform the type conversion before trying to convert the value to a VF. While we could do that, it doesn't seem particularly useful - most vector loads should be consistently typed (all float or all integer). As a special case, we do allow type-converting MOVs of integer 0, as it's represented the same regardless of the type. I believe this case does actually come up. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Fold vectorize_mov() back into the one caller.Kenneth Graunke2016-04-202-28/+16
| | | | | | | | | | After the previous patch, this helper is only called in one place. So, just fold it back in - there are a lot of parameters here and not much code. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Rework opt_vector_float() control flow.Kenneth Graunke2016-04-201-27/+34
| | | | | | | | | | | | | This reworks opt_vector_float() so that there's only one place that flushes out any accumulated state and emits a VF. v2: Don't break the sequence for non-representable numbers - just skip recording their values. Only break it for non-MOVs or register changes. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* anv: s/anv_batch_emit_blk/anv_batch_emit/Jason Ekstrand2016-04-2011-138/+133
| | | | Acked-by: Kristian Høgsberg <[email protected]>
* anv: Remove the old emit macroJason Ekstrand2016-04-201-10/+0
| | | | Acked-by: Kristian Høgsberg <[email protected]>
* anv/gen7_pipeline: Use the new emit macroJason Ekstrand2016-04-201-113/+124
| | | | Acked-by: Kristian Høgsberg <[email protected]>
* anv/gen7_cmd_buffer: Use the new emit macroJason Ekstrand2016-04-201-52/+70
| | | | Acked-by: Kristian Høgsberg <[email protected]>
* anv/device: Use the new emit macroJason Ekstrand2016-04-202-12/+13
| | | | Acked-by: Kristian Høgsberg <[email protected]>
* anv/state: Use the new emit macroJason Ekstrand2016-04-201-77/+78
| | | | Acked-by: Kristian Høgsberg <[email protected]>
* anv/gen8_pipeline: Use the new emit macroJason Ekstrand2016-04-201-177/+191
| | | | Acked-by: Kristian Høgsberg <[email protected]>
* anv/genX_pipeline: Use the new emit macroJason Ekstrand2016-04-202-38/+45
| | | | Acked-by: Kristian Høgsberg <[email protected]>
* anv/gen8_cmd_buffer: Use the new emit macroJason Ekstrand2016-04-201-74/+87
| | | | Acked-by: Kristian Høgsberg <[email protected]>
* anv/cmd_buffer: Use the new emit macro for quariesJason Ekstrand2016-04-201-24/+32
| | | | Acked-by: Kristian Høgsberg <[email protected]>
* anv/cmd_buffer: Use the new emit macro for DRAWING_RECTANGLEJason Ekstrand2016-04-201-9/+10
| | | | Acked-by: Kristian Høgsberg <[email protected]>
* anv/cmd_buffer: Use the new emit macro for compute shader dispatchJason Ekstrand2016-04-201-52/+64
| | | | Acked-by: Kristian Høgsberg <[email protected]>
* anv/cmd_buffer: Use the new emit macro for 3DSTATE_CONSTANTJason Ekstrand2016-04-201-10/+11
| | | | Acked-by: Kristian Høgsberg <[email protected]>
* anv/cmd_buffer: Use the new emit macro for DEPTH/STENCIL_BUFFERJason Ekstrand2016-04-201-34/+42
| | | | Acked-by: Kristian Høgsberg <[email protected]>
* anv/cmd_buffer: Use the new emit macro for PIPE_CONTROL and STATE_BASE_ADDRESSJason Ekstrand2016-04-201-62/+76
| | | | Acked-by: Kristian Høgsberg <[email protected]>
* anv/cmd_buffer: Use the new emit macro for 3DPRIMITIVE commandsJason Ekstrand2016-04-201-24/+28
| | | | Acked-by: Kristian Høgsberg <[email protected]>
* anv: Add a new block-based batch emit macroJason Ekstrand2016-04-201-0/+9
| | | | | | | | | This new macro uses a for loop to create an actual code block in which to place the macro setup code. One advantage of this is that you syntatically use braces instead of parentheses. Another is that the code in the block doesn't even get executed if anv_batch_emit_dwords fails. Acked-by: Kristian Høgsberg <[email protected]>
* gk110/ir: make use of IMUL32I for all immediatesSamuel Pitoiset2016-04-201-1/+1
| | | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Cc: "11.1 11.2" <[email protected]>
* gk110/ir: do not overwrite def value with zero for EXCH opsSamuel Pitoiset2016-04-201-6/+15
| | | | | | | | | | This is only valid for other atomic operations (including CAS). This fixes an invalid opcode error from dmesg. While we are it, make sure to initialize global addr to 0 for other atomic operations. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Cc: "11.1 11.2" <[email protected]>
* anv: fix build without Wayland platformMarcin Ślusarz2016-04-202-7/+5
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
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