summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* freedreno/a4xx: fix encoding of blend color stateRob Clark2016-04-221-35/+14
| | | | | | | Fixes a whole bunch of dEQP-GLES3.functional.fragment_ops.random.* (now they all pass) Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2016-04-225-9/+33
| | | | | | Pull in RB_BLEND_* fixes. Signed-off-by: Rob Clark <[email protected]>
* vc4: Make sure we recompile when sample_mask changes.Eric Anholt2016-04-221-0/+1
| | | | | | | Part of fixing piglit EXT_framebuffer_multisample/sample-coverage inverted (there is also a bug with RCL tiled blits) Cc: "11.1 11.2" <[email protected]>
* vc4: Fix validation of full res tile offset if used for non-MSAA.Eric Anholt2016-04-223-2/+14
| | | | | | There's no reason we couldn't do non-MSAA full resolution tile buffer load/stores, but we would have claimed buffer overflow was being attempted. Nothing does this currently.
* vc4: Only do MSAA FB operations if the FB is MSAA.Eric Anholt2016-04-221-5/+8
| | | | | I noticed this as a problem with ET:QW traces emitting coverage code when the framebuffer was supposed to be single sampled.
* vc4: Fix tests for format supported with nr_samples == 1.Eric Anholt2016-04-221-3/+4
| | | | | | | | | | This was a bug from the MSAA enabling. Tests for surfaces with nr_samples==1 instead of 0 (generally GL renderbuffers) would incorrectly fail out. Fixes the ARB_framebuffer_sRGB piglit tests other than srgb_conformance. Cc: "11.1 11.2" <[email protected]>
* vc4: Don't try to blit from MSAA surfaces with mismatched width to dst.Eric Anholt2016-04-221-11/+14
| | | | | | | | | I had made the previous blit fix non-MSAA only because I was thinking about how the hardware infers stride from the RENDERING_CONFIG packet. However, I'm also inferring the stride for both MSAA src and dst in vc4_render_cl.c from the width argument in the ioctl. Fixes 15 EXT_framebuffer_multisample piglit tests.
* i965: Disable channel expressions for scalar GS, TCS, TES.Kenneth Graunke2016-04-221-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Broadwell, I get the following shader-db statistics: Tessellation Control Shaders: total instructions in shared programs: 57327 -> 57012 (-0.55%) instructions in affected programs: 27334 -> 27019 (-1.15%) helped: 45 HURT: 0 total cycles in shared programs: 265692 -> 255188 (-3.95%) cycles in affected programs: 263122 -> 252618 (-3.99%) helped: 184 HURT: 26 Tessellation Evaluation Shaders: total instructions in shared programs: 23236 -> 23157 (-0.34%) instructions in affected programs: 2791 -> 2712 (-2.83%) helped: 27 HURT: 0 total cycles in shared programs: 151858 -> 149704 (-1.42%) cycles in affected programs: 151858 -> 149704 (-1.42%) helped: 101 HURT: 114 Geometry Shaders: Orbital Explorer goes from 6442 -> 6356 instructions. Two Shadow of Mordor shaders increase by a single instruction. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/blorp: Add support for 2x msaaTopi Pohjolainen2016-04-222-10/+9
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/blorp: Add support for encoding/decoding interleaved 2x msaaTopi Pohjolainen2016-04-221-8/+36
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: don't lower mod() in glsl irSamuel Iglesias Gonsálvez2016-04-221-1/+0
| | | | | | | | | NIR will lower it in nir_opt_algebraic. No change in shader-db. Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: fix cross validation for explicit locations on structs and arraysTimothy Arceri2016-04-221-13/+30
| | | | | | Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* radeonsi: implement TGSI_SEMANTIC_HELPER_INVOCATIONNicolai Hähnle2016-04-212-1/+12
| | | | | | Depends on LLVM support introduced in r267102. Reviewed-by: Marek Olšák <[email protected]>
* swr: ignore generated files in rasterizerIlia Mirkin2016-04-221-0/+7
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Tim Rowley <[email protected]>
* nvc0: fix retrieving query results into buffer for timestampsIlia Mirkin2016-04-221-5/+15
| | | | | | | | | The timestamps are stored in a funny place, and even though they are a 64-bit result, are not stored with is64bit. Account for that when retrieving the query result into a resource. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.2" <[email protected]>
* i965/surface_state: Use libisl functions for image format loweringJason Ekstrand2016-04-213-120/+12
| | | | | | | This lets us delete some redundant code and keep all of the image_load_store format lowering logic in one place: libisl. Reviewed-by: Chad Versace <[email protected]>
* i965/fs_surface_builder: Use isl instead of mesa for format infoJason Ekstrand2016-04-211-66/+52
| | | | Reviewed-by: Chad Versace <[email protected]>
* i965/fs_surface_builder: Add a helper for converting GL to ISL formatsJason Ekstrand2016-04-211-0/+55
| | | | Reviewed-by: Chad Versace <[email protected]>
* i965/fs_surface_builder: Explicitly handle FORMAT_NONE in num_image_coordinatesJason Ekstrand2016-04-211-0/+1
| | | | | | | | | Previously, we were relying on has_matching_typed_format returning true for MESA_FORMAT_NONE which, in turn, relied on _mesa_get_format_bytes returning 1 for MESA_FORMAT_NONE. When we switch to ISL, this behaviour will no longer be something we can rely on. Reviewed-by: Chad Versace <[email protected]>
* i965/fs_surface_builder: Take a GL format enum instead of mesa_formatJason Ekstrand2016-04-213-9/+10
| | | | Reviewed-by: Chad Versace <[email protected]>
* isl/format: Add a get_num_channels helperJason Ekstrand2016-04-212-0/+17
| | | | Reviewed-by: Chad Versace <[email protected]>
* isl/format: Add more isl_format_has_type_channel functionsJason Ekstrand2016-04-212-4/+43
| | | | Reviewed-by: Chad Versace <[email protected]>
* isl/format: Break the guts of has_[us]int_channel into a helperJason Ekstrand2016-04-211-18/+16
| | | | Reviewed-by: Chad Versace <[email protected]>
* anv/image: Use the has_matching_typed_storage_image_format helper from islJason Ekstrand2016-04-211-12/+3
| | | | Reviewed-by: Chad Versace <[email protected]>
* isl: Add a helper for determining when a typed load/store can be usedJason Ekstrand2016-04-212-0/+20
| | | | Reviewed-by: Chad Versace <[email protected]>
* isl: Take a devinfo in lower_storage_image_format instead of an isl_deviceJason Ekstrand2016-04-214-18/+19
| | | | | | | We want to call this function from the shader compiler and having a full isl_device available at that point isn't practical. Reviewed-by: Chad Versace <[email protected]>
* isl: Don't use designated initializers in the headerJason Ekstrand2016-04-211-13/+24
| | | | | | | C++ doesn't support designated initializers and g++ in particular doesn't handle them when the struct gets complicated, i.e. has a union. Reviewed-by: Chad Versace <[email protected]>
* isl: Include c99_compat.hJason Ekstrand2016-04-211-0/+1
| | | | | | We need the restrict keyword in isl.h Reviewed-by: Chad Versace <[email protected]>
* i965: Add a dependency on libislJason Ekstrand2016-04-214-10/+17
| | | | | | | To avoid build issues, ensure that you're running `make' at the top level and/or you've executed `make clean' beforehand. Reviewed-by: Chad Versace <[email protected]>
* radeon: handle query buffer allocation and mapping failuresNicolai Hähnle2016-04-212-9/+33
| | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94984 Reviewed-by: Marek Olšák <[email protected]>
* radeon: wire end_query return value to sw/hw_endNicolai Hähnle2016-04-212-7/+10
| | | | Reviewed-by: Marek Olšák <[email protected]>
* st/mesa: check return value of begin/end_queryNicolai Hähnle2016-04-211-22/+33
| | | | | | | | | They can only indicate out of memory conditions, since the other error conditions are caught earlier. v2: fix error message in EndQuery Reviewed-by: Samuel Pitoiset <[email protected]>
* gallium: add bool return to pipe_context::end_queryNicolai Hähnle2016-04-2119-26/+49
| | | | | | | | | Even when begin_query succeeds, there can still be failures in query handling. For example for radeon, additional buffers may have to be allocated when queries span multiple command buffers. Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* i965: Always use Y-tiled buffers on SKL+Ben Widawsky2016-04-214-8/+30
| | | | | | | | | | | | | | | | Starting with Skylake, the display engine is capable of scanning out from Y-tiled buffers. As such, we can and should use Y-tiling for better efficiency. This also has the added benefit of being able to fast clear the winsys buffer. Note that the buffer allocation done for mipmaps will already never allocate an X-tiled buffer for GEN9. This has an almost universal positive impact on benchmarks, some improving by as much as 20%. Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* softpipe: fix a warning due to an incorrect enum comparisonMarek Olšák2016-04-221-1/+1
| | | | | | no change in behavior, because both are defined the same Acked-by: Jose Fonseca <[email protected]>
* gallium: remove helpers converting to/from TGSI_PROCESSOR_*Marek Olšák2016-04-224-37/+3
| | | | Acked-by: Jose Fonseca <[email protected]>
* gallium: use PIPE_SHADER_* everywhere, remove TGSI_PROCESSOR_*Marek Olšák2016-04-2248-369/+360
| | | | Acked-by: Jose Fonseca <[email protected]>
* gallium: merge PIPE_SWIZZLE_* and UTIL_FORMAT_SWIZZLE_*Marek Olšák2016-04-2263-499/+489
| | | | | | | | Use PIPE_SWIZZLE_* everywhere. Use X/Y/Z/W/0/1 instead of RED, GREEN, BLUE, ALPHA, ZERO, ONE. The new enum is called pipe_swizzle. Acked-by: Jose Fonseca <[email protected]>
* gallium: use enums in p_shader_tokens.h (v2)Marek Olšák2016-04-221-139/+164
| | | | | | | | Reviewed-by: Edward O'Callaghan <[email protected]> (v1) Reviewed-by: Roland Scheidegger <[email protected]> (v1) Acked-by: Jose Fonseca <[email protected]> (v1) v2: name enums
* gallium: use enums in p_defines.h (v2)Marek Olšák2016-04-221-173/+205
| | | | | | | | | | and remove number assignments which are consecutive Reviewed-by: Edward O'Callaghan <[email protected]> (v1) Reviewed-by: Roland Scheidegger <[email protected]> (v1) Acked-by: Jose Fonseca <[email protected]> (v1) v2: name enums
* radeonsi: remove the shader parameter from si_set_ring_bufferMarek Olšák2016-04-223-15/+11
| | | | | | | | not used anymore this is a follow-up to the RW buffer cleanup. Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: decrease GS copy shader user SGPRs to 2Marek Olšák2016-04-222-3/+3
| | | | | | | | const buffers are no longer used since the clip plane const buffer was moved to RW buffers Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: shorten slot masks to 32 bitsMarek Olšák2016-04-224-63/+61
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: clean up shader resource limit definitionsMarek Olšák2016-04-223-23/+12
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: move default tess level constant buffer to RW buffersMarek Olšák2016-04-225-10/+35
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: move sample positions constant buffer to RW buffersMarek Olšák2016-04-223-4/+5
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: move clip plane constant buffer to RW buffersMarek Olšák2016-04-224-14/+12
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: rework polygon stippling to use constant buffer instead of textureMarek Olšák2016-04-226-101/+55
| | | | | | | | | add it to the RW_BUFFERS descriptor array now the slot masks don't have to have 64 bits Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: generalize si_set_constant_bufferMarek Olšák2016-04-221-10/+17
| | | | | | | this will be used in the next commit Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: make RW buffer descriptor array global, not per shader stageMarek Olšák2016-04-222-51/+43
| | | | | | | v2: also simplify invalidation of RW buffer bindings (squashed) Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-27 11:14:05 +0000