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* freedreno/a6xx: bordercolor fixesRob Clark2018-09-051-4/+25
| | | | | | | | | Port fixes from a5xx (f0715442) TODO maybe this should move to shared code, since it seems to be the same. Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix context teardown harderRob Clark2018-09-054-8/+8
| | | | | | | | The border_color_uploaders need to be torn down before the transfer_pool is destroyed. Fixes: e11e9d63943 freedreno: fix context teardown race Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: ignore unused inputsRob Clark2018-09-051-1/+29
| | | | | | | | | | We could end up w/ inputs larger than vec4, simply because unused inputs are not split. Fixes things like dEQP-GLES31.functional.separate_shader.random.77 (and probably a handful of others) Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: fix debug build crashRob Clark2018-09-051-0/+7
| | | | | | Porting 0c8d9e923aa9239e20f9bc969faf9caa0b85237f to a6xx. Signed-off-by: Rob Clark <[email protected]>
* meson: Print a message about why a libdrm version was selectedDylan Baker2018-09-051-0/+5
| | | | | | | | | | | | | | | | | We require a single version of libdrm for all of our libdrm dependencies (core and driver), but the way this is structured can make the error message less than helpful, as one driver might be the one setting the libdrm requirement, while another might be the one that generates the version failure. This adds a simple message to the output announcing which libdrm module set the version, which might be more helpful. v2: - Use message suggested by Eric Engstrom Fixes: c445b1d56f47922206de55e557444aadb62e11f6 ("meson: Use the same version for all libdrm checks") Reviewed-by: Eric Engestrom <[email protected]>
* svga: rename face to layer_faceCharmaine Lee2018-09-051-22/+25
| | | | | Reviewed-by: Neha Bhende <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* svga: encode sample count in resource declarationsBrian Paul2018-09-054-0/+6
| | | | | | No regressions before the corresponding host-side change. Reviewed-by: Neha Bhende <[email protected]>
* svga: sync with upstream changes to surface flagsCharmaine Lee2018-09-059-14/+19
| | | | | | | | | SVGA device now supports 64 bits surface flags. This patch updates the winsys interface to allow 64 bits surface flags. The linux winsys layer will for now only honor the lower 32 bits of the surface flags. Reviewed-by: Brian Paul <[email protected]>
* svga: avoid try_blit() for some depth formats on non vgpu10.Neha Bhende2018-09-051-0/+13
| | | | | | | | | | | | | On non vgpu10, driver doesn't support util_blitter_blit for SVGA3D_Z_D16, SVGA3D_Z_D24x8, SVGA3D_Z_D24S8. Patch fixes following piglit tests regression on hwv8 caused by commit 27bf35caea5e: spec@arb_depth_texture@fbo-depth-gl-depth-component16-blit spec@arb_depth_texture@fbo-depth-gl-depth-component24-blit spec@arb_depth_texture@fbo-depth-gl-depth-component32-blit Tested with mtt-piglit on hw 8,9,10,11,13 and mtt-glretrace on windows and linux. Reviewed-by: Charmaine Lee <[email protected]>
* svga: convert dst format to linear when blending is enabled.Neha Bhende2018-09-051-1/+3
| | | | | | | | | | | When blending is enabled, framebuffer colorspace has to be linear. Previously, we never hit this case because we were not supporting sRGB drawable. Previous patch added that support. Tested with mtt glretrace, viewperf, piglit, conform. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Charmaine Lee <[email protected]>
* winsys/svga: Avoid cap2 code path for nowNeha Bhende2018-09-051-13/+5
| | | | | | | CAP2 functionality is not yet part of vmwgfx. This is causing unnecessary dmesg error messages. Reviewed-by: Charmaine Lee <[email protected]>
* svga: start using SVGA3dCmdIntraSurfaceCopy command for svga_blit.Neha Bhende2018-09-051-0/+112
| | | | | | | | | | | | | Basically, SVGA3dCmdIntraSurfaceCopy command allow copying when source and destination are same. Tested with MTT piglit, glretrace, viewperf, conform v2: changes as per Charmaine's comment v3: changes as per Charmaine's comment Reviewed-by: Charmaine Lee <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* svga/winsys: Add cap2 support in winsysNeha Bhende2018-09-054-2/+38
| | | | | Reviewed-by: Charmaine Lee <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* svga: Add SVGA3dCmdIntraSurfaceCopy command support in OpenGL driverNeha Bhende2018-09-053-0/+49
| | | | | | | v2: changes as per Charmaine's comment Reviewed-by: Charmaine Lee <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* svga: update device header files from upstreamBrian Paul2018-09-0515-196/+569
| | | | | | This is a squash commit of several earlier patches. Signed-off-by: Brian Paul <[email protected]>
* winsys/drm: Fix assert when try to accumulate an invalid fdCharmaine Lee2018-09-051-2/+7
| | | | | | | | | | This patch makes sure there is a valid fd before merging it to the context's fd in vmw_svga_winsys_fence_server_sync(). This fixes the assert running webot. No regression running kmscube. Reviewed-by: Sinclair Yeh <[email protected]>
* loader: Drop unused argument from dri3_update_drawable().Eric Anholt2018-09-051-4/+3
| | | | | | The argument has never been used since the function was added. Reviewed-by: Michel Dänzer <[email protected]>
* i965/fs: include multisamplers on image_intrinsic_coord_componentsAlejandro Piñeiro2018-09-051-0/+2
| | | | | | | | | | | | | | | | | | This is the second patch needed to fix the following piglit tests: tests/spec/arb_gl_spirv/linker/uniform/multisampler.shader_test tests/spec/arb_gl_spirv/linker/uniform/multisampler-array.shader_test Although in this case it doesn't affect so many borrowed tests, as there aren't too many tests using multisamplers on Intel. It is worth to note that this patch is also needed when those tests are run on GLSL mode (using the --glsl option). Although most Intel drivers would not be able to run/execute tests using multisamplers, as GL_MAX_IMAGE_SAMPLES is zero, technically those tests are expected to link correctly, so linking tests should pass. Reviewed-by: Jason Ekstrand <[email protected]>
* i965: move brw_nir_lower_gl_images callAlejandro Piñeiro2018-09-052-1/+10
| | | | | | | | | | | | | | | | | | | At this moment that lowering is using info coming from the UniformStorage, so for the ARB_gl_spirv codepath, it needs to be done after calling gl_nir_link_uniforms. As for the GLSL codepath it can also be called later, we just move the call on both cases, to avoid adding several shader->spirv_data checks, and keep the patch as small as possible. This is the first patch needed to fix the following piglit tests: tests/spec/arb_gl_spirv/linker/uniform/multisampler.shader_test tests/spec/arb_gl_spirv/linker/uniform/multisampler-array.shader_test but fixes thousands of tests when borrowing the tests from other specs (that needs to be done manually right now). Reviewed-by: Jason Ekstrand <[email protected]>
* intel/compiler: rename brw_nir_lower_glsl_imagesAlejandro Piñeiro2018-09-053-5/+5
| | | | | | | | | | To brw_nir_lower_gl_images, as it will be also used on the ARB_gl_spirv codepath, that doesn't involves GLSL at all. So the lowering is about images following the OpenGL semantics. In any case "brw_nir_lower_opengl_images" seemed too long to me, so I just used gl. That shortening is already used on other parts of the code. Reviewed-by: Jason Ekstrand <[email protected]>
* intel/compiler: remove unused variable num_imagesAlejandro Piñeiro2018-09-051-2/+0
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* winsys/virgl/vtest: Correct off-by-one error in resource allocationGert Wollny2018-09-051-4/+9
| | | | | | | The resource bo array must already extended when the target index is equal to the current size of the array. Signed-off-by: Gert Wollny <[email protected]>
* winsys/virgl: Initialize value to silence valgrindGert Wollny2018-09-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | Silences: Conditional jump or move depends on uninitialised value(s) at 0xB72F2C0: virgl_drm_winsys_create (virgl_drm_winsys.c:854) by 0xB72F2C0: virgl_drm_screen_create (virgl_drm_winsys.c:926) by 0xB21C885: pipe_virgl_create_screen (drm_helper.h:275) by 0xB7201F0: pipe_loader_create_screen (pipe_loader.c:137) by 0xB639C91: dri2_init_screen (dri2.c:2112) by 0xB634F68: driCreateNewScreen2 (dri_util.c:153) by 0x63023E6: dri3_create_screen (dri3_glx.c:893) by 0x62D35BD: AllocAndFetchScreenConfigs (glxext.c:820) by 0x62D35BD: __glXInitialize (glxext.c:946) by 0x62CECB3: GetGLXPrivScreenConfig (glxcmds.c:174) by 0x62CF69C: glXQueryExtensionsString (glxcmds.c:1304) by 0x60AA7D9: ??? (in /usr/lib/x86_64-linux-gnu/libwaffle-1.so.0.5.2) by 0x4F81450: wfl_checked_display_connect (piglit-util-waffle.h:74) by 0x4F829E0: piglit_wfl_framework_init (piglit_wfl_framework.c:627) Signed-off-by: Gert Wollny <[email protected]>
* winsys/virgl: correct resource and handle allocation (v2)Gert Wollny2018-09-051-5/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes crash with piglit/bin/map_buffer_range-invalidate CopyBufferSubData \ increment-offset -auto -fbo * Resize the resource storage already when the count is equal to the allocated size, fixes: Invalid write of size 8 at 0xB72E4CF: virgl_drm_add_res (virgl_drm_winsys.c:629) by 0xB72E4CF: virgl_drm_emit_res (virgl_drm_winsys.c:663) by 0xB72A44A: virgl_encode_resource_copy_region (virgl_encode.c:776) by 0xB40CD12: st_copy_buffer_subdata (st_cb_bufferobjects.c:585) by 0xB244A3B: _mesa_CopyBufferSubData (bufferobj.c:2940) by 0x109A1E: upload (invalidate.c:169) by 0x109C2F: piglit_display (invalidate.c:215) by 0x4F80FBE: run_test (piglit_fbo_framework.c:52) by 0x4F66E5F: piglit_gl_test_run (piglit-framework-gl.c:229) by 0x10949D: main (invalidate.c:47) Address 0xbe07d30 is 0 bytes after a block of size 4,096 alloc'd at 0x4C31B25: calloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so) by 0xB72DAAF: virgl_drm_cmd_buf_create (virgl_drm_winsys.c:567) * Also resize the space allocated for the handles, fixes: Invalid write of size 4 at 0xB72E4F0: virgl_drm_add_res (virgl_drm_winsys.c:631) by 0xB72E4F0: virgl_drm_emit_res (virgl_drm_winsys.c:663) by 0xB72A44A: virgl_encode_resource_copy_region (virgl_encode.c:776) by 0xB40CD12: st_copy_buffer_subdata (st_cb_bufferobjects.c:585) by 0xB244A3B: _mesa_CopyBufferSubData (bufferobj.c:2940) by 0x109A1E: upload (invalidate.c:169) by 0x109C2F: piglit_display (invalidate.c:215) by 0x4F80FBE: run_test (piglit_fbo_framework.c:52) by 0x4F66E5F: piglit_gl_test_run (piglit-framework-gl.c:229) by 0x10949D: main (invalidate.c:47) Address 0xbe08570 is 0 bytes after a block of size 2,048 alloc'd at 0x4C2FB0F: malloc ( in /usr/lib/valgrind/vgpreload_memcheck-amd64- linux.so) by 0xB72DAC8: virgl_drm_cmd_buf_create (virgl_drm_winsys.c:572) Fixes: 4b15b5e803e ("virgl: resize resource bo allocation if we need to.") v2: - Use REALLOC macro and avoid memory leak when re-allocation fails - add Fixes tag (both Emil Velikov) - reorder commit message Signed-off-by: Gert Wollny <[email protected]>
* virgl: use hw-atomics instead of in-ssbo onesTomeu Vizoso2018-09-057-2/+89
| | | | | | | | Emulating atomics on top of ssbos can lead to too small max SSBO count, so let's use the hw-atomics mechanism to expose atomic buffers instead. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* virgl: update minor differences to upstream headerErik Faye-Lund2018-09-051-1/+1
| | | | | | | | | | | virgl_protocol.h is considered to have it's upstream in the virglrenderer repository, and somehow these minor differences has crept in. Let's sync with the upstream to avoid this. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* gallium: add PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER{S,_BUFFERS}Erik Faye-Lund2018-09-055-9/+29
| | | | | | | | | | | | | | This moves the evergreen-specific max-sizes out as a driver-cap, so other drivers with less strict requirements also can use hw-atomics. Remove ssbo_atomic as it's no longer needed. We should now be able to use hw-atomics for some stages and not for other, if needed. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* gallium: add PIPE_CAP_MAX_COMBINED_SHADER_BUFFERSErik Faye-Lund2018-09-055-2/+13
| | | | | | | | | | | This gets rid of a r600 specific hack in the state-tracker, and prepares for other drivers to be able to use hw-atomics. While we're at it, clean up some indentation in the various drivers. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* st/mesa: simplify MaxAtomicBufferSize-logicErik Faye-Lund2018-09-051-4/+3
| | | | | | | | | | | | | MaxAtomicCounters has already been assigned in the loop above in the ssbo_atomic = true case, so this will calculate the same value as the default. While we're at it, fixup indentation on the MaxAtomicBufferBindings assign. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* st/mesa: clean up atomic vs ssbo codeErik Faye-Lund2018-09-051-6/+21
| | | | | | | | | | | | | | | | | This makes the code a bit easier to follow; we first set up MaxShaderStorageBlocks, then we either set up a dedicated MaxAtomicBuffers, or we split MaxShaderStorageBlocks in two. While we're at it, also make the SSBO-splitting code tolerate the hypothetical case of having an odd number of SSBOs without incorrectly dropping the last SSBO. This has the nice result that the SSBOs and atomic buffers are dealt with almost completely orthogonally, easing some upcoming patches. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* st/mesa: use real bool for can_uboErik Faye-Lund2018-09-051-3/+3
| | | | | | | | | We're doing full c99 now, so there's no point in using the old boolean type. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* gallium/u_threaded: increase batch size to increase performanceMarek Olšák2018-09-041-1/+1
| | | | | | | | | This reduces mutex overhead. radeonsi: +4.4% performance with piglit/drawoverhead, DrawElements, Ryzen X1700 iris_dri.so: +14% with piglit/drawoverhead, DrawArrays, i7 7700HQ. Acked-by: Kenneth Graunke <[email protected]>
* st/vdpau: silence an unitialized-variable warningMarek Olšák2018-09-041-1/+1
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* st/mesa: help fix stencil border color for GL_DEPTH_STENCIL texturesMarek Olšák2018-09-041-0/+3
| | | | | | | | | GL_STENCIL_INDEX uses GL_INTENSITY for the border color, which is nicer to hardware that doesn't read the stencil border value from the X channel. This fixes a bunch of dEQP tests on Vega & Raven. Cc: 18.1 18.2 <[email protected]>
* glsl_to_tgsi: Fix potential leakErnestas Kulik2018-09-041-3/+4
| | | | | | | | Reported by Coverity: arr_live_ranges is freed in a different branch than the one in which it was allocated. Signed-off-by: Ernestas Kulik <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* u_vbuf: Fix leakErnestas Kulik2018-09-041-0/+1
| | | | | | | | | Reported by Coverity: data is heap-allocated, but only freed in the info->index_size != 0 branch. Signed-off-by: Ernestas Kulik <[email protected]> Signed-off-by: Marek Olšák <[email protected]> Cc: 18.2 <[email protected]>
* freedreno: Drop a bunch of duplicated gallium PIPE_CAP default code.Eric Anholt2018-09-041-108/+2
| | | | | | | | | Now that we have the util function for the default values, we can get rid of the boilerplate. v2: Rebase on new gallium caps Reviewed-by: Rob Clark <[email protected]> (v1)
* v3d: Drop a bunch of duplicated gallium PIPE_CAP default code.Eric Anholt2018-09-041-151/+0
| | | | | | | Now that we have the util function for the default values, we can get rid of the boilerplate. v2: Rebase on new gallium caps
* vc4: Drop a bunch of duplicated gallium PIPE_CAP default code.Eric Anholt2018-09-042-184/+1
| | | | | | | | Now that we have the util function for the default values, we can get rid of the boilerplate. v2: drop GLSL level in favor of defaults. v3: Rebase on new gallium caps
* gallium: Add a helper for implementing PIPE_CAP_* default values.Eric Anholt2018-09-0419-35/+403
| | | | | | | | | | | | | | | | | | One of the pains of implementing a gallium driver is filling in a million pipe caps you don't know about yet when you're just starting out. One of the pains of working on gallium is copy-and-pasting your new PIPE_CAP into each driver. We can fix both of these by having each driver call into the default helper from their default case, so that both sides can ignore each other until they need to. v2: fix i915g build, revert swr change to avoid breaking scons build (https://travis-ci.org/anholt/mesa/jobs/419739857) v3: Rebase on 3 new gallium caps. Reviewed-by: Marek Olšák <[email protected]> (v1) Cc: Bruce Cherniak <[email protected]> Cc: George Kyriazis <[email protected]> Cc: Kenneth Graunke <[email protected]>
* intel/compiler: Remove redundant nir_remove_dead_variables callJason Ekstrand2018-09-041-2/+0
| | | | | | | As of 07a2098a708a2, brw_nir_optimize calls nir_remove_dead_variables as the last optimization. Doing it again is just pointless. Reviewed-by: Tapani Pälli <[email protected]>
* intel: compiler: remove dead local variables at optimization passLionel Landwerlin2018-09-031-0/+5
| | | | | | | | | | | | | | | | | | | | We're hitting an assert in gfxbench because one of the local variable is a sampler (according to Jason this isn't valid) : testfw_app: ../src/compiler/nir_types.cpp:551: void glsl_get_natural_size_align_bytes(const glsl_type*, unsigned int*, unsigned int*): Assertion `!"type does not have a natural size"' failed. Since this particular variable isn't used, it can be eliminated by removing unused local variables at the end of the optimization loop. This makes sense also for valid local variables. v2: Move additional local variable removal out of optimization loop, but before large constant removal (Jason/Lionel) v3: Move the removal at the end of brw_nir_optimize() Signed-off-by: Lionel Landwerlin <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107806 Reviewed-by: Jason Ekstrand <[email protected]>
* intel/decoder: fix the possible out of bounds group_iterAndrii Simiklit2018-09-031-1/+4
| | | | | | | | | | | The "gen_group_get_length" function can return a negative value and it can lead to the out of bounds group_iter. v2: printing of "unknown command type" was added v3: just the asserts are added Signed-off-by: Andrii Simiklit <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* radv: Fix CMASK dimensions.Bas Nieuwenhuizen2018-09-031-2/+2
| | | | | | | | | | Mirrors 1e40f694831 "ac/surface: fix CMASK fast clear for NPOT textures with mipmapping on SI/CI/VI" CC: <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Use a lower max offchip buffer count.Bas Nieuwenhuizen2018-09-031-2/+22
| | | | | | | | No clue what gets fixed by this but both radeonsi and amdvlk do it. CC: <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Add VEGA20 support.Bas Nieuwenhuizen2018-09-032-0/+2
| | | | | | | | | Just mirror the radeonsi bits. Since this is just adding the extra switch entries for new HW I think this should be fine for stable. CC: <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: don't expose linear depth surfaces on SI/CIK/VI either.Dave Airlie2018-09-031-3/+2
| | | | | | | | | | | ac_surface.c: gfx6_compute_surface says /* DB doesn't support linear layouts. */ Now if we expose linear depth and create a linear depth image and use CmdCopyImage to copy into it, we can't map the underlying memory and read it linearly which I think should work. Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* egl/android: do not indent HAVE_DRM_GRALLOC preprocessor directiveMauro Rossi2018-09-021-3/+3
| | | | | | | Fixes: 3f7bca44d9 ("egl/android: #ifdef out flink name support") Fixes: c7bb82136b ("egl/android: Add DRM node probing and filtering") Reviewed-by: Emil Velikov <[email protected]> Signed-off-by: Mauro Rossi <[email protected]>
* anv/blorp: Fix a comment as per Nanley's review feedbackJason Ekstrand2018-09-011-2/+2
| | | | This accidentally didn't make it into 62378c5e9e5
* anv/blorp: Do more flushing around HiZ clearsJason Ekstrand2018-09-011-11/+33
| | | | | | | | | | We make the flush after a HiZ clear unconditional and add a flush/stall before the clear as well. Cc: [email protected] Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107760 Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
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