summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* gallium/auxiliary: don't dereference counters twice needlesslyMarek Olšák2018-09-101-7/+10
| | | | Tested-by: Dieter Nützel <[email protected]>
* gallium/u_inlines: normalize naming, use dst & src, style fixes (v2)Marek Olšák2018-09-101-47/+47
| | | | | | | v2: update comments Reviewed-by: Michel Dänzer <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* util: try to fix the Android and MacOS buildMarek Olšák2018-09-101-2/+5
| | | | | | | | Bionic does not have pthread_setaffinity_np. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107869 Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* anv: Support v3 of VK_EXT_vertex_attribute_divisorJason Ekstrand2018-09-102-1/+9
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* vulkan: Update the XML and headers to 1.1.84Jason Ekstrand2018-09-102-74/+345
| | | | Acked-by: Bas Nieuwenhuizen <[email protected]>
* mesa/meson: 32bit xmlconfig linkageSergii Romantsov2018-09-101-0/+1
| | | | | | | | | | | | | | | | | | Building of 32bit mesa with meson causes linkage issue: "undefined reference to `util_get_process_name'" Fixed by adding link-with mesa_util for xmlconfig primary. v2: Removed '[]', commit message corrected. v3: Reverted changes in gbm and glx libraries. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107843 Fixes: 2e1e6511f76370870b5cd "util: extract get_process_name from xmlconfig.c" Cc: Marek Olšák <[email protected]> Cc: Dylan Baker <[email protected]> Signed-off-by: Sergii Romantsov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* Require Visual Studio 2015.Jose Fonseca2018-09-104-17/+5
| | | | | | | | We no longer need or use Visual Studio 2013. https://ci.appveyor.com/project/jrfonseca/mesa/build/52 Reviewed-by: Roland Scheidegger <[email protected]>
* util: Make util_context_thread_changed a no-op on Windows.Jose Fonseca2018-09-101-0/+2
| | | | | | | | | Spite using thrd_t types, these functions are wed to pthreads, and break Windows builds, because thrd_current() is not implemented there, as it's impossible to have an efficient thrd_current() implementation on Windows. Trivial.
* virgl: do not map zero-sized resourceErik Faye-Lund2018-09-101-2/+1
| | | | | | | | | | | | | | | | When creating textures, we avoid creating backing-store for all multisampled textures, not just depth buffers. So we can't try to map them later. That's just going to fail. So let's take the blit-based code-path that seems to avoid this problem. This make this piglit test-case no longer crash (although it still fails): bin/copyteximage 2D -samples=2 -auto Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* virgl: remove dead codeErik Faye-Lund2018-09-101-5/+1
| | | | | | | | We don't use the size we calculate in this function, so let's just drop the calculation Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* virgl: drop needless return-codeErik Faye-Lund2018-09-101-2/+1
| | | | | | | | We always return TRUE, and we never check the return-value. Let's just drop the return value instead. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* virgl: free trans on map-errorErik Faye-Lund2018-09-101-0/+1
| | | | | | | | | | When we fail to map memory, we should also free trans to avoid leaking memory. Noticed while reading code. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* i965: Bump aperture tracking to u64Chris Wilson2018-09-103-11/+8
| | | | | | | | | As a prelude to handling large address spaces, first allow ourselves the luxury of handling the full 4G. Reported-by: Andrey Simiklit <[email protected]> Cc: Kenneth Graunke <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* etnaviv: Reduce max offset to available hardware bits.Mathias Fröhlich2018-09-101-0/+2
| | | | | | Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* gallium: New cap PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET.Mathias Fröhlich2018-09-104-0/+12
| | | | | | | | | | | Introduce a new capability for the maximum value of pipe_vertex_element::src_offset. Initially just every driver backend returns the value previously set from _mesa_init_constants. So this shall end up in no functional change. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* virgl: don't send a shader create with no data. (v2)Dave Airlie2018-09-101-1/+1
| | | | | | | | | | | | | This fixes the situation where we'd send a shader with just the header and no data. piglit/glsl-max-varyings test was causing this to happen, and the renderer fix was breaking it. v2: drop fprintf Fixes: a8987b88ff1d "virgl: add driver for virtio-gpu 3D (v2)" Reviewed-by: Erik Faye-Lund <[email protected]>
* mesa: enable ARB_vertex_buffer_object in core profileTimothy Arceri2018-09-081-1/+1
| | | | | | | | | | This extension is required by "Wolfenstein: The Old Blood" and is exposed in core in the Nvidia binary driver. All the functions are just alias of the core functions so there should be nothing more to do. Reviewed-by: Ian Romanick <[email protected]>
* st/mesa: throttle texture uploads if their memory usage goes beyond a limitMarek Olšák2018-09-075-0/+165
| | | | | This prevents radeonsi from running out of memory. It also increases texture upload performance by being nice to the kernel memory manager.
* gallium: add PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGETMarek Olšák2018-09-0716-0/+24
|
* docs: update calendar, add news item and link release notes for 18.2.0Andres Gomez2018-09-083-6/+35
| | | | Signed-off-by: Andres Gomez <[email protected]>
* docs: add sha256 checksums for 18.2.0Andres Gomez2018-09-081-1/+2
| | | | | Signed-off-by: Andres Gomez <[email protected]> (cherry picked from commit cb1ddf48e223231fc4e2cfdc92fbcdaec673929d)
* docs: update 18.2.0 release notesAndres Gomez2018-09-081-1/+206
| | | | | Signed-off-by: Andres Gomez <[email protected]> (cherry picked from commit 7378180e7aa652f3f95e4b953a552dcaf8fb8408)
* Revert "gallium/os_thread: simplify helper pipe_current_thread_get_time_nano"Marek Olšák2018-09-071-1/+5
| | | | | | This reverts commit 6d477bc5460eec14c6a0d047a0384c9ce5c7609b. It fixes the Windows build hopefully.
* anv: Clamp scissors to the framebuffer boundaryJason Ekstrand2018-09-072-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Vulkan 1.1.81 spec says: "It is legal for offset.x + extent.width or offset.y + extent.height to exceed the dimensions of the framebuffer - the scissor test still applies as defined above. Rasterization does not produce fragments outside of the framebuffer, so such fragments never have the scissor test performed on them." Elsewhere, the Vulkan 1.1.81 spec says: "The application must ensure (using scissor if necessary) that all rendering is contained within the render area, otherwise the pixels outside of the render area become undefined and shader side effects may occur for fragments outside the render area. The render area must be contained within the framebuffer dimensions." Unfortunately, there's some room for interpretation here as to what the consequences are of having the render area set to exactly the framebuffer dimensions and having a scissor that is larger than the framebuffer. Given that GL and other APIs provide automatic clipping to the framebuffer, it makes sense that applications would assume that Vulkan does this as well. It costs us very little to play it safe and just clamp client-provided scissors to the framebuffer dimensions. Fortunately, the user is required to provide us with at least one scissor so we don't need to handle the case where they don't. Fixes: fb2a5ceb3264 "anv: Emit DRAWING_RECTANGLE once at driver..." Reviewed-by: Kenneth Graunke <[email protected]>
* anv: Disable the vertex cache when tessellating on SKL GT4Jason Ekstrand2018-09-071-1/+22
| | | | | | | | | | | I have no idea if I'm correct about what's going wrong or if this is the correct fix. However, in my multiple weeks of banging my head on this hang, a VUE reference counting bug seems to match all the symptoms and it definitely fixes the hang. Cc: [email protected] Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107280 Reviewed-by: Kenneth Graunke <[email protected]>
* anv: Implement a VF cache invalidate workaroundJason Ekstrand2018-09-071-0/+25
| | | | | | Known to fix nothing whatsoever but it's in the docs. Reviewed-by: Kenneth Graunke <[email protected]>
* anv: Re-emit vertex buffers when the pipeline changesJason Ekstrand2018-09-071-0/+2
| | | | | | | | Some of the bits of VERTEX_BUFFER_STATE such as access type, instance data step rate, and pitch come from the pipeline. Cc: [email protected] Reviewed-by: Kenneth Graunke <[email protected]>
* radeonsi: pin the winsys thread to the requested L3 cache (v2)Marek Olšák2018-09-074-0/+46
| | | | | | v2: rebase Reviewed-by: Brian Paul <[email protected]>
* gallium/u_threaded: implement set_context_param for thread pinning (v2)Marek Olšák2018-09-072-0/+41
| | | | | | | v2: - use set_context_param - set set_context_param even if the driver doesn't implement it Reviewed-by: Brian Paul <[email protected]>
* st/mesa: pin driver threads to a specific L3 cache on AMD Zen (v2)Marek Olšák2018-09-075-0/+116
| | | | | | v2: use set_context_param Reviewed-by: Brian Paul <[email protected]>
* gallium: add pipe_context::set_context_param for tuning perf on AMD Zen (v2)Marek Olšák2018-09-075-0/+59
| | | | | | | | | State trackers will not use the new param directly, but will instead use a helper in MakeCurrent that does the right thing. v2: rework the interface Reviewed-by: Brian Paul <[email protected]>
* gallium/os_thread: simplify helper pipe_current_thread_get_time_nanoMarek Olšák2018-09-071-5/+1
| | | | Reviewed-by: Brian Paul <[email protected]>
* gallium/u_cpu_detect: get the number of cores per L3 cache for AMD ZenMarek Olšák2018-09-072-0/+25
| | | | Reviewed-by: Brian Paul <[email protected]>
* gallium/u_cpu_detect: fix parsing the CPU familyMarek Olšák2018-09-071-1/+2
| | | | | | | | | | According to: https://support.amd.com/TechDocs/54945_PPR_Family_17h_Models_00h-0Fh.pdf Also Intel: https://www.microbe.cz/docs/CPUID.pdf Reviewed-by: Brian Paul <[email protected]>
* gallium/u_cpu_detect: fix a race condition on initializationMarek Olšák2018-09-071-8/+10
| | | | Reviewed-by: Brian Paul <[email protected]>
* Replace uses of _mesa_bitcount with util_bitcountDylan Baker2018-09-0736-134/+104
| | | | | | | | | | | | | and _mesa_bitcount_64 with util_bitcount_64. This fixes a build problem in nir for platforms that don't have popcount or popcountll, such as 32bit msvc. v2: - Fix additional uses of _mesa_bitcount added after this was originally written Acked-by: Eric Engestrom <[email protected]> (v1) Acked-by: Eric Anholt <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* move u_math to src/utilDylan Baker2018-09-0716-15/+15
| | | | | | | | | | | | | | | Currently we have two sets of functions for bit counts, one in gallium and one in core mesa. The ones in core mesa are header only in many cases, since they reduce to "#define _mesa_bitcount popcount", but they provide a fallback implementation. This is important because 32bit msvc doesn't have popcountll, just popcount; so when nir (for example) includes the core mesa header it doesn't (and shouldn't) link with core mesa. To fix this we'll promote the version out of gallium util, then replace the core mesa uses with the util version, since nir (and other non-core mesa users) can and do link with mesautils. Acked-by: Eric Engestrom <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* docs: update calendar, add news item and link release notes for X.Y.ZDylan Baker2018-09-073-7/+8
| | | | Signed-off-by: Dylan Baker <[email protected]>
* docs/relnotes: Add sha256 sums for mesa 18.1.8Dylan Baker2018-09-071-1/+2
|
* docs: Add release notes for 18.1.8Dylan Baker2018-09-071-0/+179
|
* i965: Workaround the gen9 hw astc5x5 sampler bugJason Ekstrand2018-09-076-12/+131
| | | | | | | | | | | | | | gen9 hardware has a bug in the sampler cache that can cause GPU hangs whenever an texture with aux compression enabled is in the sampler cache together with an ASTC5x5 texture. Because we can't control what the client binds at any given time, we have two options: resolve the CCS or decompresss the ASTC. Doing a CCS or HiZ resolve is far less drastic and will likely have a smaller performance impact. Cc: [email protected] Reviewed-by: Kristian H. Kristensen <[email protected]> Tested-by: Tapani Pälli <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* v3d: Fix setup of the VCM cache size.Eric Anholt2018-09-072-2/+3
| | | | | | | | | | | There were two bugs working together to make things mostly work: I wasn't dividing the VPM output size available by the size of a batch (vertex), but I also had the size of the VPM reduced by a factor of 8. Fixes dEQP-GLES3.functional.vertex_array_objects.all_attributes and it seems also my intermittent varying failures. Fixes: 1561e4984eb0 ("v3d: Emit the VCM_CACHE_SIZE packet.")
* v3d: Fix SRC_ALPHA_SATURATE blending for RTs without alpha.Eric Anholt2018-09-071-1/+3
| | | | | | | | Fixes dEQP-GLES3.functional.fragment_ops.blend.default_framebuffer.rgb_func_alpha_func.dst.src_alpha_saturate_src_alpha_saturate and friends with --deqp-egl-config-name=rgb565d0s0 Cc: "18.2" <[email protected]>
* intel/genxml: turn SLM Enable bit into booleanLionel Landwerlin2018-09-073-3/+3
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/tools: 32bit compilation with mesonSergii Romantsov2018-09-071-1/+1
| | | | | | | | | | | Building of 32bit mesa with meson causes issue: "implicit declaration of function ‘__builtin_ia32_clflush’". Fixed by adding msse2 compilation flag. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107843 Fixes: 314879f7fec0 (i965: Fix asynchronous mappings on !LLC platforms.) Signed-off-by: Sergii Romantsov <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel: compiler option msse2 and mstackrealignSergii Romantsov2018-09-077-9/+10
| | | | | | | | | | | | | | | | | | | | | | | Seems in case of 32-bit library, usage of msse2 makes some stack corruption or incorrect instructions. Usage with mstackrealign fixes that case. v2: Fixed meson. v3: Definition of c_sse2_args moved on the top (L.Landwerlin). Added mstackrealign for Android's mks where msee4.1 is used. v4: Added for Vulkan also. v5: Commit message correction. CC: <[email protected]> Fixes: 6b05c080f202 (i965: Compile with -msse3) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107779 Signed-off-by: Sergii Romantsov <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* freedreno: fix rast->depth_cleap_near/farRob Clark2018-09-071-1/+2
| | | | | Fixes: daa19363def gallium: split depth_clip into depth_clip_near & depth_clip_far Signed-off-by: Rob Clark <[email protected]>
* gallium: enable GL_AMD_depth_clamp_separate on r600, radeonsiMarek Olšák2018-09-0622-3/+25
|
* gallium: split depth_clip into depth_clip_near & depth_clip_farMarek Olšák2018-09-0651-58/+100
| | | | for AMD_depth_clamp_separate.
* anv/pipeline: Only consider double elements which actually existJason Ekstrand2018-09-061-1/+2
| | | | | | | | | | | | The brw_vs_prog_data::double_inputs_read field comes directly from shader_info::double_inputs which may contain inputs which are not actually read. Instead of using it directly, AND it with inputs_read which is only things which are read. Otherwise, we may end up subtracting too many elements when computing elem_count. Cc: [email protected] Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103241 Reviewed-by: Lionel Landwerlin <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-22 03:24:48 +0000