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* ac: properly document a buffer.store LLVM workaroundMarek Olšák2017-10-062-6/+9
* radeonsi: use f32_0 and f32_1Marek Olšák2017-10-064-26/+26
* radeonsi: fold *gallivmMarek Olšák2017-10-062-52/+31
* radeonsi: lp_type::length is always 1Marek Olšák2017-10-061-2/+2
* radeonsi: don't use bld.elem_typeMarek Olšák2017-10-061-4/+4
* radeonsi: don't use lp_build_const_*Marek Olšák2017-10-062-9/+5
* radeonsi: use ctx->ac.context and ctx->typesMarek Olšák2017-10-064-46/+34
* radeonsi: use ctx->ac.builderMarek Olšák2017-10-064-422/+342
* radeonsi: use ctx->i/f32 types moreMarek Olšák2017-10-061-6/+6
* radeonsi: use i32_0 and i32_1 moreMarek Olšák2017-10-062-11/+13
* radeonsi: use bitcast in a few placesMarek Olšák2017-10-061-5/+2
* radeonsi: use ac helpers for bitcastsMarek Olšák2017-10-064-128/+87
* glsl_to_tgsi: skip UARL for 1D registers if the driver doesn't need itMarek Olšák2017-10-062-9/+44
* glsl_to_tgsi: handle reladdr as TEMP in rename_temp_registers and dead_codeMarek Olšák2017-10-061-16/+44
* glsl_to_tgsi: each reladdr object should have only one parentMarek Olšák2017-10-062-5/+65
* glsl_to_tgsi: fix instruction order for bindless texturesMarek Olšák2017-10-061-4/+14
* glsl_to_tgsi: enable copy propagation for tessellation shadersMarek Olšák2017-10-061-4/+3
* radeonsi: implement PIPE_CAP_TGSI_ANY_REG_AS_ADDRESSMarek Olšák2017-10-062-5/+20
* radeonsi: use si_get_indirect_index for TEMP indexingMarek Olšák2017-10-061-18/+4
* radeonsi: use si_get_indirect_index for CONST indexingMarek Olšák2017-10-063-14/+14
* tgsi/ureg: allow any register file in address operandsMarek Olšák2017-10-061-6/+0
* gallium: add PIPE_CAP_TGSI_ANY_REG_AS_ADDRESSMarek Olšák2017-10-0617-0/+18
* tgsi/scan: scan address operands (v2)Marek Olšák2017-10-061-1/+42
* tgsi/scan: set correct usage mask for tex offsets in scan_src_operandMarek Olšák2017-10-061-4/+4
* tgsi/scan: take advantage of already swizzled usage mask in scan_src_operandMarek Olšák2017-10-061-30/+17
* tgsi/scan: set non-valid src_index for tex offsets in scan_src_operandMarek Olšák2017-10-061-1/+1
* tgsi: implement tgsi_util_get_inst_usage_mask properlyMarek Olšák2017-10-063-124/+206
* tgsi: add docs for some existing pack opcodesMarek Olšák2017-10-061-3/+21
* radv: Enable VK_KHR_maintenance2 extension.Bas Nieuwenhuizen2017-10-062-0/+5
* radv: Make tess winding order a bit more intuitive.Bas Nieuwenhuizen2017-10-061-3/+2
* radv: Allow setting the domain origin in tess.Bas Nieuwenhuizen2017-10-061-1/+9
* radv: Disable usage checks in metadata for images with extended usage data.Bas Nieuwenhuizen2017-10-061-1/+3
* radv: Implement querying the point clipping behavior.Bas Nieuwenhuizen2017-10-061-0/+6
* broadcom: Fix out-of-tree build include pathDaniel Stone2017-10-052-1/+5
* meson: generate builddir/src/amd/vulkan/dev_icd.jsonBas Nieuwenhuizen2017-10-053-2/+9
* mesa: Use a 565 format for GL_RGB and GL_UNSIGNED_SHORT_5_6_5 textures.Kenneth Graunke2017-10-051-0/+3
* intel/compiler: Don't propagate cmod into integer multipliesJason Ekstrand2017-10-052-0/+34
* intel/compiler: Don't cmod propagate into a saturated operationJason Ekstrand2017-10-052-0/+16
* broadcom/vc4: Don't advertise tiled dmabuf modifiers if we can't use themDerek Foreman2017-10-051-13/+18
* egl: Simplify the "driver" interfaceAdam Jackson2017-10-055-262/+22
* loader/dri3: Don't accidently free buffer holding new back contentThomas Hellstrom2017-10-051-7/+9
* loader/dri3: Avoid resizing existing buffers in dri3_find_back_allocThomas Hellstrom2017-10-051-10/+31
* loader/dri3: Use local blits and local buffers when resizingThomas Hellstrom2017-10-051-26/+24
* gallivm/ppc64le: allow environmental control of Altivec code generationBen Crocker2017-10-051-8/+24
* gallivm/ppc64le: adjust VSX code generation control.Ben Crocker2017-10-051-7/+30
* gallivm: allow additional llc optionsBen Crocker2017-10-051-0/+23
* gallivm: fix typo in debug_printf messageBen Crocker2017-10-051-1/+1
* radv: remove useless checks around radv_CmdBindPipeline()Samuel Pitoiset2017-10-048-97/+34
* radv: check that pipeline is different before binding itSamuel Pitoiset2017-10-041-2/+8
* i965: Validate "Special Requirements for Handling Double Precision Data Types"Matt Turner2017-10-042-0/+792
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