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* radeonsi: count compilations in si_compile_llvmNicolai Hähnle2015-12-292-1/+2
* gallium/util: add DEBUG_GET_ONCE_OPTIONNicolai Hähnle2015-12-291-0/+13
* r600: fix constant buffer size programmingGrazvydas Ignotas2015-12-292-2/+2
* docs: Mark ARB_tessellation_shader as done on all i965 platforms.Kenneth Graunke2015-12-282-2/+2
* i965: Enable ARB_tessellation_shader on Gen7-7.5.Kenneth Graunke2015-12-282-3/+3
* i965: Don't set interleave or complete on TCS EOT message.Kenneth Graunke2015-12-285-5/+41
* i965: Relase input URB Handles on Gen7/7.5 when TCS threads finish.Kenneth Graunke2015-12-285-1/+93
* i965: Use proper TCS barrier ID bits for Ivybridge/Baytrail.Kenneth Graunke2015-12-281-4/+6
* i965: Use proper TCS Instance ID bits for Ivybridge/Baytrail.Kenneth Graunke2015-12-281-2/+5
* i965: Port tessellation evaluation shaders to vec4 mode.Kenneth Graunke2015-12-288-2/+365
* i965: Emit a real 3DSTATE_DS on Gen7.Kenneth Graunke2015-12-281-11/+54
* i965: Emit a real 3DSTATE_HS on Gen7.Kenneth Graunke2015-12-281-11/+47
* i965: Add the TCS/TES state upload atoms to the gen7_atoms list.Kenneth Graunke2015-12-283-30/+14
* nir: Get rid of function overloadsJason Ekstrand2015-12-2859-386/+313
* nvc0: don't forget to reset VTX_TMP bufctx slot after blit completionIlia Mirkin2015-12-271-0/+2
* nv50,nvc0: add a note when converting vertex elements using CPUIlia Mirkin2015-12-272-0/+6
* gallium/auxiliary: don't build NIR sources with MSVC2008 flagsConnor Abbott2015-12-232-7/+15
* i965: Add tr_mode and mip tail information in surface state dumpAnuj Phogat2015-12-231-2/+5
* i965/gen8/cs: Gen8 requires 64 byte alignment for push constant dataJordan Justen2015-12-221-3/+3
* freedreno/ir3: spelling..Rob Clark2015-12-231-6/+6
* nir/print: print variable constant-initializersRob Clark2015-12-231-0/+53
* docs: Clarify that ARB_tessellation_shader is only done on i965/gen8+.Kenneth Graunke2015-12-221-1/+1
* docs: Mark ARB_tessellation_shader as done on i965/gen8+.Kenneth Graunke2015-12-222-2/+2
* i965: Enable ARB_tessellation_shader on Gen8+.Kenneth Graunke2015-12-221-0/+1
* i965: Handle mix-and-match TCS/TES with separate shader objects.Kenneth Graunke2015-12-228-24/+87
* i965: Defer input lowering for tessellation stages until specialization.Kenneth Graunke2015-12-224-27/+22
* i965: Automatically create a passthrough TCS when needed.Kenneth Graunke2015-12-223-12/+113
* i965: Start program_string_id from 1, not 0.Kenneth Graunke2015-12-221-0/+1
* i965: Create and set a new brw_tcs_prog_data::outputs_written field.Kenneth Graunke2015-12-222-6/+14
* i965: Upload HS push constants whenever default tess. levels change.Kenneth Graunke2015-12-223-0/+5
* i965: Only call _mesa_load_state_parameters if prog exists.Kenneth Graunke2015-12-221-1/+2
* i965: Switch TCS gl_program/gl_shader_program checks over to TES.Kenneth Graunke2015-12-223-4/+5
* i965: Remove unnecessary brw->tess_ctrl_program assertions.Kenneth Graunke2015-12-225-6/+1
* i965: Consolidate BRW_NEW_TESS_{CTRL,EVAL}_PROGRAM flags.Kenneth Graunke2015-12-2214-47/+37
* i965: Only call brw_upload_tcs/tes_prog when using tessellation.Kenneth Graunke2015-12-223-24/+13
* nir: Add a glsl_vec_type() helper.Kenneth Graunke2015-12-222-0/+7
* nir: Use writemasked store_vars in glsl_to_nir.Kenneth Graunke2015-12-222-32/+10
* nir: Add a writemask to store intrinsics.Kenneth Graunke2015-12-2212-19/+65
* mesa: update gl_HelperInvocation support status in docsTapani Pälli2015-12-221-1/+1
* mesa: fix interface matching done in validate_ioTapani Pälli2015-12-221-27/+88
* mesa: add SSBOs to the list of fragment shader side effectsIago Toral Quiroga2015-12-221-1/+3
* i965: Ensure FS execution in presence of atomic buffersIago Toral Quiroga2015-12-222-5/+6
* mesa: Add a _mesa_active_fragment_shader_has_side_effects helperIago Toral Quiroga2015-12-223-10/+14
* i965: Implement gl_PatchVerticesIn by baking it into brw_tcs_prog_key.Kenneth Graunke2015-12-223-1/+12
* i965: Add tessellation control shaders.Kenneth Graunke2015-12-2219-2/+1195
* i965: Add tessellation evaluation shadersKenneth Graunke2015-12-2213-3/+627
* nir: remove field only used in GLSL IR when assigning varying locationsTimothy Arceri2015-12-222-10/+0
* nouveau: enable use of new kernel interfacesBen Skeggs2015-12-222-4/+0
* nvc0: remove use of deprecated sw class identifierBen Skeggs2015-12-221-3/+5
* nv50: fix g98+ vdec class allocationBen Skeggs2015-12-221-6/+51
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