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* mesa/clear: update ClearBufferuiv error handling for GL 4.5 specIlia Mirkin2016-02-121-24/+5
| | | | | | | | | | | This fixes dEQP-GLES31.functional.debug.negative_coverage.get_error.buffer.clear_bufferuiv and brings the logic up to spec with GL 4.5 Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa/clear: simplify ClearBufferiv error handlingIlia Mirkin2016-02-121-12/+6
| | | | | | | Might as well handle everything in the same error call. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa/clear: remove dead code handling ClearBufferiv(GL_DEPTH)Ilia Mirkin2016-02-121-19/+0
| | | | | | | | There's a hunk above which sets INVALID_ENUM for GL_DEPTH unconditionally. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa: allow DEPTH_STENCIL_TEXTURE_MODE queries in GLES 3.1 contextsIlia Mirkin2016-02-121-5/+3
| | | | | | | | | | | This fixes dEQP-GLES31.functional.state_query.texture.texture_2d_multisample.depth_stencil_mode_integer and a few related tests. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
* i915: include teximage.hKenneth Graunke2016-02-121-0/+1
| | | | To get _mesa_num_tex_faces() prototype.
* i965: include teximage.hBrian Paul2016-02-121-0/+1
| | | | To get _mesa_num_tex_faces() prototype.
* st/nine: Implement Managed vertex/index buffersAxel Davy2016-02-125-9/+121
| | | | | | | | | | | | | | | | | We were implementing those the same way than the default pool, which is sub-optimal. The buffer is supposed to return pointer to a ram copy when user locks, and automatically update the vram copy when needed. v2: Rename NineBuffer9_Validate to NineBuffer9_Upload Rename validate_buffers to update_managed_buffers Initialize NineBuffer9 managed fields after the resource is allocated. In case of allocation failure, when the dtor is executed, This->base.pool is then rightfully set. Signed-off-by: Axel Davy <[email protected]>
* st/nine: Align stack for entry pointsAxel Davy2016-02-1253-687/+703
| | | | | | | | | | For 32 bits, incoming stack is 4-byte aligned. We need to realign the stack to 16-byte at some point, or there are issues later (crash with SSE, llvm, etc). This patch chooses to align the stack at API entry points. Signed-off-by: Axel Davy <[email protected]>
* st/nine: Drop path for ureg_NRM and ureg_CLAMPAxel Davy2016-02-121-24/+4
| | | | | | | | using MIN/MAX is fine instead of CLAMP. NRM doesn't exist anymore. Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Patrick Rudolph <[email protected]>
* st/nine: Remove usage of SQRT in ff codeAxel Davy2016-02-121-1/+3
| | | | | | | SQRT is not supported everywhere, so replace it by RSQ + MUL and handle case <= 0. Signed-off-by: Axel Davy <[email protected]>
* st/nine: Fix stateblocks crashes with lightsAxel Davy2016-02-121-8/+32
| | | | | | | | We had several issues of crashes with it. This should fix it. Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Patrick Rudolph <[email protected]>
* st/nine: SCRATCH does support all formatsAxel Davy2016-02-129-22/+35
| | | | | | | | | Add new argument to d3d9_to_pipe_format_checked to be able to bypass format support checks. This argument is set to TRUE when the requested Pool is SCRATCH. Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Patrick Rudolph <[email protected]>
* st/nine: Add format checks to create_zs_or_rt_surfaceAxel Davy2016-02-121-0/+3
| | | | | | | | | | | | | | Returns INVALIDCALL when trying to create a surface of unsupported format. In practice, apps are supposed to check for format support before trying to create a render target of that format. However some bad behaving apps could just try to create the surface and deduce if it failed that it wasn't supported. Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Patrick Rudolph <[email protected]>
* st/nine: Support ATI1/ATI2 for CubeTextureAxel Davy2016-02-123-7/+4
| | | | | | | | | Texture and CubeTexture use common code, and thus ATI1/ATI2 is already implemented for CubeTexture. Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Patrick Rudolph <[email protected]>
* st/nine: Clean pSharedHandle Texture ctors checksAxel Davy2016-02-123-18/+21
| | | | | | | Clarify the behaviour and clean the checks Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Patrick Rudolph <[email protected]>
* st/nine: Move texture creation checksAxel Davy2016-02-124-13/+13
| | | | | | | | | | We were having checks at both Create*Texture functions and in ctors. Move all Create*Texture checks to ctors. Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Patrick Rudolph <[email protected]>
* st/nine: Clean useless code in texture9.cAxel Davy2016-02-121-7/+1
| | | | | | | | This->base.base.resource is worth NULL for SYSTEMMEM textures. Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Patrick Rudolph <[email protected]>
* st/nine: Do not set SHARED flag for shared textures.Axel Davy2016-02-121-3/+0
| | | | | | | | We do not support shared textures, thus no need to set the shared flag. Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Patrick Rudolph <[email protected]>
* st/nine: Do not set resource usage for SYSTEMMEMAxel Davy2016-02-123-13/+4
| | | | | | | | | | | We do not create a resource for SYSTEMMEM textures, thus we do not need to set resource usage. The only exception is vertexbuffer SYSTEMMEM, since we do use a pipe resource for them. Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Patrick Rudolph <[email protected]>
* mesa: move _mesa_num_tex_faces() to teximage.hBrian Paul2016-02-122-19/+19
| | | | | | | So it's near the other cube map helper functions. Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* mesa: simplify some code with new _mesa_cube_face_target() functionBrian Paul2016-02-123-19/+4
| | | | | Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* mesa: add _mesa_cube_face_target() helperBrian Paul2016-02-121-0/+17
| | | | | Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* mesa: make _mesa_tex_target_to_face() an inline functionBrian Paul2016-02-122-17/+15
| | | | | Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* mesa: remove _ARB suffix from cube map enumsBrian Paul2016-02-1211-60/+60
| | | | | | | Just minor clean-up so we're consistent everywhere. Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* docs: Visual Studio 2013 or later is now requiredBrian Paul2016-02-122-0/+7
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* glsl: replace _strtoui64() with strtoull() for MSVCTimothy Arceri2016-02-131-4/+0
| | | | | | Now that MSVC 2013 is required we can remove this. Reviewed-by: Jose Fonseca <[email protected]>
* mesa: Use _aligned_malloc/free for MinGW too.Jose Fonseca2016-02-121-4/+4
| | | | | | | | We already use these for gallium in src/gallium/auxiliary/os/os_memory_stdc.h and it's always better to minimize divergences between MinGW and MSVC. Reviewed-by: Brian Paul <[email protected]>
* mesa: Remove support for MSVC2008.Jose Fonseca2016-02-121-3/+0
| | | | | | Spotted by Emil Velikov. Trivial.
* util/u_atomic: Remove MSVC 2008 support.Jose Fonseca2016-02-121-59/+0
| | | | | | Spotted by Emil Velikov. Trivial.
* i965: Stop considering if msrt aux buffers need aux bufferTopi Pohjolainen2016-02-121-10/+10
| | | | | | | | | | | | | | | Auxiliary buffers are always created with sample number of zero which effectively prevents intel_miptree_create_layout() from trying to associate auxiliary buffers with auxiliary buffers. Now that there is more direct path available lets start using it instead and stop even checking for such (im)possibility. v2 (Ben): Do not signal msaa layout with explicit argument but using layout_flags instead. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* i965: Separate miptree creation from auxiliary buffer setupTopi Pohjolainen2016-02-121-17/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the logic allocating and setting up miptrees is closely combined with decision making when to re-allocate buffers in X-tiled layout and when to associate colors with auxiliary buffers. These auxiliary buffers are in turn also represented as miptrees and are created by the same miptree creation logic calling itself recursively. This means considering in vain if the auxiliary buffers should be represented in X-tiled layout or if they should be associated with auxiliary buffers again. While this is somewhat unnecessary, this doesn't impose any problems currently. Miptrees for auxiliary buffers are created as simgle-sampled fusing the consideration for multi-sampled compression auxiliary buffers. The format in turn is such that is not applicable for single-sampled fast clears (that would require accompaning auxiliary buffer). But once the driver starts to support lossless compression of color buffers the auxiliary buffer will have a format that would itself be applicable for lossless compression. This would be rather difficult and ugly to detect in the current miptree creation logic, and therefore this patch seeks to separate the association logic from the general allocation and setup steps. v2 (Ben): - Do not reconsider for X-tiling in intel_miptree_create() as it was just forced to Y-tiling in miptree_create(). - Do not drop checks for allocation failures. Signed-off-by: Topi Pohjolainen <[email protected]>
* i965: Isolate aligned dimensions for stencil onlyTopi Pohjolainen2016-02-121-15/+14
| | | | | | | | This makes the logic a little more explicit and helps to keep subsequent patches easier to read. Suggested-by: Ben Widawsky <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965: Restore vbo after color resolve during brw_try_draw_prims()Topi Pohjolainen2016-02-121-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Part of brw_try_draw_prims() is a check to validate textures (brw_validate_textures()). In case of textures that currently have only level zero but are marked for mipmap generation, i965 driver will decide to replace the underlying buffer with a larger one capable of holding also the additional levels. This results into blit from the original buffer to the newly allocated (see intel_miptree_copy_teximage()). This blit is currently handled with blitter engine and hence it won't effect the ongoing draw operation. However, this blit in turn may trigger color resolve on the source buffer. In principle, this should be possible with fast cleared buffers but I only started hitting it when I enabled lossless compression (that reguires similar resolve to fast cleared buffers). Now, the color resolve is a meta operation and uses the same drawing path we are already in middle of. After quite a bit of debugging I realized that the resolve will modify the current vbo setup but it won't restore it afterwards resulting in the original draw call using wrong vertex data. When brw_try_draw_prims() gets called, the vbo logic in the Mesa core (see vbo_draw_arrays()) has just bound the vbo (see vbo_bind_arrays() and recalculate_input_bindings()). Color resolve operation will overwrite the vbo setup by calling vbo_bind_arrays() against the resolve rectangle (see brw_draw_rectlist()). Once the color resolve is done the vbo setup is left to the resolve rectangle state and the original drawing call yields bogus results. This patch aims to restore the original state after the color resolve by calling vbo_bind_arrays() yet again after the vertex array state in the core context have been restored. Now having said all this, I'd also like to state that I'm quite uncomfortable with the nested meta operations. Ths original draw call in this case is in fact a meta operation itself. It is a blit from level zero to level one when generating the additional mipmap levels (see _mesa_meta_GenerateMipmap()). Imagine the complexity if the blit in the middle from buffer to another would go to meta path also instead of blitter. I would very tempted to try to move all the resolves to happen before a meta operation is started. Additionally I still feel that work I did earlier in the spring/ summer time moving meta operations to use direct state upload bypassing the core context would make sense. v2: Force input recalculation by setting the flag explicitly v3: Do not attempt to restore vbo for opengles1 which doesn't support vertex buffer objects. Signed-off-by: Topi Pohjolainen <[email protected]>
* i965: Validate textures before altering driver stateTopi Pohjolainen2016-02-121-9/+9
| | | | | | | | | | Validation may kick off copies and subsequently color resolves. Color resolves (and the copies themselves if ending up in meta path) will overwrite the internal driver state but are not prepared to restore it. Instead of adding that capability the validation can be simply performed before the state is updated. Signed-off-by: Topi Pohjolainen <[email protected]>
* i965: Make brw_clear_cache flag all the bits on both pipelines.Kenneth Graunke2016-02-111-2/+6
| | | | | | | | | | | | | | | | Setting brw->ctx.NewDriverState and brw->ctx.NewGLState affects the dirty bits for the current pipeline. But, we need to flag everything dirty on *both* pipelines, so that when we switch back, we'll realize our programs are stale and re-upload them. To accomplish this, flag the saved state for both pipelines. Only one of them should matter, but this way we don't have to check which we need to set. It's harmless to set the other. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93790 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Tested-by: Ilia Mirkin <[email protected]>
* glsl: Allow invariant qualifer in block members in desktop OpenGL.Samuel Iglesias Gonsálvez2016-02-121-20/+4
| | | | | | | | | | | | | | Feedback from Khronos is that 'invariant' should be allowed on block members for desktop OpenGL. Fix piglit regression added by fe1e89a0: invariant-qualifier-in-out-block-01.vert v2: - Allow it for in/out blocks in OpenGL ES too, so when OES_shader_io_blocks is supported we don't need to do any change (Timothy) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89330 Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* i965: Consider tessellation in get_pipeline_state_l3_weights.Kenneth Graunke2016-02-111-1/+6
| | | | | | | | I think this was just missed; Curro and I were probably writing code simultaneously and forgot to combine them at the end. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965: Split brw_upload_texture_surfaces into compute/render atoms.Kenneth Graunke2016-02-113-9/+34
| | | | | | | | | | | When uploading state for the compute pipeline, we don't want to look at VS/TCS/TES/GS/FS programs, as they might be stale, and aren't relevant anyway. Likewise, the render pipeline shouldn't look at CS. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93790 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* radeonsi: fix build with LLVM 3.6Marek Olšák2016-02-121-1/+1
| | | | | | Broken by this cleanup: 3dc1cb0cc7605a2f3128311f5a6052f740fc7b0d Reviewed-by: Nicolai Hähnle <[email protected]>
* i965/gs: Pass VerticesIn though prog_dataJason Ekstrand2016-02-113-1/+5
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Pass usage of depth, W, and sample mask through prog_dataJason Ekstrand2016-02-116-20/+30
| | | | | | | | | | We really need to stop pulling information directly out of shaders for state setup. For one thing, if we want any sort of an on-disk shader cache, having all of this metadata in one place is going to be crucial. Also, passing it all through prog_data cleans up the compiler <-> state setup API substantially. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Refactor setup_payload_gen6 to assume FSJason Ekstrand2016-02-113-15/+15
| | | | | | | | | It's extremely FS specific so the fact that we have a stage check in the middle of it is rather bogus. While were here, we rename setup_payload_gen4 and setup_payload_gen6 to make it obvious that they are both FS specific. Reviewed-by: Kenneth Graunke <[email protected]>
* nv50,nvc0: remove unused parameter in nvXX_state_validate()Samuel Pitoiset2016-02-118-14/+10
| | | | | | | | This 'words' parameter is there since 2011 but it has never been used. While we are at it, get rid of the extern declaration. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* glsl: don't validate interface blocks twiceTimothy Arceri2016-02-121-23/+21
| | | | | | | We already check for opaque types so don't recheck for atomics and images. Reviewed-by: Iago Toral Quiroga <[email protected]>
* glsl: remove duplicate embedded struct validationTimothy Arceri2016-02-123-51/+17
| | | | | | | | | | | Commit c98deb18d5836f in 2010 disallowed embedded struct definitions in ES. Then in 2013 d9bb8b7b56ce65b disallowed it for everything but GLSL 1.10. Commit c98deb18d5836f seemed the cleanest way to do the check so its been extended to cover GL and the other version has been removed. Reviewed-by: Iago Toral Quiroga <[email protected]>
* include,gallium: Remove pre-MSVC 2013 compatibility.Jose Fonseca2016-02-117-649/+10
| | | | | Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* scons: Eliminate MSVC2008 compatibility.Jose Fonseca2016-02-117-22/+6
| | | | | Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* configure: Eliminate MSVC2008 compatibility.Jose Fonseca2016-02-116-14/+8
| | | | | | | | | | | | | | | We no longer need to build any part of Mesa with Windows SDK 7.0.7600 or MSVC 2008. MSVC 2013 will be the oldest we support. In practice this means people are now free to declare variables in the middle of blocks, on the whole Mesa tree. Care should still be taken with variable length arrays and void pointer arithmetic. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Hella-acked-by: Ian Romanick <[email protected]>
* i965: ir: dump floats as %-g rather than %f, so we can see denormalsChris Forbes2016-02-111-1/+1
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* i965/gen7: Require kernel cmd_parser 5 for ARB_compute_shaderJordan Justen2016-02-111-1/+2
| | | | | | | | The indirect dispatch registers were whitelisted in command parser version 5. (Version 5 is available as of Linux 4.4) Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
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