| Commit message (Collapse) | Author | Age | Files | Lines |
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The code just considered all formats as being supported if they were either
a valid fbo or texture format.
This was quite awkward since then the query would return "supported" for
e.g. GL_RGB9E5 or compressed formats and target RENDERBUFFER (albeit the driver
could still refuse it in theory). However, when then querying for instance the
internalformat sizes, it would just return 0 (due to the checks being more
strict there).
It was also a problem for texture buffer targets, which have a more restricted
list of formats which are allowed (and again, it would return supported but
then querying sizes would return 0).
So only take validation of formats into account which make sense for a given
target.
Can also toss out some special checks for rgb9e5 later, since we'd never get
there if it wasn't supported in the first place.
Reviewed-by: Alejandro Piñeiro <[email protected]>
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Testing for gles there is just confusing - this is about target being
supported, if it was valid at all was already determined earlier
(in _legal_parameters). It didn't make sense at all in any case, since
it would only have said false there for gles for 2d but not 2d arrays etc.
Reviewed-by: Alejandro Piñeiro <[email protected]>
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Emit it on all platforms since gen7.
Signed-off-by: Rafael Antognolli <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
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Emit it on all platforms since gen7.
Signed-off-by: Rafael Antognolli <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
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This fixes an assert in nir_lower_var_copies() for some bioshock
shaders where an unused clipdistance array has no size.
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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This make it consistent with declare_nir_input_fs() and will allow
us to support doubles.
Reviewed-by: Marek Olšák <[email protected]>
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Will be used in a following patch to help support doubles.
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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c2acf97fcc9b32e changed the use of double_inputs_read to be
inconsitent with its previous meaning. Here we re-enable the
gather info code that was removed as the modified code from
c2acf97fcc9b32e now uses the double_inputs member rather than
double_inputs_read.
This change allows us to use double_inputs_read with gallium
drivers without impacting double_inputs which is used by i965.
We also make use of the compiler option vs_inputs_dual_locations
to allow for the difference in behaviour between drivers that handle
vs inputs as taking up two locations for doubles, versus those that
treat them as taking a single location.
Reviewed-by: Karol Herbst <[email protected]>
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Allows nir drivers to either use a single or dual locations for
vs double inputs.
i965 uses dual locations for both OpenGL and Vulkan drivers, for
now gallium OpenGL drivers only use a single location.
The following patch will also make use of this option when
calling nir_shader_gather_info().
Reviewed-by: Karol Herbst <[email protected]>
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First we move double_inputs_read into a vs struct in the union,
double_inputs_read is only used for vs inputs so this will
save space and also allows us to add a new double_inputs field.
We add the new field because c2acf97fcc9b changed the behaviour
of double_inputs_read, and while it's no longer used to track
actual reads in i965 we do still want to track this for gallium
drivers.
Reviewed-by: Marek Olšák <[email protected]>
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This ports a fix from amdvlk, to fix the sizing for mip levels
when block compressed images are viewed using uncompressed views.
My original fix didn't power the clamping, but it looks like
the clamping is required to stop the sizing going too large.
Fixes:
dEQP-VK.image.texel_view_compatible.graphic.extended*bc*
Doesn't crash DOW3 anymore.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Fixes: e38685cc62e 'Revert "radv: disable support for VEGA for now."'
Signed-off-by: Dave Airlie <[email protected]>
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It did not signal syncobjs in the fence, and also signalled too early
if there was work on the queue already, as we have to wait till that
work is done.
Fixes: d27aaae4d2 "radv: Add external fence support."
Reviewed-by: Samuel Pitoiset <[email protected]>
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The arrays specified by ctx->Array._DrawArrays are used for all
vertex drawing via vbo_context::draw_prims(). Different arrays are
used for immediate mode, vertex arrays, display lists, etc. Changing
from one to another requires updating derived/driver array state.
Before, we indirectly specifid the arrays with the gl_draw_method values.
Now we just directly specify the arrays instead. This is simpler and
will allow a subsequent display list optimization.
In the future, it might make sense to get rid of ctx->Array._DrawArrays
entirely and just pass the arrays as another parameter to
vbo_context::draw_prims().
Reviewed-by: Mathias Fröhlich <[email protected]>
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Reviewed-by: Mathias Fröhlich <[email protected]>
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These will be used in a later patch.
Reviewed-by: Mathias Fröhlich <[email protected]>
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To match the VERT_ATTRIB_COLOR_INDEX name.
Give a name to the previously anonymous enum of VBO_ATTRIB_x values.
Update the comment on the enum.
Reviewed-by: Mathias Fröhlich <[email protected]>
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Reviewed-by: Mathias Fröhlich <[email protected]>
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Reviewed-by: Mathias Fröhlich <[email protected]>
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Reviewed-by: Mathias Fröhlich <[email protected]>
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Instead of NONE/ARB use FF/SHADER. Move the enum declaration to
vbo_private.h where it's used.
Reviewed-by: Mathias Fröhlich <[email protected]>
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I think 'cl' used to mean client array.
Reviewed-by: Mathias Fröhlich <[email protected]>
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This change cleans following scary warnings in valgrind output
when disk cache is being written:
==6532== Uninitialised byte(s) found during client check request
==6532== at 0x14423FAD: blob_write_bytes (blob.c:152)
==6532== by 0x144240FB: blob_write_uint32 (blob.c:194)
==6532== by 0x144001A5: write_tex (nir_serialize.c:613)
and later (loads of):
==6532== Use of uninitialised value of size 8
==6532== at 0x62FCD9E: crc32_z (in /usr/lib64/libz.so.1.2.11)
==6532== by 0x13F65014: util_hash_crc32 (crc32.c:127)
==6532== by 0x13F5DABA: cache_put (disk_cache.c:947)
Signed-off-by: Tapani Pälli <[email protected]>
Cc: [email protected]
Reviewed-by: Jason Ekstrand <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
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==2780== 1,024 bytes in 1 blocks are possibly lost in loss record 180 of 205
==2780== at 0x4C31A1E: calloc (vg_replace_malloc.c:711)
==2780== by 0x13F6467E: util_queue_init (u_queue.c:309)
==2780== by 0x13F5C9F6: disk_cache_create (disk_cache.c:369)
==2780== by 0x13F05406: brw_disk_cache_init (brw_disk_cache.c:428)
==2780== by 0x13F01E78: brwCreateContext (brw_context.c:1068)
Fixes: 1a61a8b9a7c ("i965: Initialize disk shader cache if MESA_GLSL_CACHE_DISABLE is false")
Signed-off-by: Tapani Pälli <[email protected]>
Cc: [email protected]
Reviewed-by: Iago Toral Quiroga <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
Reviewed-by: Jordan Justen <[email protected]>
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==25481== 576 bytes in 1 blocks are definitely lost in loss record 179 of 208
==25481== at 0x4C2FB6B: malloc (vg_replace_malloc.c:299)
==25481== by 0x1404E2CC: ralloc_size (ralloc.c:121)
==25481== by 0x14119F82: read_and_upload (brw_disk_cache.c:176)
==25481== by 0x1411A5C9: brw_disk_cache_upload_program (brw_disk_cache.c:271)
==25481== by 0x1412FCA4: brw_upload_wm_prog (brw_wm.c:597)
Fixes: 516d50db319 ("i965: add initial implementation of on disk shader cache")
Cc: [email protected]
Signed-off-by: Tapani Pälli <[email protected]>
Reviewed-by: Iago Toral Quiroga <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
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Reviewed-by: Dave Airlie <[email protected]>
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The last use of this was removed in the previous patch.
Reviewed-by: Dave Airlie <[email protected]>
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This fixes the scenario where the input is a struct. With this
the Unreal engines Elemental demo now works on radeonsi.
Reviewed-by: Dave Airlie <[email protected]>
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Changes since v1:
* Rebased on top of e68150de263156a3f3d1b609b6506c5649967f61 and
82adf53308c137ce0dc5f2d5da4e7cc40c5b808c.
Signed-off-by: Kai Wasserbäch <[email protected]>
Reviewed-by: Timothy Arceri <[email protected]>
Tested-by: Dieter Nützel <[email protected]>
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Reviewed-by: Roland Scheidegger <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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This uses a different shader than radeonsi, as we can't address non-256
aligned ssbos, which the radeonsi code does. This passes some extra
offsets into the shader.
It also contains a set of u64 instruction implementation that may
or may not be complete (at least the u64div is definitely not something
that works outside this use-case). If r600 grows 64-bit integers,
it will use the GLSL lowering for divmod.
Reviewed-by: Roland Scheidegger <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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This just makes it a bit simpler for cayman vs eg
Reviewed-by: Roland Scheidegger <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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If the images/buffer bindings had a gap, this produced the wrong values,
this should fix that to generate the correct rat mask for mixes of
images/buffers/cbs.
Reviewed-by: Roland Scheidegger <[email protected]>
Cc: "18.0" <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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Otherwise, using pkg-config to retrieve flags will fail, e.g.
$ pkg-config gl --cflags
Package libdrm was not found in the pkg-config search path.
Perhaps you should add the directory containing `libdrm.pc'
to the PKG_CONFIG_PATH environment variable
Package 'libdrm', required by 'gl', not found
Fixes: 3218056e0eb3 ("meson: Build i965 and dri stack")
Reviewed-by: Dylan Baker <[email protected]>
Signed-off-by: Jon Turney <[email protected]>
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Fixes black display in DRI due to storing to 0x00000000.
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The changes in 4.2 haven't impacted any of our CL or state struct entries
that I can see, so I haven't enabled custom compile for doing 4.2 instead
of 4.1.
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After the 4.1 spec, 4.2 retroactively renamed patchid to barrierid because
it's used for other barriers in compute.
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Reviewed-by: Samuel Pitoiset <[email protected]>
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Reviewed-by: Samuel Pitoiset <[email protected]>
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shader-db doesn't show any regression and 32-bit pointers with byval
are declared as VGPRs for some reason.
Reviewed-by: Samuel Pitoiset <[email protected]>
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Reviewed-by: Samuel Pitoiset <[email protected]>
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Reviewed-by: Samuel Pitoiset <[email protected]>
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Reviewed-by: Samuel Pitoiset <[email protected]>
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